Re: [U-Boot] [PATCH 07/12] board: ti: dra76-evm: Add DDR data

[Tom Rini]

On Sat, Aug 12, 2017 at 11:59:28AM +0530, Lokesh Vutla wrote:

> dra76-evm has the ddr parts connectedi running at 666MHz:
> EMIF1: MT41K512M16HA-125 AIT:A  x 2
> EMIF2: MT41K512M8RH-125-AAT:E x 4
> Add support for configuring the above DDR parts.
> 
> Signed-off-by: Lokesh Vutla 

Reviewed-by: Tom Rini 

-- 
Tom


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[U-Boot] [PATCH 07/12] board: ti: dra76-evm: Add DDR data

[Lokesh Vutla]

dra76-evm has the ddr parts connectedi running at 666MHz:
EMIF1: MT41K512M16HA-125 AIT:A  x 2
EMIF2: MT41K512M8RH-125-AAT:E x 4
Add support for configuring the above DDR parts.

Signed-off-by: Lokesh Vutla 
---
 arch/arm/mach-omap2/omap5/hw_data.c |  1 +
 arch/arm/mach-omap2/omap5/sdram.c   |  2 ++
 board/ti/dra7xx/evm.c   | 61 +++--
 3 files changed, 62 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/omap5/hw_data.c 
b/arch/arm/mach-omap2/omap5/hw_data.c
index d6174fb5c7..d0d5d6804c 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -781,6 +781,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
case DRA752_ES1_0:
case DRA752_ES1_1:
case DRA752_ES2_0:
+   case DRA762_ES1_0:
*regs = _dra7xx_es1;
break;
case DRA722_ES1_0:
diff --git a/arch/arm/mach-omap2/omap5/sdram.c 
b/arch/arm/mach-omap2/omap5/sdram.c
index 7712923d85..67ff63b9f6 100644
--- a/arch/arm/mach-omap2/omap5/sdram.c
+++ b/arch/arm/mach-omap2/omap5/sdram.c
@@ -480,6 +480,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz;
*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);
break;
+   case DRA762_ES1_0:
case DRA722_ES2_0:
*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;
*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2);
@@ -709,6 +710,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
*iterations = sizeof(omap5_bug_00339_regs)/
 sizeof(omap5_bug_00339_regs[0]);
break;
+   case DRA762_ES1_0:
case DRA752_ES1_0:
case DRA752_ES1_1:
case DRA752_ES2_0:
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 7ae8d2ff73..f9d0b05a16 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -210,6 +210,56 @@ const struct emif_regs emif2_ddr3_532_mhz_1cs_2G = {
.emif_rd_wr_exec_thresh = 0x0305
 };
 
+const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra76 = {
+   .sdram_config_init  = 0x61862B32,
+   .sdram_config   = 0x61862B32,
+   .sdram_config2  = 0x,
+   .ref_ctrl   = 0x514C,
+   .ref_ctrl_final = 0x144A,
+   .sdram_tim1 = 0xD113783C,
+   .sdram_tim2 = 0x30B47FE3,
+   .sdram_tim3 = 0x409F8AD8,
+   .read_idle_ctrl = 0x0005,
+   .zq_config  = 0x5007190B,
+   .temp_alert_config  = 0x,
+   .emif_ddr_phy_ctlr_1_init   = 0x0824400D,
+   .emif_ddr_phy_ctlr_1= 0x0E24400D,
+   .emif_ddr_ext_phy_ctrl_1= 0x04040100,
+   .emif_ddr_ext_phy_ctrl_2= 0x006B009F,
+   .emif_ddr_ext_phy_ctrl_3= 0x006B00A2,
+   .emif_ddr_ext_phy_ctrl_4= 0x006B00A8,
+   .emif_ddr_ext_phy_ctrl_5= 0x006B00A8,
+   .emif_rd_wr_lvl_rmp_win = 0x,
+   .emif_rd_wr_lvl_rmp_ctl = 0x8000,
+   .emif_rd_wr_lvl_ctl = 0x,
+   .emif_rd_wr_exec_thresh = 0x0305
+};
+
+const struct emif_regs emif_2_regs_ddr3_666_mhz_1cs_dra76 = {
+   .sdram_config_init  = 0x61862B32,
+   .sdram_config   = 0x61862B32,
+   .sdram_config2  = 0x,
+   .ref_ctrl   = 0x514C,
+   .ref_ctrl_final = 0x144A,
+   .sdram_tim1 = 0xD113781C,
+   .sdram_tim2 = 0x30B47FE3,
+   .sdram_tim3 = 0x409F8AD8,
+   .read_idle_ctrl = 0x0005,
+   .zq_config  = 0x5007190B,
+   .temp_alert_config  = 0x,
+   .emif_ddr_phy_ctlr_1_init   = 0x0824400D,
+   .emif_ddr_phy_ctlr_1= 0x0E24400D,
+   .emif_ddr_ext_phy_ctrl_1= 0x04040100,
+   .emif_ddr_ext_phy_ctrl_2= 0x006B009F,
+   .emif_ddr_ext_phy_ctrl_3= 0x006B00A2,
+   .emif_ddr_ext_phy_ctrl_4= 0x006B00A8,
+   .emif_ddr_ext_phy_ctrl_5= 0x006B00A8,
+   .emif_rd_wr_lvl_rmp_win = 0x,
+   .emif_rd_wr_lvl_rmp_ctl = 0x8000,
+   .emif_rd_wr_lvl_ctl = 0x,
+   .emif_rd_wr_exec_thresh = 0x0305
+};
+
 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
 {
u64 ram_size;
@@ -235,6 +285,12 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs 
**regs)
break;
}
break;
+   case DRA762_ES1_0:
+