If runs at 1.2GHz, enable ldo, and adjust voltage.

If ldo_bypass is true, it will adjust voltage. If not, do nothing.

This function is board specific, so implement it in board file.

Signed-off-by: Peng Fan <peng....@freescale.com>
Signed-off-by: Robin Gong <b38...@freescale.com>
Signed-off-by: Nitin Garg <nitin.g...@freescale.com>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 85 +++++++++++++++++++++++++++++++++
 include/configs/mx6sabresd.h            |  2 +
 2 files changed, 87 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 59544d9..9e0a8ae 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -628,6 +628,7 @@ int board_init(void)
        return 0;
 }
 
+static struct pmic *pfuze;
 int power_init_board(void)
 {
        struct pmic *p;
@@ -636,6 +637,7 @@ int power_init_board(void)
        p = pfuze_common_init(I2C_PMIC);
        if (!p)
                return -ENODEV;
+       pfuze = p;
 
        ret = pfuze_mode_init(p, APS_PFM);
        if (ret < 0)
@@ -656,6 +658,89 @@ int power_init_board(void)
        return 0;
 }
 
+#ifdef CONFIG_LDO_BYPASS_CHECK
+void ldo_mode_set(int ldo_bypass)
+{
+       unsigned int value;
+       int is_400M;
+       unsigned char vddarm;
+       struct pmic *p = pfuze;
+
+       /* increase VDDARM/VDDSOC to support 1.2G chip */
+       if (check_1_2G()) {
+               ldo_bypass = 0; /* ldo_enable on 1.2G chip */
+               printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n");
+               /* increase VDDARM to 1.425V */
+               pmic_reg_read(p, PFUZE100_SW1ABVOL, &value);
+               value &= ~0x3f;
+               value |= PFUZE100_SW1ABC_SETP(14250);
+               pmic_reg_write(p, PFUZE100_SW1ABVOL, value);
+
+               /* increase VDDSOC to 1.425V */
+               pmic_reg_read(p, PFUZE100_SW1CVOL, &value);
+               value &= ~0x3f;
+               value |= PFUZE100_SW1ABC_SETP(14250);
+               pmic_reg_write(p, PFUZE100_SW1CVOL, value);
+       }
+       /* switch to ldo_bypass mode , boot on 800Mhz */
+       if (ldo_bypass) {
+               prep_anatop_bypass();
+
+               /* decrease VDDARM for 400Mhz DQ:1.1V, DL:1.275V */
+               pmic_reg_read(p, PFUZE100_SW1ABVOL, &value);
+               value &= ~0x3f;
+#if defined(CONFIG_MX6DL)
+               value |= PFUZE100_SW1ABC_SETP(12750);
+#else
+               value |= PFUZE100_SW1ABC_SETP(11000);
+#endif
+               pmic_reg_write(p, PFUZE100_SW1ABVOL, value);
+
+               /* increase VDDSOC to 1.3V */
+               pmic_reg_read(p, PFUZE100_SW1CVOL, &value);
+               value &= ~0x3f;
+               value |= PFUZE100_SW1ABC_SETP(13000);
+               pmic_reg_write(p, PFUZE100_SW1CVOL, value);
+
+               /*
+                * MX6Q:
+                * VDDARM:1.15V@800M; VDDSOC:1.175V@800M
+                * VDDARM:0.975V@400M; VDDSOC:1.175V@400M
+                * MX6DL:
+                * VDDARM:1.175V@800M; VDDSOC:1.175V@800M
+                * VDDARM:1.075V@400M; VDDSOC:1.175V@400M
+                */
+               is_400M = set_anatop_bypass(2);
+               if (is_400M)
+#if defined(CONFIG_MX6DL)
+                       vddarm = PFUZE100_SW1ABC_SETP(10750);
+#else
+                       vddarm = PFUZE100_SW1ABC_SETP(9750);
+#endif
+               else
+#if defined(CONFIG_MX6DL)
+                       vddarm = PFUZE100_SW1ABC_SETP(11750);
+#else
+                       vddarm = PFUZE100_SW1ABC_SETP(11500);
+#endif
+
+               pmic_reg_read(p, PFUZE100_SW1ABVOL, &value);
+               value &= ~0x3f;
+               value |= vddarm;
+               pmic_reg_write(p, PFUZE100_SW1ABVOL, value);
+
+               /* decrease VDDSOC to 1.175V */
+               pmic_reg_read(p, PFUZE100_SW1CVOL, &value);
+               value &= ~0x3f;
+               value |= PFUZE100_SW1ABC_SETP(11750);
+               pmic_reg_write(p, PFUZE100_SW1CVOL, value);
+
+               finish_anatop_bypass();
+               printf("switch to ldo_bypass mode!\n");
+       }
+}
+#endif
+
 #ifdef CONFIG_MXC_SPI
 int board_spi_cs_gpio(unsigned bus, unsigned cs)
 {
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 99d9d4d..70dbf30 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -60,6 +60,8 @@
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
 
+#define CONFIG_LDO_BYPASS_CHECK
+
 /* USB Configs */
 #define CONFIG_CMD_USB
 #ifdef CONFIG_CMD_USB
-- 
1.8.4


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