Hi Stephen,
On 4 August 2016 at 12:52, Stephen Warren wrote:
> On 08/03/2016 07:16 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 1 August 2016 at 09:22, Stephen Warren wrote:
>>>
>>> On 07/31/2016 07:02 PM, Simon Glass wrote:
Hi
On 08/03/2016 07:16 PM, Simon Glass wrote:
Hi Stephen,
On 1 August 2016 at 09:22, Stephen Warren wrote:
On 07/31/2016 07:02 PM, Simon Glass wrote:
Hi Stephen,
On 27 July 2016 at 15:48, Stephen Warren wrote:
From: Stephen Warren
Hi Stephen,
On 1 August 2016 at 09:22, Stephen Warren wrote:
> On 07/31/2016 07:02 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 27 July 2016 at 15:48, Stephen Warren wrote:
>>>
>>> From: Stephen Warren
>>>
>>> Tegra186
On 07/31/2016 07:02 PM, Simon Glass wrote:
Hi Stephen,
On 27 July 2016 at 15:48, Stephen Warren wrote:
From: Stephen Warren
Tegra186 supports the new standard clock, reset, and power domain APIs.
Older Tegra SoCs still use custom APIs. Enhance the
Hi Stephen,
On 27 July 2016 at 15:48, Stephen Warren wrote:
> From: Stephen Warren
>
> Tegra186 supports the new standard clock, reset, and power domain APIs.
> Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so
> that it can
From: Stephen Warren
Tegra186 supports the new standard clock, reset, and power domain APIs.
Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so
that it can operate with either set of APIs.
On Tegra186, the BPMP handles all aspects of PCIe PHY (UPHY)
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