Re: [U-Boot] [PATCH 1/6] x86: coreboot: Add generic coreboot payload support
On Tue, Aug 14, 2018 at 2:39 PM, Christian Gmeiner wrote: > Am Fr., 10. Aug. 2018 um 11:37 Uhr schrieb Bin Meng : >> >> Currently building U-Boot as the coreboot payload requires user >> to change the build configuration for a specific board during >> menuconfig process. This uses the board's native device tree >> to configure the hardware. For example, the device tree provides >> PCI address range for the PCI host controller and U-Boot will >> re-program all PCI devices' BAR to be within this range. In order >> to make sure we don't mess up the hardware, we should guarantee >> the range matches what coreboot programs the chipset. >> >> But we really should make the coreboot payload support easier. >> Just like EFI payload, we can create a generic coreboot payload >> for all x86 boards as well. The payload is configured to include >> as many generic drivers as possible. All stuff that touches low >> level initialization are not allowed as such is the coreboot's >> responsibility. Platform specific drivers (like gpio, spi, etc) >> are not included. >> >> Signed-off-by: Bin Meng > > I really love this generic coreboot payload thing and should simplify the > stuff I am working on ( - a generic coreboot payload with some boot logic > stuff in it). > > Reviewed-by: Christian Gmeiner applied to u-boot-x86, thanks! ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] x86: coreboot: Add generic coreboot payload support
Am Fr., 10. Aug. 2018 um 11:37 Uhr schrieb Bin Meng :
>
> Currently building U-Boot as the coreboot payload requires user
> to change the build configuration for a specific board during
> menuconfig process. This uses the board's native device tree
> to configure the hardware. For example, the device tree provides
> PCI address range for the PCI host controller and U-Boot will
> re-program all PCI devices' BAR to be within this range. In order
> to make sure we don't mess up the hardware, we should guarantee
> the range matches what coreboot programs the chipset.
>
> But we really should make the coreboot payload support easier.
> Just like EFI payload, we can create a generic coreboot payload
> for all x86 boards as well. The payload is configured to include
> as many generic drivers as possible. All stuff that touches low
> level initialization are not allowed as such is the coreboot's
> responsibility. Platform specific drivers (like gpio, spi, etc)
> are not included.
>
> Signed-off-by: Bin Meng
I really love this generic coreboot payload thing and should simplify the
stuff I am working on ( - a generic coreboot payload with some boot logic
stuff in it).
Reviewed-by: Christian Gmeiner
> ---
>
> arch/x86/cpu/coreboot/Kconfig | 20 +--
> arch/x86/cpu/coreboot/coreboot.c | 9 +++--
> arch/x86/dts/Makefile | 1 +
> arch/x86/dts/coreboot.dts | 41
> ++
> board/coreboot/coreboot/Kconfig| 28 +++
> board/coreboot/coreboot/Makefile | 2 +-
> board/coreboot/coreboot/coreboot.c | 17 +
> .../coreboot/{coreboot_start.S => start.S} | 0
> configs/coreboot_defconfig | 18 --
> doc/README.x86 | 15
> include/configs/coreboot.h | 32 +
> 11 files changed, 116 insertions(+), 67 deletions(-)
> create mode 100644 arch/x86/dts/coreboot.dts
> create mode 100644 board/coreboot/coreboot/coreboot.c
> rename board/coreboot/coreboot/{coreboot_start.S => start.S} (100%)
> create mode 100644 include/configs/coreboot.h
>
> diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
> index 392c258..93f61f2 100644
> --- a/arch/x86/cpu/coreboot/Kconfig
> +++ b/arch/x86/cpu/coreboot/Kconfig
> @@ -3,26 +3,26 @@ if TARGET_COREBOOT
> config SYS_COREBOOT
> bool
> default y
> + imply SYS_NS16550
> + imply SCSI
> + imply SCSI_AHCI
> imply AHCI_PCI
> - imply E1000
> - imply ICH_SPI
> imply MMC
> imply MMC_PCI
> imply MMC_SDHCI
> imply MMC_SDHCI_SDMA
> - imply SCSI
> - imply SCSI_AHCI
> - imply SPI_FLASH
> - imply SYS_NS16550
> imply USB
> imply USB_EHCI_HCD
> imply USB_XHCI_HCD
> + imply USB_STORAGE
> + imply USB_KEYBOARD
> imply VIDEO_COREBOOT
> + imply E1000
> + imply ETH_DESIGNWARE
> + imply PCH_GBE
> + imply RTL8169
> imply CMD_CBFS
> imply FS_CBFS
> -
> -config CBMEM_CONSOLE
> - bool
> - default y
> + imply CBMEM_CONSOLE
>
> endif
> diff --git a/arch/x86/cpu/coreboot/coreboot.c
> b/arch/x86/cpu/coreboot/coreboot.c
> index 69025c1..a6fd3a8 100644
> --- a/arch/x86/cpu/coreboot/coreboot.c
> +++ b/arch/x86/cpu/coreboot/coreboot.c
> @@ -7,6 +7,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -75,12 +76,10 @@ int last_stage_init(void)
> if (gd->flags & GD_FLG_COLD_BOOT)
> timestamp_add_to_bootstage();
>
> - board_final_cleanup();
> + /* start usb so that usb keyboard can be used as input device */
> + usb_init();
>
> - return 0;
> -}
> + board_final_cleanup();
>
> -int misc_init_r(void)
> -{
> return 0;
> }
> diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
> index 37e4fdc..c62540f 100644
> --- a/arch/x86/dts/Makefile
> +++ b/arch/x86/dts/Makefile
> @@ -6,6 +6,7 @@ dtb-y += bayleybay.dtb \
> chromebox_panther.dtb \
> chromebook_samus.dtb \
> conga-qeval20-qa3-e3845.dtb \
> + coreboot.dtb \
> cougarcanyon2.dtb \
> crownbay.dtb \
> dfi-bt700-q7x-151.dtb \
> diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
> new file mode 100644
> index 000..a94f781
> --- /dev/null
> +++ b/arch/x86/dts/coreboot.dts
> @@ -0,0 +1,41 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018, Bin Meng
> + *
> + * Generic coreboot payload device tree for x86 targets
> + */
> +
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +/include/ "serial.dtsi"
> +/include/ "keyboard.dtsi"
> +/include/ "reset.dtsi"
> +/include/ "rtc.dtsi"
> +/include/ "tsc_timer.dtsi"
> +
> +/ {
> + model = "coreboot x86
[U-Boot] [PATCH 1/6] x86: coreboot: Add generic coreboot payload support
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.
But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.
Signed-off-by: Bin Meng
---
arch/x86/cpu/coreboot/Kconfig | 20 +--
arch/x86/cpu/coreboot/coreboot.c | 9 +++--
arch/x86/dts/Makefile | 1 +
arch/x86/dts/coreboot.dts | 41 ++
board/coreboot/coreboot/Kconfig| 28 +++
board/coreboot/coreboot/Makefile | 2 +-
board/coreboot/coreboot/coreboot.c | 17 +
.../coreboot/{coreboot_start.S => start.S} | 0
configs/coreboot_defconfig | 18 --
doc/README.x86 | 15
include/configs/coreboot.h | 32 +
11 files changed, 116 insertions(+), 67 deletions(-)
create mode 100644 arch/x86/dts/coreboot.dts
create mode 100644 board/coreboot/coreboot/coreboot.c
rename board/coreboot/coreboot/{coreboot_start.S => start.S} (100%)
create mode 100644 include/configs/coreboot.h
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 392c258..93f61f2 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -3,26 +3,26 @@ if TARGET_COREBOOT
config SYS_COREBOOT
bool
default y
+ imply SYS_NS16550
+ imply SCSI
+ imply SCSI_AHCI
imply AHCI_PCI
- imply E1000
- imply ICH_SPI
imply MMC
imply MMC_PCI
imply MMC_SDHCI
imply MMC_SDHCI_SDMA
- imply SCSI
- imply SCSI_AHCI
- imply SPI_FLASH
- imply SYS_NS16550
imply USB
imply USB_EHCI_HCD
imply USB_XHCI_HCD
+ imply USB_STORAGE
+ imply USB_KEYBOARD
imply VIDEO_COREBOOT
+ imply E1000
+ imply ETH_DESIGNWARE
+ imply PCH_GBE
+ imply RTL8169
imply CMD_CBFS
imply FS_CBFS
-
-config CBMEM_CONSOLE
- bool
- default y
+ imply CBMEM_CONSOLE
endif
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 69025c1..a6fd3a8 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,6 +7,7 @@
#include
#include
+#include
#include
#include
#include
@@ -75,12 +76,10 @@ int last_stage_init(void)
if (gd->flags & GD_FLG_COLD_BOOT)
timestamp_add_to_bootstage();
- board_final_cleanup();
+ /* start usb so that usb keyboard can be used as input device */
+ usb_init();
- return 0;
-}
+ board_final_cleanup();
-int misc_init_r(void)
-{
return 0;
}
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 37e4fdc..c62540f 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -6,6 +6,7 @@ dtb-y += bayleybay.dtb \
chromebox_panther.dtb \
chromebook_samus.dtb \
conga-qeval20-qa3-e3845.dtb \
+ coreboot.dtb \
cougarcanyon2.dtb \
crownbay.dtb \
dfi-bt700-q7x-151.dtb \
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
new file mode 100644
index 000..a94f781
--- /dev/null
+++ b/arch/x86/dts/coreboot.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng
+ *
+ * Generic coreboot payload device tree for x86 targets
+ */
+
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
+/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
+
+/ {
+ model = "coreboot x86 payload";
+ compatible = "coreboot,x86-payload";
+
+ aliases {
+ serial0 =
+ };
+
+ config {
+ silent_console = <0>;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ pci {
+ compatible = "pci-x86";
+ u-boot,dm-pre-reloc;
+ };
+
+ coreboot-fb {
+ compatible = "coreboot-fb";
+ };
+};
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index
