Re: [U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-12 Thread Chee, Tien Fong 
On Fri, 2019-10-04 at 15:30 -0700, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Add a script to process hps handoff data and generate a header
> for inclusion in u-boot specific devicetree addons.  The header
> should be included in the top level u-boot.dtsi.
> 
> Signed-off-by: Dalon Westergreen 
> ---
>  arch/arm/mach-socfpga/qts-filter-a10.sh | 141
> 
>  1 file changed, 141 insertions(+)
>  create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh
> 
> diff --git a/arch/arm/mach-socfpga/qts-filter-a10.sh b/arch/arm/mach-
> socfpga/qts-filter-a10.sh
> new file mode 100755
> index 00..ddb0d0a6f3
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/qts-filter-a10.sh
> @@ -0,0 +1,141 @@
> +#!/bin/bash
> +
> +#
> +# helper function to convert from DOS to Unix, if necessary, and
> handle
> +# lines ending in '\'.
> +#
> +fix_newlines_in_macros() {
> + sed -n ':next;s/\r$//;/[^\\]\\$/ {N;s/\\\n//;b next};p' $1
> +}
> +
> +#filter out only what we need from a10 hps.xml
> +grep_a10_hps_config() {
> + egrep "clk_hz|i_clk_mgr|i_io48_pin_mux|AXI_SLAVE|AXI_MASTER"
> +}

Above function seems unused.

> +
> +#
> +# Process hps.xml
> +# $1:hps.xml
> +# $2:Output File
> +#
> +process_a10_hps_config() {
> + hps_xml="$1"
> + outfile="$2"
> +
> + (cat << EOF
> +/* SPDX-License-Identifier: BSD-3-Clause */
> +/*
> + * Altera Arria10 SoCFPGA configuration
> + */
> +
> +#ifndef __SOCFPGA_ARRIA10_CONFIG_H__
> +#define __SOCFPGA_ARRIA10_CONFIG_H__
> +
> +EOF
> +
> + echo "/* Clocks */"
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "clk_hz" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/\.[0-9]//' |
> + sed 's/I_CLK_MGR_//' |
> + sort
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "i_clk_mgr_mainpll" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/\.[0-9]//' |
> + sed 's/I_CLK_MGR_//' |
> + sort
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "i_clk_mgr_perpll" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/\.[0-9]//' |
> + sed 's/I_CLK_MGR_//' |
> + sort
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "i_clk_mgr_clkmgr" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/\.[0-9]//' |
> + sed 's/I_CLK_MGR_//' |
> + sort
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "i_clk_mgr_alteragrp" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/\.[0-9]//' |
> + sed 's/I_CLK_MGR_//' |
> + sort
> + echo "#define ALTERAGRP_MPUCLK ((ALTERAGRP_MPUCLK_PERICNT <<
> 16) | \\"
> + echo "  (ALTERAGRP_MPUCLK_MAINCNT))"
> + echo "#define ALTERAGRP_NOCCLK ((ALTERAGRP_NOCCLK_PERICNT <<
> 16) | \\"
> + echo "  (ALTERAGRP_NOCCLK_MAINCNT))"
> +
> + echo
> + echo "/* Pin Mux Configuration */"
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "i_io48_pin_mux" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/I_IO48_PIN_MUX_//' |
> + sed 's/SHARED_3V_IO_GRP_//' |
> + sed 's/FPGA_INTERFACE_GRP_//' |
> + sed 's/DEDICATED_IO_GRP_//' |
> + sed 's/CONFIGURATION_DEDICATED/CONFIG/' |
> + sort
> +
> + echo
> + echo "/* Bridge Configuration */"
> + fix_newlines_in_macros \
> + ${hps_xml} | egrep "AXI_SLAVE|AXI_MASTER" |
> + awk -F"'" '{ gsub("\\.","_",$2) ; \
> + print "#define" " " toupper($2) " "
> $4}' |
> + sed 's/true/1/' |
> + sed 's/false/0/' |
> + sort
> +
> + echo
> + echo "/* Voltage Select for Config IO */"
> + echo "#define CONFIG_IO_BANK_VSEL \\"
> + echo "  (((CONFIG_IO_BANK_VOLTAGE_SEL_CLKRST_IO & 0x3)
> << 8) | \\"
> + echo "  (CONFIG_IO_BANK_VOLTAGE_SEL_PERI_IO & 0x3))"
> +
> + echo
> + echo "/* Macro for Config IO bit mapping */"
> + echo -n "#define CONFIG_IO_MACRO(NAME) "
> + echo "(((NAME ## _RTRIM & 0xff) << 19) | \\"
> + echo "  ((NAME ##

Re: [U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-05 Thread Dalon L Westergreen 
On Sat, 2019-10-05 at 01:47 +0200, Marek Vasut wrote:
> On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> > From: Dalon Westergreen 
> > Add a script to process hps handoff data and generate a headerfor inclusion
> > in u-boot specific devicetree addons.  The headershould be included in the
> > top level u-boot.dtsi.
> 
> A10 should already be completely DT based and should directly use the
> DTgenerated by quartus, why is this script needed?

The bsp-editor is on the path to being deprecated, this completely removes the
need for the generated devicetree

> Also, if this is to be included in u-boot.dtsi , how does this work
> withmultiple distinct boards ?

Each board has its own top-level devicetree name.  the intent is that the header
is included
in the top-level u-boot.dtsi, as in socfpga_arria10_socdk_sdmmc-u-boot.dtsi
which
is for a specific board implementation.  Other implementations should have their
own devicetree.

In this patch set, the header is socfpga_arria10_socdk_sdmmc_handoff.h included
in socfpga_arria10_socdk_sdmmc-u-boot.dtsi. 

--dalon
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Re: [U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-04 Thread Marek Vasut 
On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Add a script to process hps handoff data and generate a header
> for inclusion in u-boot specific devicetree addons.  The header
> should be included in the top level u-boot.dtsi.

A10 should already be completely DT based and should directly use the DT
generated by quartus, why is this script needed?

Also, if this is to be included in u-boot.dtsi , how does this work with
multiple distinct boards ?
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[U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-04 Thread Dalon Westergreen 
From: Dalon Westergreen 

Add a script to process hps handoff data and generate a header
for inclusion in u-boot specific devicetree addons.  The header
should be included in the top level u-boot.dtsi.

Signed-off-by: Dalon Westergreen 
---
 arch/arm/mach-socfpga/qts-filter-a10.sh | 141 
 1 file changed, 141 insertions(+)
 create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh

diff --git a/arch/arm/mach-socfpga/qts-filter-a10.sh 
b/arch/arm/mach-socfpga/qts-filter-a10.sh
new file mode 100755
index 00..ddb0d0a6f3
--- /dev/null
+++ b/arch/arm/mach-socfpga/qts-filter-a10.sh
@@ -0,0 +1,141 @@
+#!/bin/bash
+
+#
+# helper function to convert from DOS to Unix, if necessary, and handle
+# lines ending in '\'.
+#
+fix_newlines_in_macros() {
+   sed -n ':next;s/\r$//;/[^\\]\\$/ {N;s/\\\n//;b next};p' $1
+}
+
+#filter out only what we need from a10 hps.xml
+grep_a10_hps_config() {
+   egrep "clk_hz|i_clk_mgr|i_io48_pin_mux|AXI_SLAVE|AXI_MASTER"
+}
+
+#
+# Process hps.xml
+# $1:  hps.xml
+# $2:  Output File
+#
+process_a10_hps_config() {
+   hps_xml="$1"
+   outfile="$2"
+
+   (cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Altera Arria10 SoCFPGA configuration
+ */
+
+#ifndef __SOCFPGA_ARRIA10_CONFIG_H__
+#define __SOCFPGA_ARRIA10_CONFIG_H__
+
+EOF
+
+   echo "/* Clocks */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "clk_hz" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_mainpll" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_perpll" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_clkmgr" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_alteragrp" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   echo "#define ALTERAGRP_MPUCLK ((ALTERAGRP_MPUCLK_PERICNT << 16) | \\"
+   echo "  (ALTERAGRP_MPUCLK_MAINCNT))"
+   echo "#define ALTERAGRP_NOCCLK ((ALTERAGRP_NOCCLK_PERICNT << 16) | \\"
+   echo "  (ALTERAGRP_NOCCLK_MAINCNT))"
+
+   echo
+   echo "/* Pin Mux Configuration */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_io48_pin_mux" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/I_IO48_PIN_MUX_//' |
+   sed 's/SHARED_3V_IO_GRP_//' |
+   sed 's/FPGA_INTERFACE_GRP_//' |
+   sed 's/DEDICATED_IO_GRP_//' |
+   sed 's/CONFIGURATION_DEDICATED/CONFIG/' |
+   sort
+
+   echo
+   echo "/* Bridge Configuration */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "AXI_SLAVE|AXI_MASTER" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/true/1/' |
+   sed 's/false/0/' |
+   sort
+
+   echo
+   echo "/* Voltage Select for Config IO */"
+   echo "#define CONFIG_IO_BANK_VSEL \\"
+   echo "  (((CONFIG_IO_BANK_VOLTAGE_SEL_CLKRST_IO & 0x3) << 8) | \\"
+   echo "  (CONFIG_IO_BANK_VOLTAGE_SEL_PERI_IO & 0x3))"
+
+   echo
+   echo "/* Macro for Config IO bit mapping */"
+   echo -n "#define CONFIG_IO_MACRO(NAME) "
+   echo "(((NAME ## _RTRIM & 0xff) << 19) | \\"
+   echo "  ((NAME ## _INPUT_BUF_EN & 0x3) << 17) | \\"
+   echo "  ((NAME ## _WK_PU_EN & 0x1) << 16) | \\"
+   echo "  ((NAME ## _PU_SLW_RT & 0x1) << 13) | \\"
+   echo "  ((NAME ## _PU_DRV_STRG & 0xf) << 8) | \\"
+   echo "  ((NAME ## _PD_SLW_RT