Re: [U-Boot] [PATCH 1/8] armv8/fsl-lsch3: Add Freescale Debug Server driver

2015-04-24 Thread York Sun
On 03/19/2015 09:20 AM, York Sun wrote:
 From: Bhupesh Sharma bhupesh.sha...@freescale.com
 
 The Debug Server driver is responsible for loading the Debug
 server FW on the Service Processor (Cortex-A5 core) on LS2085A like
 SoCs and then polling for the successful initialization of the same.
 TOP MEM HIDE is adjusted to ensure the space required by Debug Server
 FW is accounted for. MC uses the DDR area which is calculated as:
 
 MC DDR region start = Top of DDR - area reserved by Debug Server FW
 
 Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
 ---
This set is to fsl-qoriq master, awaiting upstream.

[U-Boot,1/8] armv8/fsl-lsch3: Add Freescale Debug Server driver
[U-Boot,2/8] fsl-ch3/README: Add description for NOR flash layout (firmware 
images)
[U-Boot,3/8] driver/fsl-mc: Add support of MC Flibs
[U-Boot,4/8] driver/ldpaa_eth: Add LDPAA Ethernet driver
[U-Boot,5/8] board/ls2085_common: Increase malloc length
[U-Boot,6/8] driver/fsl_ifc: Add support to finalize CS1, CS3 address binding
[U-Boot,7/8] nand/fsl_ifc: Increase eccstat[] for IFC 2.0
[U-Boot,v2,8/8] driver/i2c/mxc: Enable I2C bus 3 and 4

York
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[U-Boot] [PATCH 1/8] armv8/fsl-lsch3: Add Freescale Debug Server driver

2015-03-19 Thread York Sun
From: Bhupesh Sharma bhupesh.sha...@freescale.com

The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:

MC DDR region start = Top of DDR - area reserved by Debug Server FW

Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
 arch/arm/cpu/armv8/fsl-lsch3/cpu.c   |2 +-
 arch/arm/include/asm/arch-fsl-lsch3/config.h |   10 +-
 board/freescale/ls2085a/ls2085a.c|   29 +++
 drivers/misc/Makefile|1 +
 drivers/misc/fsl_debug_server.c  |  246 ++
 drivers/net/fsl-mc/mc.c  |4 +
 include/configs/ls2085a_common.h |   20 ++-
 include/fsl-mc/fsl_mc.h  |1 +
 include/fsl_debug_server.h   |   32 
 9 files changed, 338 insertions(+), 7 deletions(-)
 create mode 100644 drivers/misc/fsl_debug_server.c
 create mode 100644 include/fsl_debug_server.h

diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c 
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 4997487..618fbc2 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -10,6 +10,7 @@
 #include asm/armv8/mmu.h
 #include asm/io.h
 #include asm/arch-fsl-lsch3/immap_lsch3.h
+#include fsl_debug_server.h
 #include fsl-mc/fsl_mc.h
 #include cpu.h
 #include mp.h
@@ -384,7 +385,6 @@ int cpu_eth_init(bd_t *bis)
return error;
 }
 
-
 int arch_early_init_r(void)
 {
int rv;
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h 
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index b140c1f..59d10bf 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -30,6 +30,15 @@
 #define CONFIG_SYS_FSL_PMU_CLTBENR (CONFIG_SYS_FSL_PMU_ADDR + \
 0x18A0)
 
+/* SP (Cortex-A5) related */
+#define CONFIG_SYS_FSL_SP_ADDR (CONFIG_SYS_IMMR + 0x00F0)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_ADDR (CONFIG_SYS_FSL_SP_ADDR)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR1(CONFIG_SYS_FSL_SP_ADDR)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR2\
+   (CONFIG_SYS_FSL_SP_ADDR + 0x0008)
+#define CONFIG_SYS_FSL_SP_LOOPBACK_DUART   \
+   (CONFIG_SYS_FSL_SP_ADDR + 0x1000)
+
 #define CONFIG_SYS_FSL_DCSR_DDR_ADDR   0x70012c000ULL
 #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR  0x70012d000ULL
 #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR  0x700132000ULL
@@ -88,7 +97,6 @@
 #define CONFIG_MAX_MEM_MAPPED  CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
 
-
 /* IFC */
 #define CONFIG_SYS_FSL_IFC_LE
 
diff --git a/board/freescale/ls2085a/ls2085a.c 
b/board/freescale/ls2085a/ls2085a.c
index 519d61c..a16c2c8 100644
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -12,6 +12,7 @@
 #include asm/io.h
 #include fdt_support.h
 #include libfdt.h
+#include fsl_debug_server.h
 #include fsl-mc/fsl_mc.h
 #include environment.h
 
@@ -79,6 +80,34 @@ void reset_cpu(ulong addr)
 {
 }
 
+#if defined(CONFIG_ARCH_MISC_INIT)
+int arch_misc_init(void)
+{
+#ifdef CONFIG_FSL_DEBUG_SERVER
+   debug_server_init();
+#endif
+
+   return 0;
+}
+#endif
+
+unsigned long get_dram_size_to_hide(void)
+{
+   unsigned long dram_to_hide = 0;
+
+/* Carve the Debug Server private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_DEBUG_SERVER
+   dram_to_hide += debug_server_get_dram_block_size();
+#endif
+
+/* Carve the MC private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_MC_ENET
+   dram_to_hide += mc_get_dram_block_size();
+#endif
+
+   return dram_to_hide;
+}
+
 int board_eth_init(bd_t *bis)
 {
int error = 0;
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 6028cd4..3dd76eb 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_FSL_DEBUG_SERVER) += fsl_debug_server.o
 obj-$(CONFIG_FSL_IIM) += fsl_iim.o
 obj-$(CONFIG_GPIO_LED) += gpio_led.o
 obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
diff --git a/drivers/misc/fsl_debug_server.c b/drivers/misc/fsl_debug_server.c
new file mode 100644
index 000..e080fe6
--- /dev/null
+++ b/drivers/misc/fsl_debug_server.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include asm/io.h
+#include asm/system.h
+#include