Hi Stefan,
On Wed, Jan 06, 2016 at 11:04:44PM -0800, Stefan Agner wrote:
>On 2016-01-04 21:56, Peng Fan wrote:
>> From: Peng Fan
>>
>> In current design, if any peripheral was assigned to both A7 and M4,
>> it will receive ipg_stop or ipg_wait when any of the 2 platforms
>> enter low power mode.
On 2016-01-04 21:56, Peng Fan wrote:
> From: Peng Fan
>
> In current design, if any peripheral was assigned to both A7 and M4,
> it will receive ipg_stop or ipg_wait when any of the 2 platforms
> enter low power mode. We will have a risk that, if A7 enter wait,
> M4 enter stop, peripheral will ha
From: Peng Fan
In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted s
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