Some SOCFPGA platforms require a header be added to
u-boot-spl and a combined spl / u-boot image. The
combined image consists of 4 replicated u-boot-spl
images with the afore mentioned header, and a u-boot
image cat'ed together.
Signed-off-by: Dalon Westergreen <dwest...@gmail.com>
---
Makefile | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/Makefile b/Makefile
index 133d7ac773..6c93c6c129 100644
--- a/Makefile
+++ b/Makefile
@@ -1198,14 +1198,12 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O binary
--pad-to=$(CONFIG_SPL_PAD_TO) \
u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
$(call if_changed,pad_cat)
-ifneq ($(CONFIG_ARCH_SOCFPGA),)
quiet_cmd_socboot = SOCBOOT $@
cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
u-boot.img > $@ || rm -f $@
u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
$(call if_changed,socboot)
-endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
@@ -1518,8 +1516,13 @@ spl/sunxi-spl.bin: spl/u-boot-spl
spl/sunxi-spl-with-ecc.bin: spl/sunxi-spl.bin
@:
-spl/u-boot-spl.sfp: spl/u-boot-spl
- @:
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
+else
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
+endif
+spl/u-boot-spl.sfp: spl/u-boot-spl.bin FORCE
+ $(call if_changed,mkimage)
spl/boot.bin: spl/u-boot-spl
@:
--
2.17.1
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