Re: [U-Boot] [PATCH 3/4] rockchip: dts: rk3399-puma: Add DDR3-1866 timings

2017-06-05 Thread sjg
On 31 May 2017 at 10:16, Philipp Tomsich
 wrote:
> With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
> can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
> with the DDR3-1866 option.
>
> Signed-off-by: Philipp Tomsich 
> ---
>
>  arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi | 1537 
> ++
>  1 file changed, 1537 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi

Reviewed-by: Simon Glass 

Applied to u-boot-rockchip, thanks!
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot


Re: [U-Boot] [PATCH 3/4] rockchip: dts: rk3399-puma: Add DDR3-1866 timings

2017-06-01 Thread Simon Glass
On 31 May 2017 at 10:16, Philipp Tomsich
 wrote:
> With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
> can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
> with the DDR3-1866 option.
>
> Signed-off-by: Philipp Tomsich 
> ---
>
>  arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi | 1537 
> ++
>  1 file changed, 1537 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi

Reviewed-by: Simon Glass 
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot


[U-Boot] [PATCH 3/4] rockchip: dts: rk3399-puma: Add DDR3-1866 timings

2017-05-31 Thread Philipp Tomsich
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
with the DDR3-1866 option.

Signed-off-by: Philipp Tomsich 
---

 arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi | 1537 ++
 1 file changed, 1537 insertions(+)
 create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi 
b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
new file mode 100644
index 000..80e946e
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -0,0 +1,1537 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ {
+rockchip,sdram-params = <
+   0x1
+   0xa
+   0x3
+   0x2
+   0x1
+   0x0
+   0xf
+   0xf
+   1
+   0x80181219
+   0x17050a03
+   0x0002
+   0x6456
+   0x004c
+   0x
+   0x1
+   0xa
+   0x3
+   0x2
+   0x1
+   0x0
+   0xf
+   0xf
+   1
+   0x80181219
+   0x17050a03
+   0x0002
+   0x6456
+   0x004c
+   0x
+   933
+   3
+   2
+   9
+   1
+   0x0600
+   0x
+   0x
+   0x
+   0x
+   0x000a
+   0x
+   0x
+   0x
+   0x000a
+   0x
+   0x
+   0x
+   0x000a
+   0x
+   0x
+   0x0100
+   0x
+   0x0101
+   0x00020100
+   0x0002d976
+   0x00071fa6
+   0x02000200
+   0x091a0200
+   0x00091a00
+   0x0400091a
+   0x2c060004
+   0x210c0820
+   0x202c0600
+   0x00210c08
+   0x08202c06
+   0x0800210c
+   0x0f04
+   0x0501000a
+   0x0f040805
+   0x0501000a
+   0x0f040805
+   0x0501000a
+   0x02030005
+   0x0c0f0c00
+   0x000f0c0f
+   0x14000a0a
+   0x0a0a
+   0x0001
+   0x031c1c1c
+   0x000c0c0c
+   0x
+   0x0301
+   0x1c6a0147
+   0x1c6a0147
+   0x1c6a0147
+   0x
+   0x00060006
+   0x00170006
+   0x00170017
+   0x
+   0x
+   0x
+   0x
+   0x0200
+   0x02000151
+   0x02000151
+   0x0151
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0301
+   0x0001
+   0x
+   0x
+   0x0100
+   0x80104002
+   0x00040003
+   0x00040005
+   0x0003
+   0x00050004
+   0x0004
+   0x00040003
+   0x00040005
+   0x71a8
+   0x38d4
+   0x38d471a8
+   0x71a8
+   0x38d4
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0a0a0a00
+   0x000a0a0a
+   0x00030200
+   0x00040700
+   0x0302
+   0x02000407
+   0x0003
+   0x00030f04
+   0x00070004
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0001
+   0x0001
+   0x20040020
+   0x00200400
+   0x01000400
+   0x0b80
+   0x
+   0x0001
+   0x0002
+   0x000e
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x00bb
+   0x00ea005e
+   0x00ea
+   0x005e00bb
+   0x00ea