Re: [U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Simon Glass]

Hi Mario,

On 18 April 2018 at 02:52, Mario Six  wrote:
> Hi Simon,
>
> On Thu, Apr 12, 2018 at 6:38 PM, Simon Glass  wrote:
>> Hi Mario,
>>
>> On 11 April 2018 at 01:27, Mario Six  wrote:
>>> Hi Simon,
>>>
>>> On Fri, Mar 30, 2018 at 10:41 AM, Simon Glass  wrote:
 Hi Mario,

 On 28 March 2018 at 20:40, Mario Six  wrote:
> Add a driver for the Xilinx LogiCORE DisplayPort IP core.
>
> Signed-off-by: Mario Six 
> ---
>  drivers/video/Kconfig|8 +
>  drivers/video/Makefile   |1 +
>  drivers/video/logicore_dp_dpcd.h |  342 ++
>  drivers/video/logicore_dp_tx.c   | 1974
++
>  drivers/video/logicore_dp_tx.h   |   40 +
>  drivers/video/logicore_dp_tx_regif.h |  365 +++
>  6 files changed, 2730 insertions(+)
>  create mode 100644 drivers/video/logicore_dp_dpcd.h
>  create mode 100644 drivers/video/logicore_dp_tx.c
>  create mode 100644 drivers/video/logicore_dp_tx.h
>  create mode 100644 drivers/video/logicore_dp_tx_regif.h

 Is it possible to have common code with the other DP drivers?

>>>
>>> While the DP transmitters, of course, all do similar things (e.g. they
all
>>> eventually set a lane count), the implementation details differ
greatly, and I
>>> think trying to merge them would only make things more confusing, since
the
>>> drivers tend to be pretty elaborate (looking at the exynos driver, for
>>> example).
>>
>> OK. Are they merged in Linux?
>>
>
> The Linux DP drivers don't share a common code base either (grepping
> "lane_count" in drivers/gpu shows different implementations of lane
setting and
> link training).

OK, well that is suggestive. Perhaps duplicating the code is best.

Regards,
Simon
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Re: [U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Mario Six]

Hi Simon,

On Thu, Apr 12, 2018 at 6:38 PM, Simon Glass  wrote:
> Hi Mario,
>
> On 11 April 2018 at 01:27, Mario Six  wrote:
>> Hi Simon,
>>
>> On Fri, Mar 30, 2018 at 10:41 AM, Simon Glass  wrote:
>>> Hi Mario,
>>>
>>> On 28 March 2018 at 20:40, Mario Six  wrote:
 Add a driver for the Xilinx LogiCORE DisplayPort IP core.

 Signed-off-by: Mario Six 
 ---
  drivers/video/Kconfig|8 +
  drivers/video/Makefile   |1 +
  drivers/video/logicore_dp_dpcd.h |  342 ++
  drivers/video/logicore_dp_tx.c   | 1974 
 ++
  drivers/video/logicore_dp_tx.h   |   40 +
  drivers/video/logicore_dp_tx_regif.h |  365 +++
  6 files changed, 2730 insertions(+)
  create mode 100644 drivers/video/logicore_dp_dpcd.h
  create mode 100644 drivers/video/logicore_dp_tx.c
  create mode 100644 drivers/video/logicore_dp_tx.h
  create mode 100644 drivers/video/logicore_dp_tx_regif.h
>>>
>>> Is it possible to have common code with the other DP drivers?
>>>
>>
>> While the DP transmitters, of course, all do similar things (e.g. they all
>> eventually set a lane count), the implementation details differ greatly, and 
>> I
>> think trying to merge them would only make things more confusing, since the
>> drivers tend to be pretty elaborate (looking at the exynos driver, for
>> example).
>
> OK. Are they merged in Linux?
>

The Linux DP drivers don't share a common code base either (grepping
"lane_count" in drivers/gpu shows different implementations of lane setting and
link training).

> Regards,
> Simon
>

Best regards,
Mario
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Re: [U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Simon Glass]

Hi Mario,

On 11 April 2018 at 01:27, Mario Six  wrote:
> Hi Simon,
>
> On Fri, Mar 30, 2018 at 10:41 AM, Simon Glass  wrote:
>> Hi Mario,
>>
>> On 28 March 2018 at 20:40, Mario Six  wrote:
>>> Add a driver for the Xilinx LogiCORE DisplayPort IP core.
>>>
>>> Signed-off-by: Mario Six 
>>> ---
>>>  drivers/video/Kconfig|8 +
>>>  drivers/video/Makefile   |1 +
>>>  drivers/video/logicore_dp_dpcd.h |  342 ++
>>>  drivers/video/logicore_dp_tx.c   | 1974 
>>> ++
>>>  drivers/video/logicore_dp_tx.h   |   40 +
>>>  drivers/video/logicore_dp_tx_regif.h |  365 +++
>>>  6 files changed, 2730 insertions(+)
>>>  create mode 100644 drivers/video/logicore_dp_dpcd.h
>>>  create mode 100644 drivers/video/logicore_dp_tx.c
>>>  create mode 100644 drivers/video/logicore_dp_tx.h
>>>  create mode 100644 drivers/video/logicore_dp_tx_regif.h
>>
>> Is it possible to have common code with the other DP drivers?
>>
>
> While the DP transmitters, of course, all do similar things (e.g. they all
> eventually set a lane count), the implementation details differ greatly, and I
> think trying to merge them would only make things more confusing, since the
> drivers tend to be pretty elaborate (looking at the exynos driver, for
> example).

OK. Are they merged in Linux?

Regards,
Simon
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Re: [U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Mario Six]

Hi Simon,

On Fri, Mar 30, 2018 at 10:41 AM, Simon Glass  wrote:
> Hi Mario,
>
> On 28 March 2018 at 20:40, Mario Six  wrote:
>> Add a driver for the Xilinx LogiCORE DisplayPort IP core.
>>
>> Signed-off-by: Mario Six 
>> ---
>>  drivers/video/Kconfig|8 +
>>  drivers/video/Makefile   |1 +
>>  drivers/video/logicore_dp_dpcd.h |  342 ++
>>  drivers/video/logicore_dp_tx.c   | 1974 
>> ++
>>  drivers/video/logicore_dp_tx.h   |   40 +
>>  drivers/video/logicore_dp_tx_regif.h |  365 +++
>>  6 files changed, 2730 insertions(+)
>>  create mode 100644 drivers/video/logicore_dp_dpcd.h
>>  create mode 100644 drivers/video/logicore_dp_tx.c
>>  create mode 100644 drivers/video/logicore_dp_tx.h
>>  create mode 100644 drivers/video/logicore_dp_tx_regif.h
>
> Is it possible to have common code with the other DP drivers?
>

While the DP transmitters, of course, all do similar things (e.g. they all
eventually set a lane count), the implementation details differ greatly, and I
think trying to merge them would only make things more confusing, since the
drivers tend to be pretty elaborate (looking at the exynos driver, for
example).

> Regards,
> Simon
>

Best regards,

Mario
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Re: [U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Simon Glass]

Hi Mario,

On 28 March 2018 at 20:40, Mario Six  wrote:
> Add a driver for the Xilinx LogiCORE DisplayPort IP core.
>
> Signed-off-by: Mario Six 
> ---
>  drivers/video/Kconfig|8 +
>  drivers/video/Makefile   |1 +
>  drivers/video/logicore_dp_dpcd.h |  342 ++
>  drivers/video/logicore_dp_tx.c   | 1974 
> ++
>  drivers/video/logicore_dp_tx.h   |   40 +
>  drivers/video/logicore_dp_tx_regif.h |  365 +++
>  6 files changed, 2730 insertions(+)
>  create mode 100644 drivers/video/logicore_dp_dpcd.h
>  create mode 100644 drivers/video/logicore_dp_tx.c
>  create mode 100644 drivers/video/logicore_dp_tx.h
>  create mode 100644 drivers/video/logicore_dp_tx_regif.h

Is it possible to have common code with the other DP drivers?

Regards,
Simon
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[U-Boot] [PATCH 7/7] video_display: Add Xilinx LogiCore DP TX

[Mario Six]

Add a driver for the Xilinx LogiCORE DisplayPort IP core.

Signed-off-by: Mario Six 
---
 drivers/video/Kconfig|8 +
 drivers/video/Makefile   |1 +
 drivers/video/logicore_dp_dpcd.h |  342 ++
 drivers/video/logicore_dp_tx.c   | 1974 ++
 drivers/video/logicore_dp_tx.h   |   40 +
 drivers/video/logicore_dp_tx_regif.h |  365 +++
 6 files changed, 2730 insertions(+)
 create mode 100644 drivers/video/logicore_dp_dpcd.h
 create mode 100644 drivers/video/logicore_dp_tx.c
 create mode 100644 drivers/video/logicore_dp_tx.h
 create mode 100644 drivers/video/logicore_dp_tx_regif.h

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2fc0defcd0..e1aab195ce 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -425,6 +425,14 @@ config ATMEL_HLCD
help
   HLCDC supports video output to an attached LCD panel.
 
+config LOGICORE_DP_TX
+   bool "Enable Logicore DP TX driver"
+   depends on DISPLAY
+   help
+ Enable the driver for the transmitter part of the Xilinx LogiCORE
+ DisplayPort, a IP core for Xilinx FPGAs that implements a DisplayPort
+ video interface as defined by VESA DisplayPort v1.2.
+
 config VIDEO_BROADWELL_IGD
bool "Enable Intel Broadwell integrated graphics device"
depends on X86
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index dfafe08fc5..0548b2090f 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
 
 obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
 obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
+obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o
 obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
 obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
 obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
diff --git a/drivers/video/logicore_dp_dpcd.h b/drivers/video/logicore_dp_dpcd.h
new file mode 100644
index 00..6858294551
--- /dev/null
+++ b/drivers/video/logicore_dp_dpcd.h
@@ -0,0 +1,342 @@
+/*
+ * logicore_dp_dpcd.h
+ *
+ * DPCD interface definition for XILINX LogiCore DisplayPort v6.1
+ * based on Xilinx dp_v3_1 driver sources
+ *
+ * (C) Copyright 2016
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __GDSYS_LOGICORE_DP_DPCD_H__
+#define __GDSYS_LOGICORE_DP_DPCD_H__
+
+/* receiver capability field */
+#define DPCD_REV   0x0
+#define DPCD_MAX_LINK_RATE 0x1
+#define DPCD_MAX_LANE_COUNT0x2
+#define DPCD_MAX_DOWNSPREAD0x3
+#define DPCD_NORP_PWR_V_CAP0x4
+#define DPCD_DOWNSP_PRESENT0x5
+#define DPCD_ML_CH_CODING_CAP  0x6
+#define DPCD_DOWNSP_COUNT_MSA_OUI  0x7
+#defineDPCD_RX_PORT0_CAP_0 0x8
+#defineDPCD_RX_PORT0_CAP_1 0x9
+#defineDPCD_RX_PORT1_CAP_0 0xA
+#defineDPCD_RX_PORT1_CAP_1 0xB
+#define DPCD_I2C_SPEED_CTL_CAP 0xC
+#define DPCD_EDP_CFG_CAP   0xD
+#define DPCD_TRAIN_AUX_RD_INTERVAL 0xE
+#define DPCD_ADAPTER_CAP   0xF
+#define DPCD_FAUX_CAP  0x00020
+#define DPCD_MSTM_CAP  0x00021
+#define DPCD_NUM_AUDIO_EPS 0x00022
+#defineDPCD_AV_GRANULARITY 0x00023
+#define DPCD_AUD_DEC_LAT_7_0   0x00024
+#define DPCD_AUD_DEC_LAT_15_8  0x00025
+#define DPCD_AUD_PP_LAT_7_00x00026
+#define DPCD_AUD_PP_LAT_15_8   0x00027
+#define DPCD_VID_INTER_LAT 0x00028
+#define DPCD_VID_PROG_LAT  0x00029
+#define DPCD_REP_LAT   0x0002A
+#define DPCD_AUD_DEL_INS_7_0   0x0002B
+#define DPCD_AUD_DEL_INS_15_8  0x0002C
+#define DPCD_AUD_DEL_INS_23_16 0x0002D
+#define DPCD_GUID  0x00030
+#define DPCD_RX_GTC_VALUE_7_0  0x00054
+#define DPCD_RX_GTC_VALUE_15_8 0x00055
+#define DPCD_RX_GTC_VALUE_23_16