Re: [U-Boot] [PATCH RESEND] arm/arm64: Move barrier instructions into separate header

[Tom Rini]

On Thu, May 12, 2016 at 12:14:41PM +0100, Andre Przywara wrote:

> Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
> barrier") broke compilation for the Pine64, as dram_helper.c now
> includes , which does not compile on arm64.
> 
> Fix this by moving all barrier instructions into a separate header
> file, which can easily be shared between arm and arm64.
> Also extend the inline assembly to take the "sy" argument, which is
> optional for ARMv7, but mandatory for v8.
> 
> This fixes compilation for 64-bit sunxi boards (Pine64).
> 
> Acked-by: Ian Campbell 
> Signed-off-by: Andre Przywara 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH RESEND] arm/arm64: Move barrier instructions into separate header

[Ian Campbell]

On Thu, 2016-05-12 at 12:14 +0100, Andre Przywara wrote:
> ---
> Hi Hans, Ian,
> 
> can I get an ACK on this please?

I'm afraid that given:
[...]
>  arch/arm/include/asm/armv7.h   | 21 +-
>  arch/arm/include/asm/barriers.h| 44 
> ++
>  arch/arm/mach-sunxi/dram_helpers.c |  2 +-

It's not really our Ack you need, but the overall arm maintainer's
(Albert) ack. (AFAIK there is no separate armv8 maintainer.)

FIW for the sunxi hunk:
Acked-by: Ian Campbell 

Although it is so trivial as to be hardly worth it.

Ian.
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[U-Boot] [PATCH RESEND] arm/arm64: Move barrier instructions into separate header

[Andre Przywara]

Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
barrier") broke compilation for the Pine64, as dram_helper.c now
includes , which does not compile on arm64.

Fix this by moving all barrier instructions into a separate header
file, which can easily be shared between arm and arm64.
Also extend the inline assembly to take the "sy" argument, which is
optional for ARMv7, but mandatory for v8.

This fixes compilation for 64-bit sunxi boards (Pine64).

Signed-off-by: Andre Przywara 
---
Hi Hans, Ian,

can I get an ACK on this please? I don't see it moving forward, but it
breaks build for Pine64 and it's clearly a regression, since 2016.05-rc3 works.
But "buildman armv8" gives me this with the current origin/master:
===
arch64:  +   pine64_plus  
+In file included from arch/arm/include/asm/armv7.h:61:0,
+ from arch/arm/mach-sunxi/dram_helpers.c:10:
+ #define __arch_getl(a)   (*(volatile unsigned int *)(a))
+^
+arch/arm/include/asm/io.h:151:31: note: in expansion of macro '__arch_getl'
+ #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
+   ^
+arch/arm/include/asm/armv7.h:115:9: note: in expansion of macro 'readl'
+  temp = readl(address);
+ ^
+{standard input}: Assembler messages:
+{standard input}:102: Error: unknown mnemonic `mcr' -- `mcr p15,0,x2,c7,c10,4'
+make[2]: *** [arch/arm/mach-sunxi/dram_helpers.o] Error 1
+make[1]: *** [arch/arm/mach-sunxi] Error 2
+make: *** [sub-make] Error 2
w+arch/arm/include/asm/armv7.h: In function 'v7_enable_smp':
w+arch/arm/include/asm/io.h:72:28: warning: cast to pointer from integer of 
different size [-Wint-to-pointer-cast]
   3701 /38 ls1043ardb_SECURE_BOOT
===

So it's the only armv8 board that fails :-(
As I stated in my other mail from last week, buildman succeeded for
"arm" with this patch as well - as least for those boards my hardfp
toolchain could build.

Please excuse my ignorance if it landed in some tree already, but I
couldn't find it and patchwork doesn't give me a hint either.

Cheers,
Andre.

 arch/arm/include/asm/armv7.h   | 21 +-
 arch/arm/include/asm/barriers.h| 44 ++
 arch/arm/mach-sunxi/dram_helpers.c |  2 +-
 3 files changed, 46 insertions(+), 21 deletions(-)
 create mode 100644 arch/arm/include/asm/barriers.h

diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 30e7939..423fc70 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -59,26 +59,7 @@
 #ifndef __ASSEMBLY__
 #include 
 #include 
-
-/*
- * CP15 Barrier instructions
- * Please note that we have separate barrier instructions in ARMv7
- * However, we use the CP15 based instructtions because we use
- * -march=armv5 in U-Boot
- */
-#define CP15ISBasm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" 
(0))
-#define CP15DSBasm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" 
(0))
-#define CP15DMBasm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" 
(0))
-
-#ifdef __ARM_ARCH_7A__
-#define ISBasm volatile ("isb" : : : "memory")
-#define DSBasm volatile ("dsb" : : : "memory")
-#define DMBasm volatile ("dmb" : : : "memory")
-#else
-#define ISBCP15ISB
-#define DSBCP15DSB
-#define DMBCP15DMB
-#endif
+#include 
 
 /*
  * Workaround for ARM errata # 798870
diff --git a/arch/arm/include/asm/barriers.h b/arch/arm/include/asm/barriers.h
new file mode 100644
index 000..37870f9
--- /dev/null
+++ b/arch/arm/include/asm/barriers.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * ARM and ARM64 barrier instructions
+ * split from armv7.h to allow sharing between ARM and ARM64
+ *
+ * Original copyright in armv7.h was:
+ * (C) Copyright 2010 Texas Instruments,  Aneesh V 
+ *
+ * Much of the original barrier code was contributed by:
+ *   Valentine Barshak 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef __BARRIERS_H__
+#define __BARRIERS_H__
+
+#ifndef __ASSEMBLY__
+
+#ifndef CONFIG_ARM64
+/*
+ * CP15 Barrier instructions
+ * Please note that we have separate barrier instructions in ARMv7
+ * However, we use the CP15 based instructtions because we use
+ * -march=armv5 in U-Boot
+ */
+#define CP15ISBasm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" 
(0))
+#define CP15DSBasm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" 
(0))
+#define CP15DMBasm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" 
(0))
+
+#endif /* !CONFIG_ARM64 */
+
+#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64)
+#define ISBasm volatile ("isb sy" : : : "memory")
+#define DSBasm volatile ("dsb sy" : : : "memory")
+#define DMBasm volatile ("dmb sy" : : : "memory")
+#else
+#define ISBCP15ISB
+#define DSBCP15DSB
+#define DMBCP15DMB
+#endif
+
+#endif