Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Andy Shevchenko]

On Fri, Feb 17, 2017 at 3:22 AM, Bin Meng  wrote:
> On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko
>  wrote:
>> On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
>>> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>>>  wrote:

>> This code is executed when neither of option is defined. For Intel MID
>> we do *not* need to have this code executed.
>>
>> I dunno how it possible can work otherwise (ucode_base is not defined).

> OK, is this common feature for all Intel MID device? This mp_init.c is
> conditionally built by CONFIG_SMP. So I believe this Tangier SoC is a
> multi-core processor, but does not have any microcode.

Correct.
I will leave this patch as is in v3 which I'm about to submit.

-- 
With Best Regards,
Andy Shevchenko
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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Bin Meng]

Hi Andy,

On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko
 wrote:
> On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
>> Hi Andy,
>>
>> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>>  wrote:
>> > There is no microcode update available for SoCs used on Intel MID
>> > platforms.
>> >
>> > Use conditional to bypass it.
>> >
>> > Signed-off-by: Andy Shevchenko 
>> > ---
>> >  arch/x86/cpu/mp_init.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
>> > index 988073cc79..4e2f000f75 100644
>> > --- a/arch/x86/cpu/mp_init.c
>> > +++ b/arch/x86/cpu/mp_init.c
>> > @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t
>> > **ap_countp, int num_cpus)
>> > if (!stack)
>> > return -ENOMEM;
>> > params->stack_top = (u32)(stack + size);
>> > -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
>> > +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) &&
>> > !defined(CONFIG_INTEL_MID)
>> > params->microcode_ptr = ucode_base;
>> > debug("Microcode at %x\n", params->microcode_ptr);
>> >  #endif
>>
>> Is this patch necessary? If Intel MID does not define CONFIG_QEMU or
>> CONFIG_HAVE_FSP, current logic should work.
>
> This code is executed when neither of option is defined. For Intel MID
> we do *not* need to have this code executed.
>
> I dunno how it possible can work otherwise (ucode_base is not defined).
>

OK, is this common feature for all Intel MID device? This mp_init.c is
conditionally built by CONFIG_SMP. So I believe this Tangier SoC is a
multi-core processor, but does not have any microcode.

Regards,
Bin
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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Simon Glass]

On 14 February 2017 at 07:47, Andy Shevchenko
 wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/cpu/mp_init.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Andy Shevchenko]

On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
> Hi Andy,
> 
> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>  wrote:
> > There is no microcode update available for SoCs used on Intel MID
> > platforms.
> > 
> > Use conditional to bypass it.
> > 
> > Signed-off-by: Andy Shevchenko 
> > ---
> >  arch/x86/cpu/mp_init.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
> > index 988073cc79..4e2f000f75 100644
> > --- a/arch/x86/cpu/mp_init.c
> > +++ b/arch/x86/cpu/mp_init.c
> > @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t
> > **ap_countp, int num_cpus)
> > if (!stack)
> > return -ENOMEM;
> > params->stack_top = (u32)(stack + size);
> > -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
> > +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) &&
> > !defined(CONFIG_INTEL_MID)
> > params->microcode_ptr = ucode_base;
> > debug("Microcode at %x\n", params->microcode_ptr);
> >  #endif
> 
> Is this patch necessary? If Intel MID does not define CONFIG_QEMU or
> CONFIG_HAVE_FSP, current logic should work.

This code is executed when neither of option is defined. For Intel MID
we do *not* need to have this code executed.

I dunno how it possible can work otherwise (ucode_base is not defined).

-- 
Andy Shevchenko 
Intel Finland Oy
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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Bin Meng]

Hi Andy,

On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
 wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/cpu/mp_init.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
> index 988073cc79..4e2f000f75 100644
> --- a/arch/x86/cpu/mp_init.c
> +++ b/arch/x86/cpu/mp_init.c
> @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int 
> num_cpus)
> if (!stack)
> return -ENOMEM;
> params->stack_top = (u32)(stack + size);
> -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
> +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && 
> !defined(CONFIG_INTEL_MID)
> params->microcode_ptr = ucode_base;
> debug("Microcode at %x\n", params->microcode_ptr);
>  #endif

Is this patch necessary? If Intel MID does not define CONFIG_QEMU or
CONFIG_HAVE_FSP, current logic should work.

Regards,
Bin
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[U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Andy Shevchenko]

There is no microcode update available for SoCs used on Intel MID
platforms.

Use conditional to bypass it.

Signed-off-by: Andy Shevchenko 
---
 arch/x86/cpu/mp_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 988073cc79..4e2f000f75 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int 
num_cpus)
if (!stack)
return -ENOMEM;
params->stack_top = (u32)(stack + size);
-#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
+#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && 
!defined(CONFIG_INTEL_MID)
params->microcode_ptr = ucode_base;
debug("Microcode at %x\n", params->microcode_ptr);
 #endif
-- 
2.11.0

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