Re: [U-Boot] [PATCH v2] EXYNOS: SMDK5250: Support all 4 UARTs
Dear Doug Anderson, On 20 February 2012 16:06, Chander Kashyap chander.kash...@linaro.org wrote: On 13 February 2012 23:08, Doug Anderson diand...@chromium.org wrote: This properly configures the mux to enable all UARTs. This also fixes things so that we don't configure balls XUCTSN_1 and XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't connected. Signed-off-by: Doug Anderson diand...@chromium.org --- Changes in v2: - Removed #ifdefs and tested SERIAL_MULTI by setting stdin/out/err to s5pserN and validating that serial moved. board/samsung/smdk5250/smdk5250.c | 44 +++- 1 files changed, 42 insertions(+), 2 deletions(-) applied to u-boot-samsung. Thanks, Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] EXYNOS: SMDK5250: Support all 4 UARTs
On 13 February 2012 23:08, Doug Anderson diand...@chromium.org wrote:
This properly configures the mux to enable all UARTs.
This also fixes things so that we don't configure balls XUCTSN_1 and
XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't
connected.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Removed #ifdefs and tested SERIAL_MULTI by setting stdin/out/err to
s5pserN and validating that serial moved.
board/samsung/smdk5250/smdk5250.c | 44 +++-
1 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 928c08f..32786e2 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -224,11 +224,51 @@ static void board_uart_init(void)
(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
int i;
- /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x */
- for (i = 4; i 8; i++) {
+ /*
+ * UART0 GPIOs : GPA0CON[3:0] 0x
+ * Must set CFG17 switches to select UART0 to use.
+ */
+ for (i = 0; i = 3; i++) {
s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
}
+
+ /*
+ * UART1 GPIOs : GPA0CON[5:4] 0x22
+ * Must set CFG17 switches to select UART1 to use.
+ *
+ * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+ * in order to use them (so that those pins can be used for I2C).
+ */
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * UART2 GPIOs : GPA1CON[1:0] 0x22
+ * Must set CFG17 switches to select UART2 to use.
+ *
+ * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+ * in order to use them (so that those pins can be used for I2C).
+ */
+ for (i = 0; i = 1; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * UART3 GPIOs : GPA1CON[5:4] 0x22
+ * Must set CFG16 switches to select UART3 to use.
+ */
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * There's no mux for UART4--it's internal only
+ */
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
--
1.7.7.3
Acked-by: Chander kashyap chander.kash...@linaro.org
--
with warm regards,
Chander Kashyap
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[U-Boot] [PATCH v2] EXYNOS: SMDK5250: Support all 4 UARTs
This properly configures the mux to enable all UARTs.
This also fixes things so that we don't configure balls XUCTSN_1 and
XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't
connected.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Removed #ifdefs and tested SERIAL_MULTI by setting stdin/out/err to
s5pserN and validating that serial moved.
board/samsung/smdk5250/smdk5250.c | 44 +++-
1 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 928c08f..32786e2 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -224,11 +224,51 @@ static void board_uart_init(void)
(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
int i;
- /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x */
- for (i = 4; i 8; i++) {
+ /*
+* UART0 GPIOs : GPA0CON[3:0] 0x
+* Must set CFG17 switches to select UART0 to use.
+*/
+ for (i = 0; i = 3; i++) {
s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
}
+
+ /*
+* UART1 GPIOs : GPA0CON[5:4] 0x22
+* Must set CFG17 switches to select UART1 to use.
+*
+* This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+* in order to use them (so that those pins can be used for I2C).
+*/
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+* UART2 GPIOs : GPA1CON[1:0] 0x22
+* Must set CFG17 switches to select UART2 to use.
+*
+* This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+* in order to use them (so that those pins can be used for I2C).
+*/
+ for (i = 0; i = 1; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+* UART3 GPIOs : GPA1CON[5:4] 0x22
+* Must set CFG16 switches to select UART3 to use.
+*/
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+* There's no mux for UART4--it's internal only
+*/
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
--
1.7.7.3
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