Hi Frieder,
On Wed, May 29, 2019 at 6:14 PM Schrempf Frieder
wrote:
>
> Hi Jagan,
>
> On 29.05.19 13:06, Jagan Teki wrote:
> > On Fri, Apr 26, 2019 at 6:12 PM Rajat Srivastava
> > wrote:
> >>
> >> Previously, the SPI framework supported only 3-byte opcodes
> >> but the FSL QSPI controller used
Hi Jagan,
On 29.05.19 13:06, Jagan Teki wrote:
> On Fri, Apr 26, 2019 at 6:12 PM Rajat Srivastava
> wrote:
>>
>> Previously, the SPI framework supported only 3-byte opcodes
>> but the FSL QSPI controller used to deal with flashes that
>> work with 4-byte opcodes. As a workaround to resolve this,
On Fri, Apr 26, 2019 at 6:12 PM Rajat Srivastava
wrote:
>
> Previously, the SPI framework supported only 3-byte opcodes
> but the FSL QSPI controller used to deal with flashes that
> work with 4-byte opcodes. As a workaround to resolve this,
> for every 3-byte opcodes sent by framework FSL QSPI
Previously, the SPI framework supported only 3-byte opcodes
but the FSL QSPI controller used to deal with flashes that
work with 4-byte opcodes. As a workaround to resolve this,
for every 3-byte opcodes sent by framework FSL QSPI driver
used to explicitly send corresponding 4-byte opcodes.
Now
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