+int timer_init(void)
+{
+ u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+ u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+ unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+ /* Update with accurate clock frequency */
+ asm
Hi,
On Thu, Mar 19, 2015 at 08:34:22PM +, York Sun wrote:
The timer clock is system clock divided by 4, not fixed 12MHz. This is
common to the SoC, not board specific.
Signed-off-by: York Sun york...@freescale.com
---
Changes in v2:
Fix CNTFRQ for secondary cores when
On 03/20/2015 10:34 AM, Mark Rutland wrote:
Hi,
On Thu, Mar 19, 2015 at 08:34:22PM +, York Sun wrote:
The timer clock is system clock divided by 4, not fixed 12MHz. This is
common to the SoC, not board specific.
Signed-off-by: York Sun york...@freescale.com
---
Changes in v2:
The timer clock is system clock divided by 4, not fixed 12MHz. This is
common to the SoC, not board specific.
Signed-off-by: York Sun york...@freescale.com
---
Changes in v2:
Fix CNTFRQ for secondary cores when COUNTER_FREQUENCY_REAL is defined.
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