On Wed, 2019-03-06 at 19:20 -0800, Atish Patra wrote:
> On 3/5/19 2:54 PM, Lukas Auer wrote:
> > Harts on RISC-V boot independently, U-Boot is responsible for
> > managing
> > them. Functions are called on other harts with smp_call_function(),
> > which sends inter-processor interrupts (IPIs) to
On Wed, Mar 6, 2019 at 6:54 AM Lukas Auer
wrote:
>
> Harts on RISC-V boot independently, U-Boot is responsible for managing
> them. Functions are called on other harts with smp_call_function(),
> which sends inter-processor interrupts (IPIs) to all other available
> harts. Available harts are
On 3/5/19 2:54 PM, Lukas Auer wrote:
Harts on RISC-V boot independently, U-Boot is responsible for managing
them. Functions are called on other harts with smp_call_function(),
which sends inter-processor interrupts (IPIs) to all other available
harts. Available harts are those marked as
> -Original Message-
> From: Lukas Auer
> Sent: Wednesday, March 6, 2019 4:23 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra ; Anup Patel
> ; Bin Meng ; Andreas
> Schwab ; Palmer Dabbelt ;
> Alexander Graf ; Lukas Auer
> ; Anup Patel ; Rick
> Chen
> Subject: [PATCH v2 1/9] riscv: add
Harts on RISC-V boot independently, U-Boot is responsible for managing
them. Functions are called on other harts with smp_call_function(),
which sends inter-processor interrupts (IPIs) to all other available
harts. Available harts are those marked as available in the device tree
and present in the
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