subject:"\[U\-Boot\] \[PATCH v2 2\/2\] EXYNOS4\: Add ORIGEN

Re: [U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

2012-12-16 Thread Jeong-Hyeon Kim

Dear Minky Kang,

Thanks for your concern.
According to your suggestion, I will fix it.

BRs,
JHKIM

2012년 12월 15일 14:56, Minkyu Kang 쓴 글:
 Dear Jeong-Hyeon Kim,

 On 13/12/12 19:37, Jeong-Hyeon Kim wrote:
 ORIGEN_QUAD board is based on Samsung's Exynos4412 SoC.

 Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
 ---
  Makefile  |2 +-
  board/samsung/origen_quad/Makefile|   59 ++
  board/samsung/origen_quad/boot.c  |   72 +++
  board/samsung/origen_quad/clock.c |  103 ++
  board/samsung/origen_quad/dmc.c   |  163 
  board/samsung/origen_quad/lowlevel_init.S |  151 +++
  board/samsung/origen_quad/origen_quad.c   |  163 
  board/samsung/origen_quad/setup.h |  300 
 +
  boards.cfg|1 +
  include/configs/origen_quad.h |  179 +
  tools/Makefile|2 +
  11 files changed, 1194 insertions(+), 1 deletion(-)
  create mode 100644 board/samsung/origen_quad/Makefile
  create mode 100644 board/samsung/origen_quad/boot.c
  create mode 100644 board/samsung/origen_quad/clock.c
  create mode 100644 board/samsung/origen_quad/dmc.c
  create mode 100644 board/samsung/origen_quad/lowlevel_init.S
  create mode 100644 board/samsung/origen_quad/origen_quad.c
  create mode 100644 board/samsung/origen_quad/setup.h
  create mode 100644 include/configs/origen_quad.h
 missing MAINTAINER entry.

 +void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}
 diff --git a/board/samsung/origen_quad/clock.c 
 b/board/samsung/origen_quad/clock.c
 new file mode 100644
 index 000..7570039
 --- /dev/null
 +++ b/board/samsung/origen_quad/clock.c
 @@ -0,0 +1,103 @@
 +/*
 + * Copyright (C) 2012 Samsung Electronics
 + *BR
 + * Copyright (C) 2012 Insignal
 + *
 + * Clock setup for the Insignal OrigenQUAD board (Exynos4x12)
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + */
 +
 +#include config.h
 +#include asm/io.h
 +#include asm/arch/cpu.h
 +#include asm/arch/clock.h
 +#include setup.h
 +
 +void clock_ctrl_init(void)
 +{
 +struct exynos4x12_clock *clk =
 +(struct exynos4x12_clock *)EXYNOS4_CLOCK_BASE;
 please use samsung_get_base_clock() function.

 +
 +/* CLK_SRC_CPU */
 +writel(0x, clk-src_cpu);
 +sdelay(0x1);
 +
 +/* CLK_DIV_DMC */
 +writel(CLK_DIV_DMC0_VAL, clk-div_dmc0);
 +writel(CLK_DIV_DMC1_VAL, clk-div_dmc1);
 +
 +/* CLK_SRC_TOP */
 +writel(CLK_SRC_TOP0_VAL, clk-src_top0);
 +writel(CLK_SRC_TOP1_VAL, clk-src_top1);
 +sdelay(0x1);
 +writel(CLK_DIV_TOP_VAL, clk-div_top);
 +
 +/* LEFTBUS */
 +writel(CLK_SRC_LEFTBUS_VAL, clk-src_leftbus);
 +sdelay(0x1);
 +writel(CLK_DIV_LEFTBUS_VAL, clk-div_leftbus);
 +/* RIGHTBUS */
 +writel(CLK_SRC_RIGHTBUS_VAL, clk-src_rightbus);
 +sdelay(0x1);
 +writel(CLK_DIV_RIGHTBUS_VAL, clk-div_rightbus);
 +
 +/* PLL locktime */
 +writel(APLL_LOCK_VAL, clk-apll_lock);
 +writel(MPLL_LOCK_VAL, clk-mpll_lock);
 +writel(EPLL_LOCK_VAL, clk-epll_lock);
 +writel(VPLL_LOCK_VAL, clk-vpll_lock);
 +
 +/* CLK_DIV_CPU0/1 */
 +writel(CLK_DIV_CPU0_VAL, clk-div_cpu0);
 +writel(CLK_DIV_CPU1_VAL, clk-div_cpu1);
 +
 +/* APLL */
 +writel(APLL_CON1_VAL, clk-apll_con1);
 +writel(APLL_CON0_VAL, clk-apll_con0);
 +/* MPLL */
 +writel(MPLL_CON1_VAL, clk-mpll_con1);
 +writel(MPLL_CON0_VAL, clk-mpll_con0);
 +/* EPLL */
 +writel(EPLL_CON2_VAL, clk-epll_con2);
 +writel(EPLL_CON1_VAL, clk-epll_con1);
 +writel(EPLL_CON0_VAL, clk-epll_con0);
 +/* VPLL */
 +writel(VPLL_CON2_VAL, clk-vpll_con2);
 +writel(VPLL_CON1_VAL, clk-vpll_con1);
 +writel(VPLL_CON0_VAL, clk-vpll_con0);
 +sdelay(0x4);
 +
 +writel(CLK_SRC_CPU_VAL, clk-src_cpu);
 +writel(CLK_SRC_DMC_VAL, clk-src_dmc);
 +writel(CLK_SRC_TOP0_VAL, clk-src_top0);
 +writel(CLK_SRC_TOP1_VAL, clk-src_top1);
 +sdelay(0x1);
 +
 +/* UART */
 +writel(CLK_SRC_PERIL0_VAL, clk-src_peril0);
 +writel(CLK_DIV_PERIL0_VAL, clk-div_peril0);
 +

Re: [U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

2012-12-14 Thread Minkyu Kang

Dear Jeong-Hyeon Kim,

On 13/12/12 19:37, Jeong-Hyeon Kim wrote:
 ORIGEN_QUAD board is based on Samsung's Exynos4412 SoC.
 
 Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
 ---
  Makefile  |2 +-
  board/samsung/origen_quad/Makefile|   59 ++
  board/samsung/origen_quad/boot.c  |   72 +++
  board/samsung/origen_quad/clock.c |  103 ++
  board/samsung/origen_quad/dmc.c   |  163 
  board/samsung/origen_quad/lowlevel_init.S |  151 +++
  board/samsung/origen_quad/origen_quad.c   |  163 
  board/samsung/origen_quad/setup.h |  300 
 +
  boards.cfg|1 +
  include/configs/origen_quad.h |  179 +
  tools/Makefile|2 +
  11 files changed, 1194 insertions(+), 1 deletion(-)
  create mode 100644 board/samsung/origen_quad/Makefile
  create mode 100644 board/samsung/origen_quad/boot.c
  create mode 100644 board/samsung/origen_quad/clock.c
  create mode 100644 board/samsung/origen_quad/dmc.c
  create mode 100644 board/samsung/origen_quad/lowlevel_init.S
  create mode 100644 board/samsung/origen_quad/origen_quad.c
  create mode 100644 board/samsung/origen_quad/setup.h
  create mode 100644 include/configs/origen_quad.h

missing MAINTAINER entry.

 
 +void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}
 diff --git a/board/samsung/origen_quad/clock.c 
 b/board/samsung/origen_quad/clock.c
 new file mode 100644
 index 000..7570039
 --- /dev/null
 +++ b/board/samsung/origen_quad/clock.c
 @@ -0,0 +1,103 @@
 +/*
 + * Copyright (C) 2012 Samsung Electronics
 + *
 + * Copyright (C) 2012 Insignal
 + *
 + * Clock setup for the Insignal OrigenQUAD board (Exynos4x12)
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + */
 +
 +#include config.h
 +#include asm/io.h
 +#include asm/arch/cpu.h
 +#include asm/arch/clock.h
 +#include setup.h
 +
 +void clock_ctrl_init(void)
 +{
 + struct exynos4x12_clock *clk =
 + (struct exynos4x12_clock *)EXYNOS4_CLOCK_BASE;

please use samsung_get_base_clock() function.

 +
 + /* CLK_SRC_CPU */
 + writel(0x, clk-src_cpu);
 + sdelay(0x1);
 +
 + /* CLK_DIV_DMC */
 + writel(CLK_DIV_DMC0_VAL, clk-div_dmc0);
 + writel(CLK_DIV_DMC1_VAL, clk-div_dmc1);
 +
 + /* CLK_SRC_TOP */
 + writel(CLK_SRC_TOP0_VAL, clk-src_top0);
 + writel(CLK_SRC_TOP1_VAL, clk-src_top1);
 + sdelay(0x1);
 + writel(CLK_DIV_TOP_VAL, clk-div_top);
 +
 + /* LEFTBUS */
 + writel(CLK_SRC_LEFTBUS_VAL, clk-src_leftbus);
 + sdelay(0x1);
 + writel(CLK_DIV_LEFTBUS_VAL, clk-div_leftbus);
 + /* RIGHTBUS */
 + writel(CLK_SRC_RIGHTBUS_VAL, clk-src_rightbus);
 + sdelay(0x1);
 + writel(CLK_DIV_RIGHTBUS_VAL, clk-div_rightbus);
 +
 + /* PLL locktime */
 + writel(APLL_LOCK_VAL, clk-apll_lock);
 + writel(MPLL_LOCK_VAL, clk-mpll_lock);
 + writel(EPLL_LOCK_VAL, clk-epll_lock);
 + writel(VPLL_LOCK_VAL, clk-vpll_lock);
 +
 + /* CLK_DIV_CPU0/1 */
 + writel(CLK_DIV_CPU0_VAL, clk-div_cpu0);
 + writel(CLK_DIV_CPU1_VAL, clk-div_cpu1);
 +
 + /* APLL */
 + writel(APLL_CON1_VAL, clk-apll_con1);
 + writel(APLL_CON0_VAL, clk-apll_con0);
 + /* MPLL */
 + writel(MPLL_CON1_VAL, clk-mpll_con1);
 + writel(MPLL_CON0_VAL, clk-mpll_con0);
 + /* EPLL */
 + writel(EPLL_CON2_VAL, clk-epll_con2);
 + writel(EPLL_CON1_VAL, clk-epll_con1);
 + writel(EPLL_CON0_VAL, clk-epll_con0);
 + /* VPLL */
 + writel(VPLL_CON2_VAL, clk-vpll_con2);
 + writel(VPLL_CON1_VAL, clk-vpll_con1);
 + writel(VPLL_CON0_VAL, clk-vpll_con0);
 + sdelay(0x4);
 +
 + writel(CLK_SRC_CPU_VAL, clk-src_cpu);
 + writel(CLK_SRC_DMC_VAL, clk-src_dmc);
 + writel(CLK_SRC_TOP0_VAL, clk-src_top0);
 + writel(CLK_SRC_TOP1_VAL, clk-src_top1);
 + sdelay(0x1);
 +
 + /* UART */
 + writel(CLK_SRC_PERIL0_VAL, clk-src_peril0);
 + writel(CLK_DIV_PERIL0_VAL, clk-div_peril0);
 +
 + /* for IROM */
 + /* CLK_DIV_FSYS2 */
 + writel(0x000F,

[U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

2012-12-13 Thread Jeong-Hyeon Kim

ORIGEN_QUAD board is based on Samsung's Exynos4412 SoC.

Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
 Makefile  |2 +-
 board/samsung/origen_quad/Makefile|   59 ++
 board/samsung/origen_quad/boot.c  |   72 +++
 board/samsung/origen_quad/clock.c |  103 ++
 board/samsung/origen_quad/dmc.c   |  163 
 board/samsung/origen_quad/lowlevel_init.S |  151 +++
 board/samsung/origen_quad/origen_quad.c   |  163 
 board/samsung/origen_quad/setup.h |  300 +
 boards.cfg|1 +
 include/configs/origen_quad.h |  179 +
 tools/Makefile|2 +
 11 files changed, 1194 insertions(+), 1 deletion(-)
 create mode 100644 board/samsung/origen_quad/Makefile
 create mode 100644 board/samsung/origen_quad/boot.c
 create mode 100644 board/samsung/origen_quad/clock.c
 create mode 100644 board/samsung/origen_quad/dmc.c
 create mode 100644 board/samsung/origen_quad/lowlevel_init.S
 create mode 100644 board/samsung/origen_quad/origen_quad.c
 create mode 100644 board/samsung/origen_quad/setup.h
 create mode 100644 include/configs/origen_quad.h

diff --git a/Makefile b/Makefile
index 44db889..c69f740 100644
--- a/Makefile
+++ b/Makefile
@@ -823,7 +823,7 @@ clean:
   $(obj)tools/gdb/{astest,gdbcont,gdbsend}   \
   $(obj)tools/gen_eth_addr$(obj)tools/img2srec   \
   $(obj)tools/mk{env,}image   $(obj)tools/mpc86x_clk \
-  $(obj)tools/mk{smdk5250,}spl   \
+  $(obj)tools/mk{$(SOC),$(BOARD),}spl\
   $(obj)tools/mxsboot\
   $(obj)tools/ncb $(obj)tools/ubsha1 \
   $(obj)tools/kernel-doc/docproc
diff --git a/board/samsung/origen_quad/Makefile 
b/board/samsung/origen_quad/Makefile
new file mode 100644
index 000..c24c921
--- /dev/null
+++ b/board/samsung/origen_quad/Makefile
@@ -0,0 +1,59 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+#
+# Copyright (C) 2012 Insignal
+#
+# Makefile for the Insignal OrigenQUAD board (Exynos4x12)
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+SOBJS  := lowlevel_init.o
+
+COBJS  := clock.o
+COBJS  += dmc.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  += origen_quad.o
+else
+COBJS  += boot.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all:   $(ALL)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
\ No newline at end of file
diff --git a/board/samsung/origen_quad/boot.c b/board/samsung/origen_quad/boot.c
new file mode 100644
index 000..53bbe83
--- /dev/null
+++ b/board/samsung/origen_quad/boot.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Copyright (C) 2012 Insignal
+ *
+ * Board initialize for the Insignal OrigenQUAD board (Exynos4x12)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+

Re: [U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

Re: [U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

[U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

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