Re: [U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration
+Wolfgang On 18 May 2015 at 19:40, Bin Meng bmeng...@gmail.com wrote: Hi Simon, Reply this thread to the v2 patch. On Tue, May 19, 2015 at 5:39 AM, Simon Glass s...@chromium.org wrote: Hi Bin, On Sat, May 16, 2015 at 9:33 AM, Bin Meng bmeng...@gmail.com wrote: The legacy IDE device has a BAR4 (Bus Master Interface BAR) which needs to be configured. Signed-off-by: Bin Meng bmeng...@gmail.com --- Changes in v2: - Correct a typo in the commit message title drivers/pci/pci_auto.c | 14 -- 1 file changed, 14 deletions(-) I don't see how this code change relates to your commit message... The legacy IDE controller reports PI (offset 9 in the configuration space) as 0x80, so the codes here will skip (!(0x80 0x05)) its configuration (ie: BAR4 won't be assigned to a valid memory window) OK I see. It looks like this code has been there since the dawn of U-Boot. I added Wolfgang in case we are missing something. Reviewed-by: Simon Glass s...@chromium.org Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration
On 20 May 2015 at 08:26, Simon Glass s...@chromium.org wrote: +Wolfgang On 18 May 2015 at 19:40, Bin Meng bmeng...@gmail.com wrote: Hi Simon, Reply this thread to the v2 patch. On Tue, May 19, 2015 at 5:39 AM, Simon Glass s...@chromium.org wrote: Hi Bin, On Sat, May 16, 2015 at 9:33 AM, Bin Meng bmeng...@gmail.com wrote: The legacy IDE device has a BAR4 (Bus Master Interface BAR) which needs to be configured. Signed-off-by: Bin Meng bmeng...@gmail.com --- Changes in v2: - Correct a typo in the commit message title drivers/pci/pci_auto.c | 14 -- 1 file changed, 14 deletions(-) I don't see how this code change relates to your commit message... The legacy IDE controller reports PI (offset 9 in the configuration space) as 0x80, so the codes here will skip (!(0x80 0x05)) its configuration (ie: BAR4 won't be assigned to a valid memory window) OK I see. It looks like this code has been there since the dawn of U-Boot. I added Wolfgang in case we are missing something. Reviewed-by: Simon Glass s...@chromium.org Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration
Hi Simon, Reply this thread to the v2 patch. On Tue, May 19, 2015 at 5:39 AM, Simon Glass s...@chromium.org wrote: Hi Bin, On Sat, May 16, 2015 at 9:33 AM, Bin Meng bmeng...@gmail.com wrote: The legacy IDE device has a BAR4 (Bus Master Interface BAR) which needs to be configured. Signed-off-by: Bin Meng bmeng...@gmail.com --- Changes in v2: - Correct a typo in the commit message title drivers/pci/pci_auto.c | 14 -- 1 file changed, 14 deletions(-) I don't see how this code change relates to your commit message... The legacy IDE controller reports PI (offset 9 in the configuration space) as 0x80, so the codes here will skip (!(0x80 0x05)) its configuration (ie: BAR4 won't be assigned to a valid memory window) [snip] Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration
The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- Correct a typo in the commit message title
drivers/pci/pci_auto.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 43965d8..7c10983 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -20,8 +20,6 @@
#define DEBUGF(x...)
#endif /* DEBUG */
-#definePCIAUTO_IDE_MODE_MASK 0x05
-
/* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
#ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8
@@ -424,7 +422,6 @@ int pciauto_config_device(struct pci_controller *hose,
pci_dev_t dev)
{
unsigned int sub_bus = PCI_BUS(dev);
unsigned short class;
- unsigned char prg_iface;
int n;
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, class);
@@ -460,17 +457,6 @@ int pciauto_config_device(struct pci_controller *hose,
pci_dev_t dev)
#endif
break;
- case PCI_CLASS_STORAGE_IDE:
- pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG,
prg_iface);
- if (!(prg_iface PCIAUTO_IDE_MODE_MASK)) {
- DEBUGF(PCI Autoconfig: Skipping legacy mode IDE
controller\n);
- return sub_bus;
- }
-
- pciauto_setup_device(hose, dev, 6, hose-pci_mem,
- hose-pci_prefetch, hose-pci_io);
- break;
-
case PCI_CLASS_BRIDGE_CARDBUS:
/*
* just do a minimal setup of the bridge,
--
1.8.2.1
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