Re: [U-Boot] [PATCH v3 06/13] board: freescale: ls1012aqds: enable network support on ls1012aqds

[Joe Hershberger]

On Sat, Mar 3, 2018 at 11:43 AM, Calvin Johnson  wrote:
> This patch enables ethernet support for ls1012aqds.
>
> Signed-off-by: Calvin Johnson 
> Signed-off-by: Anjaneyulu Jagarlmudi 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH v3 06/13] board: freescale: ls1012aqds: enable network support on ls1012aqds

[Calvin Johnson]

This patch enables ethernet support for ls1012aqds.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 

---

Changes in v3:
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Cosmetic changes

Changes in v2:
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"

 board/freescale/ls1012aqds/Kconfig|  45 
 board/freescale/ls1012aqds/Makefile   |   1 +
 board/freescale/ls1012aqds/eth.c  | 309 ++
 board/freescale/ls1012aqds/ls1012aqds.c   |  97 +++-
 board/freescale/ls1012aqds/ls1012aqds_pfe.h   |  45 
 board/freescale/ls1012aqds/ls1012aqds_qixis.h |   2 +-
 6 files changed, 492 insertions(+), 7 deletions(-)
 create mode 100644 board/freescale/ls1012aqds/eth.c
 create mode 100644 board/freescale/ls1012aqds/ls1012aqds_pfe.h

diff --git a/board/freescale/ls1012aqds/Kconfig 
b/board/freescale/ls1012aqds/Kconfig
index fc9250b..c0b12ed 100644
--- a/board/freescale/ls1012aqds/Kconfig
+++ b/board/freescale/ls1012aqds/Kconfig
@@ -12,6 +12,51 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "ls1012aqds"
 
+
+if FSL_PFE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select PHYLIB
+   imply PHY_VITESSE
+   imply PHY_REALTEK
+   imply PHY_AQUANTIA
+   imply PHYLIB_10G
+
+config PFE_RGMII_RESET_WA
+   def_bool y
+
+config SYS_LS_PFE_FW_ADDR
+   hex "Flash address of PFE firmware"
+   default 0x40a0
+
+config DDR_PFE_PHYS_BASEADDR
+   hex "PFE DDR physical base address"
+   default 0x0380
+
+config DDR_PFE_BASEADDR
+   hex "PFE DDR base address"
+   default 0x8380
+
+config PFE_EMAC1_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1e
+
+config PFE_EMAC2_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+config PFE_SGMII_2500_PHY1_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+config PFE_SGMII_2500_PHY2_ADDR
+   hex "PFE DDR base address"
+   default 0x2
+
+endif
+
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/board/freescale/ls1012aqds/Makefile 
b/board/freescale/ls1012aqds/Makefile
index 0b813f9..b18494a 100644
--- a/board/freescale/ls1012aqds/Makefile
+++ b/board/freescale/ls1012aqds/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y += ls1012aqds.o
+obj-y += eth.o
diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
new file mode 100644
index 000..f8026a2
--- /dev/null
+++ b/board/freescale/ls1012aqds/eth.c
@@ -0,0 +1,309 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "../common/qixis.h"
+#include 
+#include 
+#include "ls1012aqds_qixis.h"
+
+#define EMI_NONE   0xFF
+#define EMI1_RGMII 1
+#define EMI1_SLOT1 2
+#define EMI1_SLOT2 3
+
+#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
+#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
+
+static const char * const mdio_names[] = {
+   "NULL",
+   "LS1012AQDS_MDIO_RGMII",
+   "LS1012AQDS_MDIO_SLOT1",
+   "LS1012AQDS_MDIO_SLOT2",
+   "NULL",
+};
+
+static const char *ls1012aqds_mdio_name_for_muxval(u8 muxval)
+{
+   return mdio_names[muxval];
+}
+
+struct ls1012aqds_mdio {
+   u8 muxval;
+   struct mii_dev *realbus;
+};
+
+static void ls1012aqds_mux_mdio(u8 muxval)
+{
+   u8 brdcfg4;
+
+   if (muxval < 7) {
+   brdcfg4 = QIXIS_READ(brdcfg[4]);
+   brdcfg4 &= ~BRDCFG4_EMISEL_MASK;
+   brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT);
+   QIXIS_WRITE(brdcfg[4], brdcfg4);
+   }
+}
+
+static int ls1012aqds_mdio_read(struct mii_dev *bus, int addr, int devad,
+   int regnum)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   ls1012aqds_mux_mdio(priv->muxval);
+
+   return priv->realbus->read(priv->realbus, addr, devad, regnum);
+}
+
+static int ls1012aqds_mdio_write(struct mii_dev *bus, int addr, int devad,
+int regnum, u16 value)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   ls1012aqds_mux_mdio(priv->muxval);
+
+   return priv->realbus->write(priv->realbus, addr, devad, regnum, value);
+}
+
+static int ls1012aqds_mdio_reset(struct mii_dev *bus)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   if (priv->realbus->reset)
+   return priv->realbus->reset(priv->realbus);
+   else
+   return -1;
+}
+
+static int ls1012aqds_mdio_init(char *realbusname, u8 muxval)
+{
+   struct ls1012aqds_mdio *pmdio;
+   struct mii_dev *bus = mdio_alloc();
+
+   if (!bus) {
+   printf("Failed to allocate ls1012aqds MDIO bus\n");
+