On 07/22/2015 12:23 PM, Alexander Stein wrote:
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
include/configs/rpi-common.h | 1 +
This file applies to both RPi 1 and RPi 2. Do they have the same
cacheline size?
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
Signed-off-by: Alexander Stein alexander...@web.de
---
include/configs/rpi-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/rpi-common.h
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