Re: [U-Boot] [RESEND PATCH] sunxi: mmc: increase status register polling rate for data transfers

[Hans de Goede]

Hi,

On 08-07-16 12:40, Tobias Doerffel wrote:

With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transfer rates again. With the old cards
we now even reach about 16 MiB/s.

Signed-off-by: Tobias Doerffel 


Thanks, this tremendously speeds up boot on some of my boards, good stuff!

I've merge this locally and it should show up in u-boot-sunxi/next later
today.

Regards,

Hans




---
 drivers/mmc/sunxi_mmc.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index ce2dc4a..36da3b3 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct 
mmc_data *data)
unsigned i;
unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
unsigned byte_cnt = data->blocksize * data->blocks;
-   unsigned timeout_msecs = byte_cnt >> 8;
-   if (timeout_msecs < 2000)
-   timeout_msecs = 2000;
+   unsigned timeout_usecs = (byte_cnt >> 8) * 1000;
+   if (timeout_usecs < 200)
+   timeout_usecs = 200;

/* Always read / write data through the CPU */
setbits_le32(>reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);

for (i = 0; i < (byte_cnt >> 2); i++) {
while (readl(>reg->status) & status_bit) {
-   if (!timeout_msecs--)
+   if (!timeout_usecs--)
return -1;
-   udelay(1000);
+   udelay(1);
}

if (reading)


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[U-Boot] [RESEND PATCH] sunxi: mmc: increase status register polling rate for data transfers

[Tobias Doerffel]

With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transfer rates again. With the old cards
we now even reach about 16 MiB/s.

Signed-off-by: Tobias Doerffel 
---
 drivers/mmc/sunxi_mmc.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index ce2dc4a..36da3b3 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct 
mmc_data *data)
unsigned i;
unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
unsigned byte_cnt = data->blocksize * data->blocks;
-   unsigned timeout_msecs = byte_cnt >> 8;
-   if (timeout_msecs < 2000)
-   timeout_msecs = 2000;
+   unsigned timeout_usecs = (byte_cnt >> 8) * 1000;
+   if (timeout_usecs < 200)
+   timeout_usecs = 200;
 
/* Always read / write data through the CPU */
setbits_le32(>reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
 
for (i = 0; i < (byte_cnt >> 2); i++) {
while (readl(>reg->status) & status_bit) {
-   if (!timeout_msecs--)
+   if (!timeout_usecs--)
return -1;
-   udelay(1000);
+   udelay(1);
}
 
if (reading)
-- 
2.1.4

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