Hi,
On 27/06/18 11:49, Icenowy Zheng wrote:
> 在 2018-06-27三的 10:46 +0100,Andre Przywara写道:
>> Hi,
>>
>> On 25/06/18 11:37, Icenowy Zheng wrote:
>>> The Allwinner H6 SoC comes with a set of new DRAM controller+PHY
>>> combo.
>>> Both the controller and the PHY seem to be originate from
>>>
在 2018-06-27三的 10:46 +0100,Andre Przywara写道:
> Hi,
>
> On 25/06/18 11:37, Icenowy Zheng wrote:
> > The Allwinner H6 SoC comes with a set of new DRAM controller+PHY
> > combo.
> > Both the controller and the PHY seem to be originate from
> > DesignWare,
> > and are similar to the ones in ZynqMP
Hi,
On 25/06/18 11:37, Icenowy Zheng wrote:
> The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo.
> Both the controller and the PHY seem to be originate from DesignWare,
> and are similar to the ones in ZynqMP SoCs.
>
> This commit introduces an initial DRAM driver for H6,
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