York Sun wrote:
+ switch (wrrec_mclk) { /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */
+ case 9:
+ wrrec_mclk = 10;
+ break;
+ case 11:
+ wrrec_mclk = 12;
+ break;
+ case 13:
+ wrrec_mclk = 14;
+
On Wed, 2011-03-02 at 13:31 -0600, Timur Tabi wrote:
York Sun wrote:
+ switch (wrrec_mclk) { /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */
+ case 9:
+ wrrec_mclk = 10;
+ break;
+ case 11:
+ wrrec_mclk = 12;
+ break;
+ case 13:
+
York Sun wrote:
if (wrrec_mclk 1)
wrrec_mclk++;
Only 9, 11, 13, 15 need to round up.
What are all the possible values for wrrec_mclk?
--
Timur Tabi
Linux kernel developer at Freescale
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On Wed, 2011-03-02 at 13:46 -0600, Timur Tabi wrote:
York Sun wrote:
if (wrrec_mclk 1)
wrrec_mclk++;
Only 9, 11, 13, 15 need to round up.
What are all the possible values for wrrec_mclk?
There is no limitation on register timing_cfg_1[wrrec_mclk]. It can be
any value. The
York Sun wrote:
On Wed, 2011-03-02 at 13:46 -0600, Timur Tabi wrote:
York Sun wrote:
if (wrrec_mclk 1)
wrrec_mclk++;
Only 9, 11, 13, 15 need to round up.
What are all the possible values for wrrec_mclk?
There is no limitation on register timing_cfg_1[wrrec_mclk]. It can be
any
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