On Wed, Mar 27, 2019 at 11:50:09PM +0000, Trent Piepho wrote: > The cache flush of the kernel load area needs to be aligned outward to > the DMA cache alignment. The operations are simpler if we think of this > as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and > aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find > the length of the flushed region by subtracting the former from the > latter. > > Cc: Tom Rini <tr...@konsulko.com> > Cc: Simon Glass <s...@chromium.org> > Cc: Bryan O'Donoghue <bryan.odonog...@linaro.org> > Signed-off-by: Trent Piepho <tpie...@impinj.com> > Reviewed-by: Simon Glass <s...@chromium.org>
Applied to u-boot/master, thanks! -- Tom
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