From: Biwen Li <biwen...@nxp.com>

Add gpio node for SoC LS208xA

Signed-off-by: Biwen Li <biwen...@nxp.com>
---
 arch/arm/dts/fsl-ls2080a.dtsi | 46 ++++++++++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index f0f4a82c14..7374d580e0 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -2,7 +2,7 @@
 /*
  * NXP ls2080a SOC common device tree source
  *
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
  */
 
@@ -120,6 +120,50 @@
                bus-width = <4>;
        };
 
+       gpio0: gpio@2300000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2300000 0x0 0x10000>;
+               interrupts = <0 36 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio1: gpio@2310000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2310000 0x0 0x10000>;
+               interrupts = <0 36 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio2: gpio@2320000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2320000 0x0 0x10000>;
+               interrupts = <0 37 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpio3: gpio@2330000 {
+               compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+               reg = <0x0 0x2330000 0x0 0x10000>;
+               interrupts = <0 37 0x4>; /* Level high type */
+               gpio-controller;
+               little-endian;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
        usb0: usb3@3100000 {
                compatible = "fsl,layerscape-dwc3";
                reg = <0x0 0x3100000 0x0 0x10000>;
-- 
2.17.1

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