From: Biwen Li <biwen...@nxp.com>
Update gpio driver to use same logic for big-endian and little-endian
Signed-off-by: Biwen Li <biwen...@nxp.com>
---
.../asm/arch-fsl-layerscape/immap_lsch3.h | 10 ++++
arch/arm/include/asm/arch-ls102xa/gpio.h | 16 +++++++
arch/powerpc/include/asm/immap_83xx.h | 13 +++++
drivers/gpio/mpc8xxx_gpio.c | 47 ++++---------------
4 files changed, 47 insertions(+), 39 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index b61666ed4b..b64d7fbc1b 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -589,5 +589,15 @@ struct ccsr_serdes {
u8 res5[0x19fc - 0xa00];
};
+struct ccsr_gpio {
+ u32 gpdir;
+ u32 gpodr;
+ u32 gpdat;
+ u32 gpier;
+ u32 gpimr;
+ u32 gpicr;
+ u32 gpibe;
+};
+
#endif /*__ASSEMBLY__ */
#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
diff --git a/arch/arm/include/asm/arch-ls102xa/gpio.h
b/arch/arm/include/asm/arch-ls102xa/gpio.h
index dad181e7ab..517652b5d0 100644
--- a/arch/arm/include/asm/arch-ls102xa/gpio.h
+++ b/arch/arm/include/asm/arch-ls102xa/gpio.h
@@ -13,4 +13,20 @@
#ifndef __ASM_ARCH_LS102XA_GPIO_H_
#define __ASM_ARCH_LS102XA_GPIO_H_
+struct ccsr_gpio {
+ u32 gpdir;
+ u32 gpodr;
+ u32 gpdat;
+ u32 gpier;
+ u32 gpimr;
+ u32 gpicr;
+ u32 gpibe;
+};
+
+struct mpc8xxx_gpio_plat {
+ ulong addr;
+ ulong size;
+ uint ngpios;
+};
+
#endif
diff --git a/arch/powerpc/include/asm/immap_83xx.h
b/arch/powerpc/include/asm/immap_83xx.h
index 609869c715..a03f938d9f 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -966,6 +966,19 @@ typedef struct immap {
} immap_t;
#endif
+struct ccsr_gpio {
+ u32 gpdir;
+ u32 gpodr;
+ u32 gpdat;
+ u32 gpier;
+ u32 gpimr;
+ u32 gpicr;
+ union {
+ u32 gpibe;
+ u8 res0[0xE8];
+ };
+};
+
#define CONFIG_SYS_MPC8xxx_DDR_OFFSET (0x2000)
#define CONFIG_SYS_FSL_DDR_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR_OFFSET)
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index a964347fa3..c733603289 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -6,7 +6,7 @@
* based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
*
* Copyright 2010 eXMeritus, A Boeing Company
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
#include <common.h>
@@ -16,16 +16,6 @@
#include <asm/io.h>
#include <dm/of_access.h>
-struct ccsr_gpio {
- u32 gpdir;
- u32 gpodr;
- u32 gpdat;
- u32 gpier;
- u32 gpimr;
- u32 gpicr;
- u32 gpibe;
-};
-
struct mpc8xxx_gpio_data {
/* The bank's register base in memory */
struct ccsr_gpio __iomem *base;
@@ -187,32 +177,11 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev)
{
struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
- fdt_addr_t addr;
- u32 i;
- u32 reg[4];
- if (ofnode_read_bool(dev_ofnode(dev), "little-endian"))
+ if (dev_read_bool(dev, "little-endian"))
data->little_endian = true;
- if (data->little_endian)
- dev_read_u32_array(dev, "reg", reg, 4);
- else
- dev_read_u32_array(dev, "reg", reg, 2);
-
- if (data->little_endian) {
- for (i = 0; i < 2; i++)
- reg[i] = be32_to_cpu(reg[i]);
- }
-
- addr = dev_translate_address(dev, reg);
-
- plat->addr = addr;
-
- if (data->little_endian)
- plat->size = reg[3];
- else
- plat->size = reg[1];
-
+ plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t
*)&plat->size);
plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
return 0;
@@ -257,11 +226,11 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
if (!str)
return -ENOMEM;
- if (ofnode_device_is_compatible(dev_ofnode(dev), "fsl,qoriq-gpio")) {
- unsigned long gpibe = data->addr + sizeof(struct ccsr_gpio)
- - sizeof(u32);
-
- out_be32((unsigned int *)gpibe, 0xffffffff);
+ if (device_is_compatible(dev, "fsl,qoriq-gpio")) {
+ if (data->little_endian)
+ out_le32(&data->base->gpibe, 0xffffffff);
+ else
+ out_be32(&data->base->gpibe, 0xffffffff);
}
uc_priv->bank_name = str;
--
2.17.1
