+tom, and pruning the cc list a little
Hi,
On 26 January 2015 at 18:27, Simon Glass s...@chromium.org wrote:
This series adds debug UART infrastructure which can in principle be used on
any architecture. It works best with those that don't need a stack to call
functions (e.g. ARM, PowerPC).
Hi Gabriel,
On 15 February 2015 at 14:55, Gabriel Huau cont...@huau-gabriel.fr wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the next version to modify the pch GPIO driver and
configure these pins through the device
Hi Gabriel,
On 15 February 2015 at 14:55, Gabriel Huau cont...@huau-gabriel.fr wrote:
Configure the pinctrl as it required to make some IO controllers
working (USB/UART/I2C/...).
The idea would be in the next version to modify the pch GPIO driver and
configure these pins through the device
On Tue, Feb 17, 2015 at 4:27 PM, Murali Karicheri m-kariche...@ti.com wrote:
is complete the boot-loader sets the PC to the first MSMC address
0x0c00. The u-boot.bin is linked to the address 0x0c001000.
why not just shift u-boot.bin to start of MSMC address?
What is wrong with the
On 12 February 2015 at 02:49, Masahiro Yamada yamad...@jp.panasonic.com wrote:
[ imported from Linux Kernel, commit 74981fb81d83 ]
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
Signed-off-by: Linus Walleij
From: Praveen Rao p...@ti.com
This patch adds workaround for ARM errata 798870 which says
If back-to-back speculative cache line fills (fill A and fill B) are
issued from the L1 data cache of a CPU to the L2 cache, the second
request (fill B) is then cancelled, and the second request would have
Hi,
Triggered by a user report, it was seen that recommended errata
workaround and performance trade-offs as recommended by TI architects
for ARM configuration was not being followed in OMAP5+ ARM A15
platforms in u-boot configuration. Note OMAP5, DRA7 all share the
same cortex A15 revision
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
PL310 control register, however, that is something that is generic
enough to be used for OMAP5 generation of processors as well. The
only difference being the service being invoked for the function.
So, convert the service to a
Update to existing recommendation for L2ACTLR configuration to prevent
system instability and optimize performance.
These apply to both OMAP5 and DRA7.
Reported-by: Vivek Chengalvala vchengalv...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/cpu/armv7/omap5/hwinit.c |
On Tue, Feb 17, 2015 at 09:11:01PM +0100, Marek Vasut wrote:
Hi Tom,
SoCFPGA stuff for current release.
The following changes since commit 7f641d53bbb3a426a3bfb132d8346153e86a9d08:
Merge branch 'master' of git://git.denx.de/u-boot-ubi (2015-02-04 13:30:00
-0500)
are available in
Hi Tom,
reworked pull request for avr32 generic board support.
The following changes since commit 5745f8c4fd5807becf7f246625e153388293aedc:
Merge git://git.denx.de/u-boot-marvell (2015-02-16 08:44:03 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-avr32.git master
Add a simple function to enable external clocks.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/tegra-common/clock.c | 17 +
arch/arm/include/asm/arch-tegra/clock.h | 8
2 files changed, 25 insertions(+)
diff --git
From: Angela Stegmaier angelaba...@ti.com
Enable the workaround for ARM errata 798870 for OMAP5
and DRA7xx since they are Coretx-A15 r2.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
include/configs/ti_omap5_common.h |4
1 file
The ECC scheme selection algorithm in OMAP GPMC appears to be left untested when
BCH8 handling code was added. Running 'nandecc sw' defaults to HAM1 even if
the board is using another scheme (ex. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW on
OMAP3). This results in unrecoverable ECC errors when reading
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
This commit enables the following configs:
- CONFIG_USE_ARCH_MEMCPY
- CONFIG_USE_ARCH_MEMSET
This increases the performance of memcpy/memset
and also reduces the boot time.
This was tested on Trats2.
A quick test
On 13 February 2015 at 12:20, Simon Glass s...@chromium.org wrote:
Since both I2C and SPI are converted to Kconfig, we can convert cros_ec
to Kconfig for these buses.
LPC will need to wait until driver mode PCI is available.
Signed-off-by: Simon Glass s...@chromium.org
---
On 13 February 2015 at 12:20, Simon Glass s...@chromium.org wrote:
Use Kconfig instead of board config for DM and DM_THERMAL.
Signed-off-by: Simon Glass s...@chromium.org
---
configs/mx6sxsabresd_defconfig | 2 ++
configs/mx6sxsabresd_spl_defconfig | 2 ++
Hi Przemyslaw,
On 16 February 2015 at 08:21, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,
On 02/16/2015 04:13 PM, Przemyslaw Marczak wrote:
For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY,
will highly increase the memset/memcpy performance. This is able
thanks to
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
For writing files, DFU implementation requires the file buffer
with the len at least of file size. For big files it requires
the same big buffer.
Previously the file buffer was allocated as a static variable,
so it
Hi Przemyslaw,
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
README | 7 +++
1 file changed, 7 insertions(+)
diff --git a/README b/README
index fefa71c..8673640 100644
--- a/README
+++
Hi Przemyslaw,
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
This commit introduces new config: CONFIG_SYS_MALLOC_INIT_SKIP_ZEROING.
Before this change, the all amount of memory reserved for the malloc,
was set to zero in mem_malloc_init(). When the malloc
Hi Joe,
On 16 February 2015 at 21:37, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Sun, Feb 15, 2015 at 9:49 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com
wrote:
First just add support for MAC
Hi Joe,
On 16 February 2015 at 22:16, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Sun, Feb 15, 2015 at 9:50 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com
wrote:
Implement a bridge between u-boot's
On 2015-02-17 22:06, Stephen Warren wrote:
On 02/16/2015 05:54 AM, Jan Kiszka wrote:
From: Ian Campbell i...@hellion.org.uk
These registers can be used to prevent non-secure world from accessing a
megabyte aligned region of RAM, use them to protect the u-boot secure
monitor
code.
At first
Hi Masahiro,
On 17 February 2015 at 00:00, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Hi Marek,
I want apply this patch onto u-boot-uniphier/master
to avoid
Hi Przemyslaw,
On 17 February 2015 at 06:09, Przemyslaw Marczak p.marc...@samsung.com wrote:
Before this commit, the mmc devices were always registered
in the same order. So dwmmc channel 0 was registered as mmc 0,
channel 1 as mmc 1, etc.
In case of possibility to boot from more then one
Hi Joe,
On 16 February 2015 at 21:17, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Sun, Feb 15, 2015 at 9:59 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 13 February 2015 at 19:33, Joe Hershberger joe.hershber...@gmail.com
wrote:
On Thu, Feb 12, 2015 at 11:14
On 17 February 2015 at 07:28, Marcel Ziswiler mar...@ziswiler.com wrote:
This fixes the MMC/SD card detect GPIOs for Apalis T30 which got broken
by the following commit:
2b2b50bc8748bf1ddb2d96da7157f9eecbe24961
While at it also re-add the comments describing which particular
Apalis/Colibri
On 17 February 2015 at 20:08, Simon Glass s...@chromium.org wrote:
On 12 February 2015 at 02:49, Masahiro Yamada yamad...@jp.panasonic.com
wrote:
[ imported from Linux Kernel, commit 74981fb81d83 ]
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Laurent Pinchart
On 13 February 2015 at 12:20, Simon Glass s...@chromium.org wrote:
Make this option available in Kconfig and clean up the board that uses it.
Note there is also an entry in exynos5-common.h but this affects multiple
boards and should be dropped as part of the Samsung I2C migration to
driver
+Stephen who might have an opinion on this.
Hi Przemyslaw,
On 17 February 2015 at 06:09, Przemyslaw Marczak p.marc...@samsung.com wrote:
This commits extends:
- dm gpio ops by: 'set_pull' call
- dm gpio uclass by: dm_gpio_set_pull() function
The pull mode is not defined so should be driver
On 17 February 2015 at 07:28, Marcel Ziswiler mar...@ziswiler.com wrote:
Now with all the Tegra PCIe and Intel E1000 gigabit Ethernet driver
updates being merged actually make use of it.
While at it get rid of the USB networking support which now does not
make much sense any longer.
Hi Joe,
On 16 February 2015 at 22:04, Joe Hershberger joe.hershber...@gmail.com wrote:
On Sun, Feb 15, 2015 at 9:50 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com
wrote:
Allow network devices to be referred to as
Hi Joe,
On 16 February 2015 at 21:46, Joe Hershberger joe.hershber...@gmail.com wrote:
On Sun, Feb 15, 2015 at 9:49 AM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com
wrote:
The sandbox driver will now generate response
On 18 February 2015 at 03:27, Simon Glass s...@chromium.org wrote:
Hi Michal,
On 16 February 2015 at 04:41, Michal Suchanek hramr...@gmail.com wrote:
On 13 February 2015 at 05:51, Simon Glass s...@chromium.org wrote:
Hi Michal,
On 11 February 2015 at 10:16, Michal Suchanek
Hi Tom
On 02/17/2015 03:25 PM, Tom Rini wrote:
[...]
In terms of big removal patches, now that -rc2 is out I'm going to take
what Masahiro has posted and that didn't cause people to speak up and
claim / fix the boards [...]
I will be having access to :
- mpc8323erdb and
- mpc8308rdb
On 2015-02-17 22:05, Stephen Warren wrote:
On 02/16/2015 05:54 AM, Jan Kiszka wrote:
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE)
but it is
not protected in h/w. See next patch.
diff --git
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
Reduce the boot time of Trats2 by disabling the memset
at malloc init.
This was tested on Trats2.
A quick test with trace. Boot time from start to main_loop() entry:
- ~464ms - before this change (arch memset
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
Reduce the boot time of Odroid X2/U3 by disabling the memset
at malloc init.
This was tested on Odroid X2.
A quick test with checking gpio pin state using the oscilloscope.
Boot time from start to bootcmd (change
Hi Przemyslaw,
On 16 February 2015 at 08:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Kconfig | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/Kconfig b/Kconfig
index
On 2015-02-17 22:03, Stephen Warren wrote:
On 02/16/2015 05:54 AM, Jan Kiszka wrote:
This is based on Thierry Reding's work and uses Ian Campell's
preparatory patches. It comes with full support for CPU_ON/OFF PSCI
services. The algorithm used in this version for turning CPUs on and
off was
On 16 February 2015 at 05:14, Marcel Ziswiler mar...@ziswiler.com wrote:
Migrate Toradex Colibri PXA270 to use CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
---
include/configs/colibri_pxa270.h | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass
Currently to flash u-boot image onto NAND or SPI NOR flash, very first
time user need to use Code Composer Studio (CCS). This is cumbersome for
an user not familiar with CCS. This patch add simpler procedure using
uart boot mode for K2 EVMs.
When UART bootmode is set and board is rebooted, the
On 02/17/2015 10:39 AM, Vitaly Andrianov wrote:
Currently to flash u-boot image onto NAND or SPI NOR flash, very first
time user need to use Code Composer Studio (CCS). This is cumbersome for
an user not familiar with CCS. This patch add simpler procedure using
uart boot mode for K2 EVMs.
Hi Michal,
On 17.02.2015 14:52, Michal Sojka wrote:
snip
+ omap_nand_info[cs].ws = ws[cs];
+#endif
I've attached a new version of this patch. It removed the ifdef from the
code. Please take a look at it and let me know what you think.
Yes, it's better and it works for us. Just one
On Tue, Feb 17, 2015 at 04:48:36PM +0100, Andreas Bießmann wrote:
Hi Tom,
On 02/17/2015 04:12 PM, Tom Rini wrote:
On Mon, Feb 16, 2015 at 09:25:06PM +0100, Andreas Bießmann wrote:
Hi Tom,
finally generic board support for avr32!
The following changes since commit
On Tue, Feb 17, 2015 at 5:57 AM, Dileep Katta dileep.ka...@linaro.org
wrote:
On 17 February 2015 at 02:51, Steve Rae s...@broadcom.com wrote:
On 15-02-16 12:40 PM, Dileep Katta wrote:
Hi Steve,
On 14 February 2015 at 02:15, Steve Rae s...@broadcom.com wrote:
On 15-02-12
On Tue, Feb 17, 2015 at 02:26:47PM +0100, Albert ARIBAUD wrote:
Bonjour Tom,
Le Tue, 17 Feb 2015 08:20:09 -0500, Tom Rini tr...@ti.com a écrit :
On Thu, Feb 12, 2015 at 06:36:59PM +0100, Albert ARIBAUD (3ADEV) wrote:
This series extends functionality for the LPC32xx platform and
From: Michal Sojka so...@merica.cz
Commit fb384c4720ca7496775d6578f184bf628db73456 introduced the use of
WAIT0 pin for determining whether the NAND is ready or not. This only
works if all NAND chips are connected to WAIT0. If some chips are
connected to the other available pin WAIT1, nand_wait()
On 2/17/2015 5:36 AM, Otavio Salvador wrote:
On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/16/2015 2:38 PM, Otavio Salvador wrote:
Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.
This
On Fri, Feb 13, 2015 at 8:05 PM, PF4Public pf4pub...@mail.ru wrote:
Hi all
I'm asking for your help to figure out what interferes with u-boot's tftp
in my setup.
I have a custom board with TI OMAP SoC. I'm trying to download uImage
from linux machine via tftp. It fails with timeouts (most of
This commit removes the dram reservation from board file,
because it is done in a common code.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/odroid/odroid.c | 4
include/configs/odroid.h | 5 +++--
2 files changed, 3
Since the few exynos based boards requires memory reservation,
of last DRAM bank, the code could be in a common place.
This patchset moves the reservation code from odroid board file
to common samsung board file.
Przemyslaw Marczak (3):
board: samsung: reserve memory for the secure firmware
This fixes the MMC/SD card detect GPIOs for Apalis T30 which got broken
by the following commit:
2b2b50bc8748bf1ddb2d96da7157f9eecbe24961
While at it also re-add the comments describing which particular
Apalis/Colibri pins those GPIOs are on.
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
In order to work with our downstream U-Boot environment and update
scripts add support for the following miscellaneous commands:
CONFIG_CMD_SETEXPR
CONFIG_FAT_WRITE
CONFIG_CMDLINE_EDITING
CONFIG_CMD_FS_GENERIC
Increase the console I/O and print as well as argument buffer sizes:
On Mon, Feb 16, 2015 at 09:25:06PM +0100, Andreas Bießmann wrote:
Hi Tom,
finally generic board support for avr32!
The following changes since commit bd2a4888b123713adec271d6c8040ca9f609aa2f:
sunxi: configs/sunxi-common.h: Enable CONFIG_CMD_PART (2015-02-11 19:43:45
-0500)
are
Since more than one board requires memory reservation
for the secure firmware, the reservation code can be
made in a common code.
Now, to reserve some part of the the last bank,
board config should define:
- CONFIG_TZSW_RESERVED_DRAM - len in bytes
- CONFIG_NR_DRAM_BANKS - number of memory banks
This commit enables the last DRAM bank and reserves
the last 22 MiB of it, for the secure firmware.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Akshay Saraswat aksha...@samsung.com
Cc: Hyungwon Hwang human.hw...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Hi Tom,
On 02/17/2015 04:12 PM, Tom Rini wrote:
On Mon, Feb 16, 2015 at 09:25:06PM +0100, Andreas Bießmann wrote:
Hi Tom,
finally generic board support for avr32!
The following changes since commit bd2a4888b123713adec271d6c8040ca9f609aa2f:
sunxi: configs/sunxi-common.h: Enable
Bonjour Tom,
Le Tue, 17 Feb 2015 08:20:09 -0500, Tom Rini tr...@ti.com a écrit :
On Thu, Feb 12, 2015 at 06:36:59PM +0100, Albert ARIBAUD (3ADEV) wrote:
This series extends functionality for the LPC32xx platform and
introduces the WORK Microwave work_92105 board which makes use
of the
On Thu, Feb 12, 2015 at 06:36:59PM +0100, Albert ARIBAUD (3ADEV) wrote:
This series extends functionality for the LPC32xx platform and
introduces the WORK Microwave work_92105 board which makes use
of the extended functionality.
Along with the work_92105 problem, just dropping that patch
This adds support to switch to 1.8V in case CMD11 succeeds.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Fixed split string (Marek)
drivers/mmc/fsl_esdhc.c | 29 ++---
include/fsl_esdhc.h | 2 ++
include/mmc.h | 1 +
3
Dear Andreas Devel,
Andreas Devel andreas.de...@googlemail.com writes:
Introduce arch_reserve_stacks() to tailor gd-start_addr_sp and gd-irq_sp to
the architecture needs.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3:
-
After rework of the file system API, the size of ext4
write was missed. This causes printing unreliable write
size at the end of the file system write operation.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Sjoerd Simons sjoerd.sim...@collabora.co.uk
Cc: Lukasz Majewski
Hi Stefan,
On Wed, Feb 11 2015, Stefan Roese wrote:
On 10.02.2015 14:21, Michal Sojka wrote:
Commit fb384c4720ca7496775d6578f184bf628db73456 introduced the use of
WAIT0 pin for determining whether the NAND is ready or not. This only
works if all NAND chips are connected to WAIT0. If some
Now with all the Tegra PCIe and Intel E1000 gigabit Ethernet driver
updates being merged actually make use of it.
While at it get rid of the USB networking support which now does not
make much sense any longer.
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
---
include/configs/apalis_t30.h
All boards with a SPI interface have a suitable spi alias except Apalis
T30. Add these missing aliases just as the following commit did for the
others:
d2f60f93325ac31f5f30ee94f15b87c89db46aec
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
---
arch/arm/dts/tegra30-apalis.dts | 4
1
The following is a set of various fixes for Toradex Apalis and Colibri
T30.
Marcel Ziswiler (4):
dm: tegra: dts: add aliases for spi on apalis_t30
apalis/colibri_t30: fix MMC/SD card detect GPIOs
apalis_t30: enable gigabit ethernet via pcie
apalis/colibri_t30: add misc cmds increase buf
Dear Andreas Devel,
Andreas Devel andreas.de...@googlemail.com writes:
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
This version still has the mmu_init_r() in common/board_r. Removing this now is
not that easy ... I'd love to get it in as is and change it later to the
Hi Tom,
Confirmed, Andreas sent the patch and I've tested both versions. The tools
still works on Ubuntu host.
Kind regards,
2015-02-16 15:12 GMT-02:00 Tom Rini tr...@ti.com:
On Mon, Feb 16, 2015 at 11:55:09AM -0500, Tom Rini wrote:
On Mon, Feb 16, 2015 at 03:05:45PM +0100, Lukasz Majewski
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid erasing other partitions. The start address and the size
is aligned to the erase group size for this.
Currently only supports erasing from eMMC.
On Monday, February 16, 2015 at 06:33:35 PM, Eric Nelson wrote:
Hi Tom and Marek,
On 02/16/2015 10:03 AM, Tom Rini wrote:
On Mon, Feb 16, 2015 at 05:27:59PM +0100, Marek Vasut wrote:
On Monday, February 16, 2015 at 12:16:06 AM, Eric Nelson wrote:
Initial filesystem images are generally
On Tue, Feb 10, 2015 at 05:10:16PM +0100, Valentin Longchamp wrote:
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
On Tue, Feb 10, 2015 at 05:10:17PM +0100, Valentin Longchamp wrote:
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
On Wed, Feb 11, 2015 at 02:05:41PM -0500, Vitaly Andrianov wrote:
On Keystone2 devices serdes must be initialized before accessing MDIO bus.
This commit moves the keystone2_net_serdes_setup() from keystone2_eth_open
to keystone2_emac_initialize to meet that requirement.
This also eliminates
On Tue, Feb 10, 2015 at 05:10:14PM +0100, Valentin Longchamp wrote:
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
On Tue, Feb 10, 2015 at 05:10:15PM +0100, Valentin Longchamp wrote:
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
On Tuesday, February 17, 2015 at 06:18:31 PM, Troy Kisky wrote:
On 2/17/2015 5:36 AM, Otavio Salvador wrote:
On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/16/2015 2:38 PM, Otavio Salvador wrote:
Some boards cannot do voltage negotiation but
Hi Tom,
SoCFPGA stuff for current release.
The following changes since commit 7f641d53bbb3a426a3bfb132d8346153e86a9d08:
Merge branch 'master' of git://git.denx.de/u-boot-ubi (2015-02-04 13:30:00
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git HEAD
for
On Tue, Feb 17, 2015 at 5:43 PM, Marek Vasut ma...@denx.de wrote:
On Tuesday, February 17, 2015 at 06:18:31 PM, Troy Kisky wrote:
On 2/17/2015 5:36 AM, Otavio Salvador wrote:
On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
On 2/16/2015 2:38 PM, Otavio
On Mon, Feb 02, 2015 at 04:53:13PM +0800, feng...@phytium.com.cn wrote:
From: David Feng feng...@phytium.com.cn
PCI specification allow prefetchable memory to be 32-bit or 64-bit.
PCI express specification states that all memmory bars for prefetchable
memory must be implemented as 64-bit.
Hey all,
I've pushed v2015.01-rc2 out. Due to a hiccup (that is being worked on
right now), things aren't up in the usual place yet but I expect them to
be in the next day or so. Until then, it's also available at
https://github.com/u-boot/u-boot (but please don't start updating distro
recipes
On 02/17/2015 07:28 AM, Marcel Ziswiler wrote:
All boards with a SPI interface have a suitable spi alias except Apalis
T30. Add these missing aliases just as the following commit did for the
others:
d2f60f93325ac31f5f30ee94f15b87c89db46aec
You probably don't need to respin like this, but it's
On 02/17/2015 07:28 AM, Marcel Ziswiler wrote:
In order to work with our downstream U-Boot environment and update
scripts add support for the following miscellaneous commands:
CONFIG_CMD_SETEXPR
CONFIG_FAT_WRITE
CONFIG_CMDLINE_EDITING
README isn't very informative on this subject. What
On Tuesday, February 17, 2015 at 01:42:43 PM, Otavio Salvador wrote:
This adds support to switch to 1.8V in case CMD11 succeeds.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Fixed split string (Marek)
drivers/mmc/fsl_esdhc.c | 29
On Tue, Feb 17, 2015 at 12:35:41PM -0700, Stephen Warren wrote:
On 02/16/2015 06:03 PM, Tom Rini wrote:
On Mon, Feb 16, 2015 at 12:16:15PM -0700, Stephen Warren wrote:
USB doesn't seem to work yet; the controller detects the on-board Hub/
Ethernet device but can't read the descriptors from
On Wed, Feb 11, 2015 at 02:07:58PM -0500, Vitaly Andrianov wrote:
KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
writing to it corrupts relocation table.
This patch removes the global ddr3_size
On Mon, Feb 16, 2015 at 10:15:55AM +0530, Lokesh Vutla wrote:
From: Angela Stegmaier angelaba...@ti.com
DDR3 timing and latency paramenters were not configured
correctly for 666MHz. Fixing the timing and latency values
according to Data sheet.
This fixes the random crashes seen on
Initial filesystem images are generally highly compressible.
Add a routine gzwrite that allows gzip-compressed images to be
written to block devices.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 removes floating point references from u64 division
include/common.h | 39
From: Stephen Warren swar...@nvidia.com
Syseng has revamped the Jetson TK1 pinmux spreadsheet, basing the content
completely on correct configuration for the board/schematic, rather than
the previous version which was based on the bare minimum changes relative
to another reference board.
The new
On Mon, Feb 16, 2015 at 05:59:09AM +0100, Waldemar Brodkorb wrote:
For example on a raspberry pi the u-boot environment can be
saved in a file on the first VFAT partition.
This example illustrates how to use it with fw_printenv/fw_setenv.
Signed-off-by: Waldemar Brodkorb w...@openadk.org
From: Stephen Warren swar...@nvidia.com
This is needed to correctly apply the new Jetson TK1 pinmux config.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
arch/arm/cpu/tegra-common/pinmux-common.c | 10 ++
arch/arm/include/asm/arch-tegra/pinmux.h | 3 ++-
2 files changed, 12
On Tue, Feb 17, 2015 at 07:01:57AM +, Jan Kiszka wrote:
On 2015-02-16 15:02, Jan Kiszka wrote:
On 2015-02-16 14:51, Mark Rutland wrote:
On Mon, Feb 16, 2015 at 01:44:36PM +, Jan Kiszka wrote:
On 2015-02-16 14:37, Mark Rutland wrote:
On Mon, Feb 16, 2015 at 12:54:49PM +, Jan
Hi,
On 03/02/15 17:18, Akshay Saraswat wrote:
This patch does 3 things:
1. Enables ECC by setting 21st bit of L2CTLR.
2. Restore data and tag RAM latencies to 3 cycles because iROM sets
0x3000400 L2CTLR value during switching.
3. Disable clean/evict push to external by setting 3rd bit of
[...]
This is getting invasive:
If I add carveouts via adjusting memory banks, I need to account for the
case that an existing bank is split into two halves, creating additional
banks this way. But then current fdt_fixup_memory_banks will no longer
work due to its limitation to the
Hi,
On 03/02/15 17:18, Akshay Saraswat wrote:
L2 Auxiliary Control Register provides configuration
and control options for the L2 memory system. Bit 3
of L2ACTLR stands for clean/evict push to external.
Setting bit 3 disables clean/evict which is what
this patch intends to do.
On Tuesday, February 17, 2015 at 08:00:27 AM, Masahiro Yamada wrote:
Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Hi Marek,
I want apply this patch onto u-boot-uniphier/master
to avoid conflicts.
If you are
On Sat, Feb 07, 2015 at 09:12:39AM +0800, Axel Lin wrote:
Use fdt_for_each_subnode macro to simplify the code a bit.
Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Simon Glass s...@chromium.org
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Feb 09, 2015 at 12:06:10AM +0100, Andreas Bießmann wrote:
Commit a93648d197df48fa46dd55f925ff70468bd81c71 introduced linker generated
lists for imagetool which is the base for some host tools (mkimage, dumpimage,
et al.). Unfortunately some host tool chains do not support the used
On Tue, Feb 10, 2015 at 05:10:15PM +0100, Valentin Longchamp wrote:
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
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