On Wed, Aug 10, 2016 at 07:24:06PM +0530, Sekhar Nori wrote:
> K2G can benefit from driver model support in the
> MMC/SD driver it uses: omap_hsmmc
>
> Enable driver model MMC support for K2G.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
I've been trying to implement vboot from SPI flash on the BeagleBone Black
with only limited success. I'm working with u-boot 2016.07 and using the
instructions in beaglebone_vboot.txt (in doc directory).
So far: I've had no problem booting regular u-boot from SPI flash. I build
with
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> structure member 'cd_inverted' of omap_hsmmc_data
> is available only when OMAP_HSMMC_USE_GPIO is
> defined.
>
> When CONFIG_DM_MMC is defined, but not
> CONFIG_OMAP_GPIO, this will cause build breakage
> in omap_hsmmc driver of the sort:
On Wed, Aug 10, 2016 at 07:24:03PM +0530, Sekhar Nori wrote:
> structure member 'cd_inverted' of omap_hsmmc_data
> is available only when OMAP_HSMMC_USE_GPIO is
> defined.
>
> When CONFIG_DM_MMC is defined, but not
> CONFIG_OMAP_GPIO, this will cause build breakage
> in omap_hsmmc driver of the
Hello,
this series adds U-Boot port to Xtensa, configurable processor architecture
from Tensilica, Inc., now Cadence Design Systems Inc. It depends on the
following patch series:
- net/ethoc improvements
http://lists.denx.de/pipermail/u-boot/2016-August/263040.html
- drivers/sysreset: group
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
On Wed, Aug 10, 2016 at 10:05:03PM +0530, Mugunthan V N wrote:
> Enable eth driver model for dra7xx_evm as cpsw supports
> driver model.
>
> This was already added with the commit 641b936fa5ba but with
> commit bd7245849f7c to add fit support CONFIG_DM_ETH was missed.
>
> Signed-off-by:
DE212 is a general purpose xtensa processor without full MMU.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
DC233C is an xtensa processor with full MMUv3 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
On Wed, Aug 10, 2016 at 07:24:05PM +0530, Sekhar Nori wrote:
> The K2G EVM from TI has an SD card slot as
> well as onboard eMMC for data storage.
>
> Enable support for these.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
signature.asc
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and
From: Chris Zankel
DC232B is an xtensa processor with full MMUv2 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Chris Zankel
Signed-off-by: Max Filippov
From: Chris Zankel
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> K2G SoC from TI has two MMC/SD controllers.
> Add device tree data for these.
>
> Signed-off-by: Sekhar Nori
> ---
Acked-by: Mugunthan V N
Regards
Mugunthan V N
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> K2G can benefit from driver model support in the
> MMC/SD driver it uses: omap_hsmmc
>
> Enable driver model MMC support for K2G.
>
> Signed-off-by: Sekhar Nori
> ---
Acked-by: Mugunthan V N
On Wed, Aug 10, 2016 at 06:36:44PM +0300, Max Filippov wrote:
> From: Chris Zankel
>
> The Xtensa processor architecture is a configurable, extensible,
> and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
>
> This is the second part of the basic
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> The K2G EVM from TI has an SD card slot as
> well as onboard eMMC for data storage.
>
> Enable support for these.
>
> Signed-off-by: Sekhar Nori
Acked-by: Mugunthan V N
Regards
Mugunthan V N
On Wed, Aug 10, 2016 at 03:25:16PM +0200, Alexander Graf wrote:
>
>
> > Am 10.08.2016 um 15:16 schrieb Simon Glass :
> >
> > Hi Alex,
> >
> >> On 10 August 2016 at 07:02, Alexander Graf wrote:
> >>> On 08/10/2016 02:56 PM, Simon Glass wrote:
> >>>
> >>> +Tom
On Wed, Aug 10, 2016 at 07:24:04PM +0530, Sekhar Nori wrote:
> K2G SoC from TI has two MMC/SD controllers.
> Add device tree data for these.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
Enable eth driver model for dra7xx_evm as cpsw supports
driver model.
This was already added with the commit 641b936fa5ba but with
commit bd7245849f7c to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N
Cc: Lokesh Vutla
---
On 08/10/2016 02:56 PM, Simon Glass wrote:
+Tom
Hi Alex,
On 10 August 2016 at 01:47, Alexander Graf wrote:
On 08 Aug 2016, at 23:44, Simon Glass wrote:
Hi Alexander,
On 5 August 2016 at 06:49, Alexander Graf wrote:
When using CONFIG_BLK,
Hi,
On 9 August 2016 at 16:44, Stefan Brüns wrote:
> Signed-off-by: Stefan Brüns
> ---
> test/fs/fs-test.sh | 40
> 1 file changed, 20 insertions(+), 20 deletions(-)
I'd like to convert this
Hi Alex,
On 10 August 2016 at 07:02, Alexander Graf wrote:
> On 08/10/2016 02:56 PM, Simon Glass wrote:
>>
>> +Tom
>>
>> Hi Alex,
>>
>> On 10 August 2016 at 01:47, Alexander Graf wrote:
On 08 Aug 2016, at 23:44, Simon Glass wrote:
The K2G EVM from TI has an SD card slot as
well as onboard eMMC for data storage.
Enable support for these.
Signed-off-by: Sekhar Nori
---
arch/arm/dts/k2g-evm.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/k2g-evm.dts b/arch/arm/dts/k2g-evm.dts
On 08/10/2016 02:56 PM, Simon Glass wrote:
Hi Alex,
On 10 August 2016 at 05:49, Alexander Graf wrote:
On 08/07/2016 01:23 AM, Simon Glass wrote:
Add the required pieces to support the EFI loader on x86.
Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
> On 10 Aug 2016, at 15:33, Simon Glass wrote:
>
> Hi Alex,
>
> On 10 August 2016 at 07:25, Alexander Graf wrote:
>>
>>
>>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>>
>>> Hi Alex,
>>>
On 10 August 2016 at 07:02, Alexander
K2G can benefit from driver model support in the
MMC/SD driver it uses: omap_hsmmc
Enable driver model MMC support for K2G.
Signed-off-by: Sekhar Nori
---
configs/k2g_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/k2g_evm_defconfig
Hi Alex,
On 10 August 2016 at 07:41, Alexander Graf wrote:
>
>> On 10 Aug 2016, at 15:33, Simon Glass wrote:
>>
>> Hi Alex,
>>
>> On 10 August 2016 at 07:25, Alexander Graf wrote:
>>>
>>>
Am 10.08.2016 um 15:16 schrieb Simon Glass
On Wed, Aug 10, 2016 at 03:17:20PM +0530, Vignesh R wrote:
> Add a node for evm_3v3_sd using onboard PCF GPIO expander which feeds
> on to mmc vdd.
> Update mapping for vmmc-supply and vmmc_aux-supply.
> evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.
>
> Signed-off-by: Vignesh
K2G SoC from TI has two MMC/SD controllers.
Add device tree data for these.
Signed-off-by: Sekhar Nori
---
arch/arm/dts/k2g.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi
index
+Tom
Hi Alex,
On 10 August 2016 at 01:47, Alexander Graf wrote:
>
>> On 08 Aug 2016, at 23:44, Simon Glass wrote:
>>
>> Hi Alexander,
>>
>> On 5 August 2016 at 06:49, Alexander Graf wrote:
>>> When using CONFIG_BLK, there were 2 issues:
>>>
>>>
Hi Alex,
On 10 August 2016 at 05:49, Alexander Graf wrote:
> On 08/07/2016 01:23 AM, Simon Glass wrote:
>>
>> Add the required pieces to support the EFI loader on x86.
>>
>> Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
>> is supported. If a 64-bit
Hi Alex,
On 10 August 2016 at 07:25, Alexander Graf wrote:
>
>
>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>
>> Hi Alex,
>>
>>> On 10 August 2016 at 07:02, Alexander Graf wrote:
On 08/10/2016 02:56 PM, Simon Glass wrote:
+Tom
Hi Tom,
Please pull u-boot-sh rmobile branch.
The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-sh.git rmobile
for you to fetch
On Wed, Aug 10, 2016 at 03:17:21PM +0530, Vignesh R wrote:
> Enable DM based regulator framework and also fixed regulator support as
> some IPs like mmc use regulators for there functioning.
>
> Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
--
Tom
On 9 August 2016 at 16:44, Stefan Brüns wrote:
> Signed-off-by: Stefan Brüns
> ---
> cmd/host.c | 8
> 1 file changed, 8 insertions(+)
Acked-by: Simon Glass
Please can you add a short commit message?
>
>
structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.
When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:
CC drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In
> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>
> Hi Alex,
>
>> On 10 August 2016 at 07:02, Alexander Graf wrote:
>>> On 08/10/2016 02:56 PM, Simon Glass wrote:
>>>
>>> +Tom
>>>
>>> Hi Alex,
>>>
>>> On 10 August 2016 at 01:47, Alexander Graf
This patch set switches mmc/sd support on k2g
to use driver model.
Tested both SD card and emmc on k2g-evm by
writing data, reading it back and comparing crc.
also tested with buildman for am33xx and omap
Sekhar Nori (4):
drivers: mmc: omap_hsmmc: fix build breakage
ARM: dts: K2G: Add
Move back_to_bootrom() call later in SPL init so that the console is
initialized and printouts happen.
Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console
output from the SPL init stages.
I wasn't sure exactly where this should happen, so if we are set to do
run
The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-sh.git rmobile
for you to fetch changes up to
On Wed, Aug 10, 2016 at 11:35:47PM +0900, Nobuhiro Iwamatsu wrote:
> Hi Tom,
>
> Please pull u-boot-sh rmobile branch.
>
> The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
>
> SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
>
> are available in
> On 10 Aug 2016, at 18:25, Tom Rini wrote:
>
> On Wed, Aug 10, 2016 at 03:25:16PM +0200, Alexander Graf wrote:
>>
>>
>>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>>
>>> Hi Alex,
>>>
On 10 August 2016 at 07:02, Alexander Graf
The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 4
1 file changed, 4 insertions(+)
diff --git
This outer cache allows to control active ways independently for
each CPU, so this function will be useful to set up active ways
for a specific CPU.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 22 +-
Hi Lokesh,
On Wed, Aug 10, 2016 at 7:02 AM, Lokesh Vutla wrote:
>
>
> On Wednesday 10 August 2016 08:43 AM, Joe Hershberger wrote:
>> Hi Lokesh
>>
>> On Tue, Aug 9, 2016 at 12:47 AM, Lokesh Vutla wrote:
>>> cpsw tries to flush dcache which is not in the
Hi,
On 08/10/2016 11:51 AM, Wenyou Yang wrote:
> Convert the driver to the driver model while retaining the existing
> legacy code. This allows the driver to support boards that have
> converted to driver model as well as those that have not.
>
> Signed-off-by: Wenyou Yang
On 2016年08月10日 22:21, Sandy Patterson wrote:
Move back_to_bootrom() call later in SPL init so that the console is
initialized and printouts happen.
Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console
output from the SPL init stages.
I wasn't sure exactly where this should
Sorry..
On 08/11/2016 11:12 AM, Jaehoon Chung wrote:
> To prevent the compiler error, split the checking condition whether
> cfg->ops is NULL or not.
> It's more clearly, because it's not included in mmc_config structure
> when CONFIG_DM_MMC_OPS is disabled.
I sent the wrong patch..I will resend
To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.
drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const
Here, the ldr pseudo-instruction falls into the ldr + data set.
The register access by [r1, #offset] produces shorter code.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/lowlevel_init.S | 48 +---
1 file changed, 22
Am 2016-08-05 14:06, schrieb Michael Walle:
there doesn't seem to be a dedicated filesystem maintainer, but I've
included the original committer for the ext4 write support.
I guess the ext4 write support does not work on big-endian machines.
As far as I see, almost no fields of the ext4
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: 2016年8月10日 10:13
> To: Wenyou Yang - A41535 ; u-
> b...@lists.denx.de; pa...@antoniou-consulting.com
> Cc: h...@denx.de; s...@chromium.org; andr...@biessmann.org
>
Hello, Stefan.
I've tried your patch on Atom C2000 board (which is not supported by
U-boot, but I use U-boot
as the Coreboot payload).
I've added
/* Intel Atom processor C2000 PCU SMBus */
{ PCI_VDEVICE(INTEL, 0x1f3c) },
to intel_smbus_pci_supported for it to work.
It works and works
This invalidates entries in specified ways of the outer cache.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 10 +-
arch/arm/mach-uniphier/arm32/cache-uniphier.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
Currently, only the CPU_ON function is supported.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 2 +
arch/arm/mach-uniphier/arm32/Makefile | 1 +
arch/arm/mach-uniphier/arm32/arm-mpcore.h | 3 +
The System Cache (outer cache) is used not only as L2 cache,
but also as locked SRAM. The functions for turning on/off it
is necessary whether the L2 cache is enabled or not.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 34
Commit f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem)
boot-mode") added a change to hdr->destaddr when dynamically patching an
image for UART boot mode. With this change, kwboot ceases to work on
Kirkwood.
Thus, let's change hdr->destaddr only when we are patching an image with
Cleanups, Fixes, and PSCI support.
Masahiro Yamada (14):
ARM: uniphier: refactor outer cache code
ARM: uniphier: support prefetch and touch operations for outer cache
ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled
ARM: uniphier: refactor L2 zero-touching code in
Now, all of these macros are only used in cache-uniphier.c, so
there is no need to export them in a header file.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 56 +-
arch/arm/mach-uniphier/arm32/ssc-regs.h
As the sLD3 Boot ROM has a complex page table, it is difficult to
set up the debug UART with enabling it. It will be much easier to
initialize the UART port after switching over to the straight-mapped
page table.
Signed-off-by: Masahiro Yamada
---
> On 09 Aug 2016, at 16:35, Simon Glass wrote:
>
> Hi Alexander,
>
> On 9 August 2016 at 08:11, Alexander Graf wrote:
>>
>> On 08/09/2016 03:57 PM, Simon Glass wrote:
>>>
>>> Hi Alexander,
>>>
>>> On 9 August 2016 at 00:48, Alexander Graf
> On 08 Aug 2016, at 23:44, Simon Glass wrote:
>
> Hi Alexander,
>
> On 5 August 2016 at 06:49, Alexander Graf wrote:
>> When using CONFIG_BLK, there were 2 issues:
>>
>> 1) The name we generate the device with has to match the
>> name we set in
I have u-boot built and can completely boot the pi with u-boot on the SD card.
But, the video resolution start off correctly, and when the kernel starts
switches to a low resolution.
Any suggestions?
Duncan Hare
714 931 7952
___
U-Boot mailing list
Hi Joe,
On 10 August 2016 at 10:43, Joe Desbonnet wrote:
>
> I've been trying to implement vboot from SPI flash on the BeagleBone Black
> with only limited success. I'm working with u-boot 2016.07 and using the
> instructions in beaglebone_vboot.txt (in doc directory).
>
>
The DRAM is available at this point, so setup the temporary stack
and call the C function to reduce the code duplication a bit.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/late_lowlevel_init.S | 10 +++---
1 file changed, 3 insertions(+),
Commit 4b50369fb535 ("ARM: uniphier: create early page table at
run-time") broke the ROM boot mode for PH1-sLD3 SoC, because the
run-time page table creation requires the outer cache register
access but the page table in the sLD3 Boot ROM does not straight-map
virtual/physical addresses.
The idea
Unify the range/all operation routines into the common function,
uniphier_cache_maint_common(), and sync code with Linux a bit more.
This reduces the code duplication.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 99
If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never
enabled, so there is no need for v7_outer_cache_disable(). The weak
stub avoids the compile error anyway.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 2 +-
1
Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER.
The new option name makes sense enough, and the same as Linux has.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 7 +++
The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as
SRAM by locking ways.
These functions will be used to transfer the trampoline code for SMP
into the locked SRAM.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c |
Hi Simon,
Also see cli_process_fdt() which allows you to lock out commands using
a device-tree setting. This avoids changing the U-Boot binary - it is
easy enough to update the device tree using fdtput. This is how Chrome
OS did it.
Hmm, interesting approach. Thanks for your suggestion.
Petr
Enable DM based regulator framework and also fixed regulator support as
some IPs like mmc use regulators for there functioning.
Signed-off-by: Vignesh R
---
configs/dra7xx_evm_defconfig| 3 +++
configs/dra7xx_hs_evm_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff
Add a node for evm_3v3_sd using onboard PCF GPIO expander which feeds
on to mmc vdd.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.
Signed-off-by: Vignesh R
---
arch/arm/dts/dra7-evm.dts | 12 +++-
Some IPs like MMC use PCF GPIO lines as fixed regulator, hence add
support for the same.
Vignesh R (2):
ARM: dts: dra7xx-evm: add evm_3v3_sd regulator
ARM: dra7xx_evm: Enable regulator DM support
arch/arm/dts/dra7-evm.dts | 12 +++-
arch/arm/dts/dra72-evm.dts | 12
Hi Fabio,
> On Tue, Aug 9, 2016 at 5:41 AM, Lukasz Majewski
> wrote:
> > Change made in the commit:
> > "arm: Show cache warnings in U-Boot proper only"
> > SHA1: bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc
> >
> > has revealed that during initial setting of MMU regions in the
On Wed, Aug 10, 2016 at 09:53:03AM +0200, Michael Walle wrote:
> Am 2016-08-05 14:06, schrieb Michael Walle:
> >there doesn't seem to be a dedicated filesystem maintainer, but I've
> >included the original committer for the ext4 write support.
> >
> >I guess the ext4 write support does not work on
On 08/07/2016 01:23 AM, Simon Glass wrote:
These are missing in some functions. Add them to keep things consistent.
Signed-off-by: Simon Glass
Is there any way to change the EFIAPI definition so that we get build
warnings for non matching function types on aarch64 as
On 08/07/2016 01:23 AM, Simon Glass wrote:
Add the required pieces to support the EFI loader on x86.
Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
is supported. If a 64-bit kernel must be booted, U-Boot supports this
directly using FIT (see
On Wednesday 10 August 2016 08:43 AM, Joe Hershberger wrote:
> Hi Lokesh
>
> On Tue, Aug 9, 2016 at 12:47 AM, Lokesh Vutla wrote:
>> cpsw tries to flush dcache which is not in the range of PKTSIZE.
>> Because of this the following warning comes while flushing:
>>
>> CACHE:
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