i2c should be initialized with device-tree.
This function doesn't need anymore.
Signed-off-by: Jaehoon Chung
---
board/samsung/trats/trats.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index
Trats has the i2c gpio for fuel-gaugge.
This patch s for preparing to use the fuel-gauge.
Signed-off-by: Jaehoon Chung
---
arch/arm/dts/exynos4210-trats.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/exynos4210-trats.dts
On 28.03.2017 17:36, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015 standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots
Enable the CONFIG_DM_I2C_GPIO for using i2c gpio
Signed-off-by: Jaehoon Chung
---
configs/trats_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 2be05ff..23024fd 100644
--- a/configs/trats_defconfig
+++
On 28.03.2017 17:16, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.
Signed-off-by:
(adding Simon to Cc for PCI related question)
On 28.03.2017 17:36, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Add PCIe initialization at early init stage.
This operation has a side effect of detecting all PCIe
plug-in cards, so the operator is not obligated to
Enable the CONFIG_DM_PMIC and PMIC_MAX8997.
Also use the CONFIG_SYS_I2C_S3C24X0 for using I2C.
Signed-off-by: Jaehoon Chung
---
configs/trats_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index
Convert to driver model for controlling phy.
Signed-off-by: Jaehoon Chung
---
board/samsung/trats/trats.c | 75 +
1 file changed, 48 insertions(+), 27 deletions(-)
diff --git a/board/samsung/trats/trats.c
These codes are unnecessary, because max8997 should be initialized with
dt-file.
Remove max8997_init() function.
Signed-off-by: Jaehoon Chung
---
board/samsung/trats/trats.c | 161 +---
1 file changed, 1 insertion(+), 160
This patchset is for converting to driver model.
This task is working in progress.
Some codes should be remained to legacy mode, it will be converted in future.
Jaehoon Chung (6):
configs: trats: enable the CONFIG_DM_PMIC and PMIC_MAX8997
board: samsung: trats: remove the unnecessary codes
Hi Jaehoon,
> This patchset is for converting to driver model.
> This task is working in progress.
> Some codes should be remained to legacy mode, it will be converted in
> future.
Acked-by: Lukasz Majewski
>
> Jaehoon Chung (6):
> configs: trats: enable the CONFIG_DM_PMIC
On 28.03.2017 17:36, kos...@marvell.com wrote:
From: Konstantin Porotchkin
This patch allows probing all PCIe nodes defined in DTS
even if there no device connected to such node (no link).
Without this fix the driver returns -ENODEV when the PCIe
link is down. As result the
On 28.03.2017 17:16, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Implement mvebu_get_nand_clock call for A8K family.
This function is used by PXA3XX NAND driver.
Signed-off-by: Konstantin Porotchkin
Cc: Stefan Roese
Cc: Igal
In data domenica 19 marzo 2017 23:14:14 CEST, Diego ha scritto:
> Hi all,
>
> I'm trying to use the multi-file format mentioned in pages 12-13 of "U-Boot
> – Multi image booting scenarios" PDF slides.
>
> I'd like to use FIT format, but I already have units in the field without
> CONFIG_FIT.
>
Change the buck8's min-microvolt to 75.
Whent thor protocol is used, board_usb_init() should be tried to set to
75. But it was returned -EINVAL, because '75' too lower than
285. (thor command doesn't work fine because of this problem.)
Signed-off-by: Jaehoon Chung
This introduces two Kconfig options to enable board specific filenames
for the Intel binary blobs to be used to generate the SPI flash image.
Signed-off-by: Stefan Roese
Cc: Bin Meng
Cc: Simon Glass
---
arch/x86/Kconfig | 16
Now that we have added file names from Kconfig in x86 u-boot.dtsi,
update binman to avoid using hard-coded names.
Signed-off-by: Stefan Roese
Cc: Bin Meng
Cc: Simon Glass
---
tools/binman/etype/intel_descriptor.py | 3 ---
Since we now have the file names configurable via Kconfig for the flash
descriptor and intel-me files, add these from Kconfig in the corresponding
dts nodes.
Signed-off-by: Stefan Roese
Cc: Bin Meng
Cc: Simon Glass
---
Most of the time the optimised memset() is what we want. For extreme
situations such as TPL it may be too large. For example on the 'rock'
board, using a simple loop saves a useful 48 bytes. With gcc 4.9 and
the rodata bug, this patch is enough to reduce the TPL image below the
limit.
From: Jagan Teki
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
From: Jagan Teki
Add initial devicetree support for i.MX6 Quad Sabresd board.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
From: Jagan Teki
Add initial dts support for i.MX6 Quad Sabresd board.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
From: Jagan Teki
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Boot from MMC:
-
U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29)
Trying to boot from MMC1
U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)
From: Jagan Teki
Add common minimal dtsi file for i.MX6QDL Sabresd boards,
- uart1
- usdhc2
- usdhc3
- usdhc4
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
On 30/03/2017 06:57, york sun wrote:
Sorry for top posting. I am using OWA which doesn't do inline reply.
Jaehoon,
The trouble is the env_init() returns the default environment for SPL part. It
means whatever variables I saved doesn't get loaded during the SPL part. It is
only available
I believe the cache API has some problem on armv7, at least
invalidate_dcache_range()
does not work as expected.
I get one issue on rk3288 dwc2 host driver:
- connect U-Disk and run 'usb start';
- write gpt table to it with 'gpt write usb 0 $partitions'
- check the partition table with
Hi,
Please provide a commit message.
On 03/25/17 01:19, Vikas Manocha wrote:
Signed-off-by: Vikas Manocha
---
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 81f47ef..a1c4d16 100644
--- a/lib/fdtdec.c
From: Jagan Teki
This series add initial devicetree support for i.MX6 Quad and Quad Plus
SabreSD boards. Since fdt require some more time to stable, this series
add new defconfigs for quad and quadplus boards by make other deconfigs
unchange.
Once more fdt nodes and
On 2017-03-30 00:14, Sanchayan Maity wrote:
> From: Stefan Agner
>
> Users control the graphical content of the panel by manipulating
> configuration of elements in DCU4 called layers. The number of
> layers is different for Vybrid and LS102XA SoC's. Update this
> to
On 03/30/2017 04:31 PM, Stefan Roese wrote:
(adding Simon to Cc for PCI related question)
On 28.03.2017 17:36, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Add PCIe initialization at early init stage.
This operation has a side effect of detecting all PCIe
On 03/30/2017 02:06 AM, Jean-Jacques Hiblot wrote:
>
>
> On 30/03/2017 06:57, york sun wrote:
>> Sorry for top posting. I am using OWA which doesn't do inline reply.
>>
>> Jaehoon,
>>
>> The trouble is the env_init() returns the default environment for SPL part.
>> It means whatever variables I
os.read() returns a byte array in Python 3.5.2 and needs to be converted
into a string. Check if the returned value is an instance of bytes and
if it is decode it as a utf-8 string. If it is not a utf-8 encoded string
the decoding may fail with an exception.
Prior to this fix the comparisions
Hi, Stefan,
On 03/30/2017 04:15 PM, Stefan Roese wrote:
On 28.03.2017 17:16, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Implement mvebu_get_nand_clock call for A8K family.
This function is used by PXA3XX NAND driver.
Signed-off-by: Konstantin Porotchkin
Dear Diego,
In message <3013204.RF8YVXT0ez@localhost.localdomain> you wrote:
>
> > Which format should be used for the ramdisk? ext3.gz initrd? cpio.gz
> > initramfs?
Actually this is independent of U-Boot.
> as I've found the solution, I'll reply myself in the hope it might help
> somebody in
With Python 3.5.2 encode will throw an exception if val is a byte array.
Decode it to a string first. This assumes it's utf-8, if it's not valid
utf-8 it will throw an exception.
Signed-off-by: George McCollister
---
tools/dtoc/fdt_util.py | 2 ++
1 file changed, 2
On 2017-03-30 10:54, Jelle van der Waa wrote:
> On 03/28/17 at 05:30pm, Stefan Agner wrote:
>> Hi,
>>
>> When I try to compile U-Boot on my Arch Linux system I get the following
>
> Python 3 needs some more TLC, I've been hacking on making binman work
> out of the box with Python 3 (and retaining
On 03/10/2017 09:42 AM, Tom Rini wrote:
> On Thu, Mar 09, 2017 at 09:12:56PM +0100, Lukasz Majewski wrote:
>> On Thu, 9 Mar 2017 08:08:20 -0500
>> Tom Rini wrote:
>>
>>> On Thu, Mar 02, 2017 at 01:04:16PM -0600, Franklin S Cooper Jr wrote:
>>>
Runtime U-boot dtb
On 03/28/17 at 05:30pm, Stefan Agner wrote:
> Hi,
>
> When I try to compile U-Boot on my Arch Linux system I get the following
Python 3 needs some more TLC, I've been hacking on making binman work
out of the box with Python 3 (and retaining Python 2 compatibility). But
haven't been able to get
Hi Marek,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vikas Manocha
> Sent: Monday, March 27, 2017 2:33 PM
> To: Marek Vasut ; u-boot@lists.denx.de
> Cc: Christophe KERELLO ; Toshifumi NISHINAGA
>
On 03/21/2017 07:25 PM, Tom Rini wrote:
> On Tue, Mar 21, 2017 at 01:52:07PM -0500, Franklin S Cooper Jr wrote:
>>
>>
>> On 03/20/2017 11:57 PM, Vignesh R wrote:
>>>
>>>
>>> On Saturday 18 March 2017 08:04 PM, Tom Rini wrote:
>> And can we not move towards the "normal" method of SPL loading
Hi Igor,
> -Original Message-
> From: Igor Grinberg [mailto:grinb...@compulab.co.il]
> Sent: Thursday, March 30, 2017 1:59 AM
> To: Vikas MANOCHA ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH] fdt: allow address translation in case of
> SPL_OF_TRANSLATE
>
>
fyi: these are board only, SPL/device tree will need a bigger resync
on am33xx from kernel.rog
Regards,
On Thu, Mar 30, 2017 at 2:29 PM, Robert Nelson wrote:
> BeagleBone Black Wireless is clone of the BeagleBone Black (BBB) with
> the Ethernet replaced by a TI wl1835
On Thu, Mar 30, 2017 at 8:08 AM, Ley Foon Tan wrote:
> Restructure clock manager driver in the preparation to support A10.
> Move the Gen5 specific code to _gen5 files. No functional change.
>
> Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
>
>
BeagleBone Blue is next grenation of boards from BeagleBoard.org, focusing
on robotics with a TI wl1835 wireless module for connectivity.
This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 4c 41 30
SeeedStudio BeagleBone Green Wireless (BBGW) is an expansion of the
SeeedStudio Green (BBG) with the Ethernet replaced by a TI wl1835
wireless module.
This board can be indentified by the GW1x value after A335BNLT (BBB)
in the at24 eeprom:
GW1x [aa 55 33 ee 41 33 33 35 42 4e 4c 54 47 57 31 41
BeagleBone Black Wireless is clone of the BeagleBone Black (BBB) with
the Ethernet replaced by a TI wl1835 wireless module.
This board can be indentified by the BWAx value after A335BNLT (BBB)
in the at24 eeprom:
BWAx [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 57 41 35 |.U3.A335BNLTBWA5|]
HI Jernej
2017-03-30 7:23 GMT+08:00 Jernej Skrabec :
> Sort rk3288 boards in alphabetical order.
>
> Signed-off-by: Jernej Skrabec
>
Reviewed-by: Eddie Cai
> ---
> Changes in v3:
> - new patch
>
>
HI Jernej
2017-03-30 7:23 GMT+08:00 Jernej Skrabec :
> MiQi is rk3288 based development board with 1 or 2 GB SDRAM, 16 GB eMMC,
> micro SD card interface, 4 USB 2.0 ports, HDMI, gigabit Ethernet and
> expansion ports.
>
> Signed-off-by: Jernej Skrabec
Hello,
This patchset adds support for the Freescale/NXP Display Controller Unit (DCU4)
for Vybrid which is found on the LS1021A and Vybrid SoC.
Patch series is based on top of latest u-boot master.
First patch in the series renames existing CONFIG_FSL_DCU_FB to
CONFIG_VIDEO_FSL_DCU_FB and then
From: Stefan Agner
Fix the framebuffer location to the very end of the available memory.
This allows to remove the area from available memory for the kernel,
which in turn allows to display the splash screen through the while
Linux kernel boot process.
Ideas has been
From: Stefan Agner
Add common widescreen modes 800x480 and 1024x600.
Signed-off-by: Stefan Agner
Signed-off-by: Sanchayan Maity
---
drivers/video/fsl_dcu_fb.c | 61 --
1
From: Stefan Agner
When enabling the DCU and pixel clock, the test mode is activated
since this is the reset configuration. The test mode immediately
shows a red screen on a LCD. A moment later, the DCU gets
initialized properly.
This patch enables the pixel clock
Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB
and convert it to Kconfig.
Signed-off-by: Sanchayan Maity
---
arch/arm/cpu/armv7/ls102xa/soc.c| 2 +-
board/freescale/ls1021aiot/Makefile | 2 +-
board/freescale/ls1021aqds/Makefile
From: Stefan Agner
The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Toradex Colibri Vybrid
module.
Signed-off-by: Sanchayan Maity
From: Stefan Agner
Users control the graphical content of the panel by manipulating
configuration of elements in DCU4 called layers. The number of
layers is different for Vybrid and LS102XA SoC's. Update this
to reflect for LS102XA accordingly and for use with Vybrid.
On Thu, Mar 30, 2017 at 8:08 AM, Ley Foon Tan wrote:
> Restructure reset manager driver in the preparation to support A10.
> Move the Gen5 specific code to gen5 files. Minor update in
> socfpga_per_reset().
> No functional change.
>
> Signed-off-by: Ley Foon Tan
On Thu, Mar 30, 2017 at 8:08 AM, Ley Foon Tan wrote:
> Restructure misc driver in the preparation to support A10.
> Move the Gen5 specific code to gen5 file. No functional change.
>
> Change all uint32_t_to u32.
>
> Signed-off-by: Ley Foon Tan
>
On Thu, Mar 30, 2017 at 8:08 AM, Ley Foon Tan wrote:
> Add i2c, timer and other A10 macros.
>
> Signed-off-by: Ley Foon Tan
> ---
> arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
Hi Jaehoon,
Philipp has send out another patch for disable t he secure region,
and this patch is no need now.
Thanks,
- Kever
On 03/30/2017 01:04 PM, Jaehoon Chung wrote:
On 03/30/2017 12:01 PM, Kever Yang wrote:
Hi Philipp,
On 03/29/2017 08:59 PM, Dr. Philipp Tomsich wrote:
On 03/27/2017 06:12 PM, Mingkai Hu wrote:
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Tuesday, March 28, 2017 1:57 AM
>> To: york sun
>> Cc: Jagan Teki ; u-boot@lists.denx.de; Mingkai Hu
>>
Address translation is not working at present even if SPL_OF_TRANSLATE is
enabled which makes this configuration useless. This patch enables address
translation for SPL u-boot when SPL_OF_TRANSLATE is selected.
Signed-off-by: Vikas Manocha
---
Changed in v2:
- Added commit
On 03/29/2017 07:21 AM, Ruchika Gupta wrote:
> From: Vinitha Pillai-B57223
>
> - Add SD secure boot target for ls1046ardb.
> - Implement board specific spl_board_init() to setup CAAM stream ID and
> corresponding stream ID in SMMU.
> - Change the u-boot size defined by a
BLOB feature is not required during SPL compilation.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
Changes in v2:
Changed the commit message.
Since BLOB feature is not to be used on T1042RDB, it is removed
BLOB feature is not required during SPL compilation.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
Changes in v2:
Changed the commit message.
Since BLOB feature is not to be used on T1042RDB, it is removed
> -Original Message-
> From: york sun
> Sent: Friday, March 31, 2017 6:16 AM
> To: Ruchika Gupta ; u-boot@lists.denx.de
> Cc: Vini Pillai ; Sumit Garg
> Subject: Re: [PATCH 3/3][v3] [RESEND] arm: ls1046ardb: Add SD secure
Hi York,
Sorry, for the delayed response! The commit message wasn't appropriate for the
patch, so it has been changed and a new version of that patch has been sent.
Since, BLOB feature is not required for T1042 NAND Secure boot, it has been
removed from SPL compilation, also considering SPL
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