On Mon, Oct 29, 2018 at 11:36 PM Belisko Marek wrote:
>
> Hi,
>
> I'm working on custome am33xx based HW which have no external 32KHz
> crystal. Anyway I want to use bootcount feature. I was trying to use
> internal PRCM CLK_32KHZ clock as source for RTCSS but still when want
> to read RTC
于 2018年10月30日 GMT+08:00 下午2:27:43, Jagan Teki 写到:
>On Sat, Oct 27, 2018 at 10:41 AM Icenowy Zheng wrote:
>>
>> From: Jun Nie
>>
>> Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC,
>16-bit
>> 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and
>one
>>
On Sat, Oct 27, 2018 at 10:41 AM Icenowy Zheng wrote:
>
> From: Jun Nie
>
> Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit
> 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one
> powering-only) and a miniHDMI port.
>
> Signed-off-by: Icenowy Zheng
>
On Tue, 30 Oct 2018 10:51:51 +0100
Stefan Roese wrote:
> Calling "mtdparts" currently fails when its called before any other mtd
> command (or ubi command) has been called. The MTD devices are not
> probed at this point and therefore it fails e.g. with this message:
>
> => mtdparts
> Device
Hi Boris,
On 30.10.18 11:03, Boris Brezillon wrote:
On Tue, 30 Oct 2018 10:51:51 +0100
Stefan Roese wrote:
Calling "mtdparts" currently fails when its called before any other mtd
command (or ubi command) has been called. The MTD devices are not
probed at this point and therefore it fails
Stefan Roese schrieb am Di., 30. Okt. 2018, 10:36:
> Hi Simon,
>
> On 30.10.18 10:07, Simon Goldschmidt wrote:
> >
> >
> > Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
> 2018, 10:00:
> >
> > Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM")
> broke
> >
On 10/29/2018 08:21 PM, Michael Heimpold wrote:
> This prevents the warning message
> "No arch specific invalidate_icache_all available!"
> during boot.
Can you implement it ? The cache support worked on MX23.
> Signed-off-by: Michael Heimpold
> ---
> configs/mx23_olinuxino_defconfig | 1 -
>
If System interface protocol is USXGMII then enable USXGMII autoneg
Signed-off-by: Valentin Catalin Neacsu
---
drivers/net/phy/aquantia.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 6678147545..603abb5a7f
On 30.10.18 11:41, Boris Brezillon wrote:
On Tue, 30 Oct 2018 11:13:37 +0100
Stefan Roese wrote:
Hi Boris,
On 30.10.18 11:03, Boris Brezillon wrote:
On Tue, 30 Oct 2018 10:51:51 +0100
Stefan Roese wrote:
Calling "mtdparts" currently fails when its called before any other mtd
command
On Tue, 30 Oct 2018 11:13:37 +0100
Stefan Roese wrote:
> Hi Boris,
>
> On 30.10.18 11:03, Boris Brezillon wrote:
> > On Tue, 30 Oct 2018 10:51:51 +0100
> > Stefan Roese wrote:
> >
> >> Calling "mtdparts" currently fails when its called before any other mtd
> >> command (or ubi command) has
Print information about Aquantia firmware loaded on the phy
Signed-off-by: Valentin Catalin Neacsu
---
drivers/net/phy/aquantia.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 603abb5a7f..eb3950092d 100644
On 2018-09-27 22:45, Rasmus Villemoes wrote:
> In the case where one deletes an already-non-existing variable, or sets
> a variable to the value it already has, there is no point in writing the
> environment back, thus reducing wear on the underlying storage
> device.
>
> In the case of redundant
On 10/30/2018 09:13 AM, Bin Meng wrote:
On Thu, Oct 25, 2018 at 10:25 PM Hannes Schmelzer
wrote:
This commit ports the existing (non-DM) function for writing the MAC-
address into the shadow ram (and flash) for DM.
Signed-off-by: Hannes Schmelzer
---
Changes in v2:
- fix build for non-DM
RISC-V does not guarantee that stores to instruction memory are visible
to instruction fetches (i.e. incoherent instruction caches). Invalidate
the instruction cache to ensure the kernel function pointer points to
the correct memory location.
Signed-off-by: Lukas Auer
---
Changes in v2:
-
Use the new Kconfig entries to construct the ISA string for the -march
compiler flag. The -mabi compiler flag is selected based on the base
integer instruction set.
With this change, the C (compressed instructions) ISA extension is now
enabled for all boards with CONFIG_RISCV_ISA_C set. Buildman
The bootm implementation of RISC-V diverges from that of other
architectures. Update it to match the implementation of other
architectures. The ARM implementation is used as a reference.
This adds the following features and changes to RISC-V.
* Add support for the BOOTM_STATE_OS_FAKE_GO command
*
Only the first four exception codes are defined. Add the missing
exception codes from the definition in RISC-V Privileged Architecture
Version 1.10.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/lib/interrupts.c | 13 -
On 30.10.18 13:55, Lukas Auer wrote:
> The device tree passed by the prior boot stage can be used to boot
> Linux. Store it as environment variable "prior_stage_dtb", so that it
> can be used as part of the boot command.
>
> Signed-off-by: Lukas Auer
> ---
>
> Changes in v2:
> - New patch
>
On 10/30/2018 02:13 PM, Stefan Roese wrote:
> On 30.10.18 14:02, Simon Goldschmidt wrote:
>>
>>
>> Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
>> 2018, 13:50:
>>
>> On 30.10.18 13:37, Simon Goldschmidt wrote:
>> > On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese >
From: Hou Zhiqiang
The CONFIG of LX2160A PCIe driver is PCIE_LX instead of
PCIE_LAYERSCAPE.
Signed-off-by: Hou Zhiqiang
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
From: Hou Zhiqiang
Add PCIe driver for the NXP LX series SoCs. This PCIe controller
is based on the Mobiveil IP, which is compatible with the PCI
Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Bao Xiaowei
---
drivers/pci/Kconfig | 8 +
From: Hou Zhiqiang
The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.
Signed-off-by: Hou Zhiqiang
---
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
Hi Rick,
On Tue, 2018-10-30 at 10:48 +0800, Rick Chen wrote:
> Auer, Lukas 於 2018年10月29日 週一
> 下午8:13寫道：
> >
> > Hi Rick,
> >
> > On Mon, 2018-10-29 at 11:16 +0800, Rick Chen wrote:
> > > Auer, Lukas 於 2018年10月27日 週六
> > > 上午12:32寫道：
> > > >
> > > > Hi Rick,
> > > >
> > > > On Mon,
From: Bin Meng
This is now deprecated and no board is using it. Drop it.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
Signed-off-by: Lukas Auer
---
Changes in v2:
- New patch to replace patch "riscv: remove CONFIG_INIT_CRITICAL"
arch/nds32/cpu/n1213/start.S | 51
QEMU specifies the location of Linux (supplied with the -kernel
argument) in the device tree using the riscv,kernel-start and
riscv,kernel-end properties. We currently rely on the SBI implementation
of BBL to run Linux and therefore embed Linux as payload in BBL. This
causes an issue, because BBL
RISC-V U-Boot reimplements the generic io functions from
asm-generic/io.h. Remove the redundant implementation and include the
generic io.h instead.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/include/asm/io.h | 31
The labels nmi_vector, trap_vector and handle_reset in start.S are not
used for RISC-V. Remove them.
Signed-off-by: Lukas Auer
---
Changes in v2:
- Drop removal of code that stores the contents of a2; this broke the
board ax25-ae350. The code will be removed again in a future patch.
Add Kconfig entries for the C (compressed instructions) and A (atomic
instructions) ISA extensions. Only the C ISA extension is selectable.
This matches the configuration in Linux.
The Kconfig entries are not used yet. A follow-up patch will select the
appropriate compiler flags based on the
On 30.10.18 14:02, Simon Goldschmidt wrote:
Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
2018, 13:50:
On 30.10.18 13:37, Simon Goldschmidt wrote:
> On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese mailto:s...@denx.de>> wrote:
>>
>> On 30.10.18 12:17, Simon
Hi Masahiro,
On 30.10.18 14:20, Masahiro Yamada wrote:
> Hi Alex,
>
>
> Could you teach me a little bit
> about efi_loader?
>
> I guess I am seriously missing something,
> but how to pass initramdisk address when you use
> bootefi (like when you use 'booti') ?
>
>
> What I did:
>
>>
On Tue, 30 Oct 2018 11:59:13 +0100
Stefan Roese wrote:
> On 30.10.18 11:41, Boris Brezillon wrote:
> > On Tue, 30 Oct 2018 11:13:37 +0100
> > Stefan Roese wrote:
> >
> >> Hi Boris,
> >>
> >> On 30.10.18 11:03, Boris Brezillon wrote:
> >>> On Tue, 30 Oct 2018 10:51:51 +0100
> >>> Stefan
From: Hou Zhiqiang
Add PCIe driver for the NXP LX series SoCs.
Hou Zhiqiang (8):
armv8: fsl-layerscpae: correct the PCIe controllers' region size
armv8: lx2160a: add MMU table entries for PCIe
pci: Add pcie controller driver for NXP LX SoCs
kconfig: add dependency PCIE_LX for
From: Hou Zhiqiang
The lx2160a have up to 6 PCIe controllers and have different
address and size of PCIe region.
Signed-off-by: Hou Zhiqiang
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 12
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 ++
Marek Vasut schrieb am Di., 30. Okt. 2018, 14:24:
> On 10/30/2018 02:13 PM, Stefan Roese wrote:
> > On 30.10.18 14:02, Simon Goldschmidt wrote:
> >>
> >>
> >> Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
> >> 2018, 13:50:
> >>
> >> On 30.10.18 13:37, Simon Goldschmidt wrote:
>
Hi Rick,
On Tue, 2018-10-30 at 09:49 +0800, Rick Chen wrote:
> Auer, Lukas 於 2018年10月30日 週二
> 上午12:43寫道：
> >
> > Hi Rick,
> >
> > On Thu, 2018-10-25 at 15:56 +, Auer, Lukas wrote:
> > > Hi Rick,
> > >
> > > On Thu, 2018-10-25 at 09:16 +0800, Rick Chen wrote:
> > > > Auer, Lukas 於
The RISC-V arch incorrectly uses 32-bit instead of 64-bit variables in
several places. Fix this.
In addition, BITS_PER_LONG is set to 64 on RV64I systems.
Signed-off-by: Lukas Auer
---
Changes in v2:
- Remove 0-padding in the format string to avoid printing 16 digits on
RV32I systems
The mstatus CSR includes WPRI (writes preserve values, reads ignore
values) fields and must therefore not be set to zero without preserving
these fields. It is not apparent why mstatus is set to zero here since
it is not required for U-Boot to run. Remove it.
This instruction and others encode
Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.S to
avoid overwriting it.
The device tree is also stored in memory to make it available to U-Boot
with the configuration CONFIG_OF_PRIOR_STAGE.
Signed-off-by:
CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index
QEMU embeds the location of the kernel image in the device tree. Store
this address in the environment as variable kernel_start and use it in
CONFIG_BOOTCOMMAND to boot the kernel. Use the device tree passed by the
prior boot stage to boot Linux.
Signed-off-by: Lukas Auer
---
Changes in v2:
-
Signed-off-by: Lukas Auer
---
Changes in v2:
- Move prototype location to match the location of the function in
ofnode.c
include/dm/ofnode.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 2fc9fa39a3..92539b8b5f 100644
---
On Tue, Sep 4, 2018 at 2:24 PM Bernhard Messerklinger
wrote:
>
> Hi Jagan,
>
> it's not about any size constraint.
> To my understanding the macro CONFIG_IS_ENABLED(DM_SPI) is true if
> CONFIG_SPL_DM_SPI is defined during SPL build. Please tell me if I am
> wrong.
> At the moment this
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
arch/arm/dts/fsl-lx2160a.dtsi | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index b407dc6e13..9654fb46a1 100644
---
On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote:
> QEMU embeds the location of the kernel image in the device tree.
> Store
> this address in the environment as variable kernel_start and use it
> in
> CONFIG_BOOTCOMMAND to boot the kernel. Use the device tree passed by
> the
> prior boot stage
On 10/30/2018 04:00 PM, Simon Goldschmidt wrote:
>
>
> Marek Vasut mailto:ma...@denx.de>> schrieb am Di., 30.
> Okt. 2018, 14:24:
>
> On 10/30/2018 02:13 PM, Stefan Roese wrote:
> > On 30.10.18 14:02, Simon Goldschmidt wrote:
> >>
> >>
> >> Stefan Roese mailto:s...@denx.de>
On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
>
> On 30.10.18 12:17, Simon Goldschmidt wrote:
>
>
>
> > > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > > index 2330143cf1..bd8f5c8c41 100644
> > > ---
RISC-V has two code models, medium low (medlow) and medium any (medany).
Medlow limits addressable memory to a single 2 GiB range between the
absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory
to any single 2 GiB address range.
By default, medlow is selected on 32-bit systems
The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.
This patch also removes the global directive for trap_entry, which is
not required.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
---
Changes in v2: None
Support booting Linux (as payload of BBL) from FIT images. For this, the
default CONFIG_SYS_BOOTM_LEN is increased to 16 MB, and the environment
variables fdt_high and initrd_high are set to mark the device tree and
initrd as in-place.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
---
Replace the barrier functions in arch/riscv/include/asm/io.h with those
defined in barrier.h, which is imported from Linux. This version is
modified to remove the include statement of asm-generic/barrier.h, which
is not available in U-Boot or required.
Signed-off-by: Lukas Auer
Reviewed-by: Bin
start.S uses both tabs and spaces after instructions. Fix this by only
using tabs after instructions.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/cpu/start.S | 322 -
1 file changed, 161
Hi Alex,
Could you teach me a little bit
about efi_loader?
I guess I am seriously missing something,
but how to pass initramdisk address when you use
bootefi (like when you use 'booti') ?
What I did:
> tftpboot 9000 Image
> tftpboot 9800 uniphier-ld11-global.dtb
> bootefi
> Von: Bernhard Messerklinger/Eggelsberg/AT/B
> An: Jagan Teki ,
> Kopie: Jagan Teki , U-Boot-Denx
> Datum: 04.09.2018 10:54
> Betreff: Antwort: Re: [U-Boot] [PATCH] spi: mxc_spi: Fix chipselect
> with DM_SPI in SPL
>
> Hi Jagan,
>
> it's not about any size constraint.
> To my understanding
On Tue, Oct 30, 2018 at 02:44:29PM +0100, Patrick Delaunay wrote:
> + Update the function syscon_node_to_regmap() to force bound on
> syscon uclass and directly use the list of device from DM.
> + Remove the static list syscon_list.
>
> This patch avoid issue (crash) when
On Tue, 2018-10-30 at 14:53 +0100, Alexander Graf wrote:
>
> On 30.10.18 14:44, Auer, Lukas wrote:
> > On Tue, 2018-10-30 at 14:19 +0100, Alexander Graf wrote:
> > >
> > > On 30.10.18 13:55, Lukas Auer wrote:
> > > > The device tree passed by the prior boot stage can be used to
> > > > boot
> >
Undefined exception codes currently lead to an out-of-bounds array
access. Prevent this by treating undefined exception codes as
"reserved".
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/lib/interrupts.c | 8 ++--
1 file
Implement the functions invalidate_icache_range() and
invalidate_icache_all().
RISC-V does not have instructions for explicit cache-control. The
functions in this patch are implemented with the memory ordering
instruction for synchronizing the instruction and data streams. This may
be implemented
QEMU provides a device tree, which is passed to U-Boot using register
a1. We are now able to directly select the device tree with the
configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in
qemu-riscv with it.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
Hang on unhandled exceptions to prevent execution in a faulty state.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/lib/interrupts.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/lib/interrupts.c
Enable the -fdata-sections compiler option for RISC-V. Buildman reports
the binary size decrease from this as 8365.3 bytes.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/config.mk | 3 ++-
1 file changed, 2 insertions(+), 1
The device tree passed by the prior boot stage can be used to boot
Linux. Store it as environment variable "prior_stage_dtb", so that it
can be used as part of the boot command.
Signed-off-by: Lukas Auer
---
Changes in v2:
- New patch
arch/Kconfig | 1 +
Stefan Roese schrieb am Di., 30. Okt. 2018, 13:50:
> On 30.10.18 13:37, Simon Goldschmidt wrote:
> > On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
> >>
> >> On 30.10.18 12:17, Simon Goldschmidt wrote:
> >>
> >>
> >>
> >>> > diff --git a/include/configs/socfpga_common.h
>
Hi Tom
> From: Tom Rini
> Sent: mardi 30 octobre 2018 14:52
> Subject: Re: [PATCH] syscon: update syscon_node_to_regmap to use the DM
> functions
>
> On Tue, Oct 30, 2018 at 02:44:29PM +0100, Patrick Delaunay wrote:
> > + Update the function syscon_node_to_regmap() to force bound on
> >
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
configs/lx2160ardb_tfa_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index fb1102ec64..64cc31d475 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
include/configs/lx2160a_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 41931e5b53..19053b43a1 100644
--- a/include/configs/lx2160a_common.h
+++
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
dts/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dts/Makefile b/dts/Makefile
index 9a9a3d5c98..cd6e9a968e 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -61,4 +61,4
RISC-V defines the base integer instruction sets as RV32I and RV64I.
Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to
match this convention.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
arch/riscv/Kconfig |
Ignore tools/prelink-riscv.
Signed-off-by: Lukas Auer
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
Changes in v2: None
tools/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/.gitignore b/tools/.gitignore
index c8cdaef90c..e5ede22842 100644
--- a/tools/.gitignore
+++
On Tue, 2018-10-30 at 14:19 +0100, Alexander Graf wrote:
>
> On 30.10.18 13:55, Lukas Auer wrote:
> > The device tree passed by the prior boot stage can be used to boot
> > Linux. Store it as environment variable "prior_stage_dtb", so that
> > it
> > can be used as part of the boot command.
> >
+ Update the function syscon_node_to_regmap() to force bound on
syscon uclass and directly use the list of device from DM.
+ Remove the static list syscon_list.
This patch avoid issue (crash) when syscon_node_to_regmap() is called
before and after reallocation (list content is invalid).
From: Hou Zhiqiang
Add the infrastructure for LX SoCs PCIe controller to
update device tree nodes to convey SMMU stream IDs in
the device tree.
Signed-off-by: Hou Zhiqiang
---
drivers/pci/Makefile| 2 +-
drivers/pci/pcie_lx.c | 5 -
drivers/pci/pcie_lx_fixup.c | 234
On 30.10.18 13:37, Simon Goldschmidt wrote:
On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
On 30.10.18 12:17, Simon Goldschmidt wrote:
> diff --git a/include/configs/socfpga_common.h
b/include/configs/socfpga_common.h
> index 2330143cf1..bd8f5c8c41
On 30.10.18 14:44, Auer, Lukas wrote:
> On Tue, 2018-10-30 at 14:19 +0100, Alexander Graf wrote:
>>
>> On 30.10.18 13:55, Lukas Auer wrote:
>>> The device tree passed by the prior boot stage can be used to boot
>>> Linux. Store it as environment variable "prior_stage_dtb", so that
>>> it
>>> can
On 30.10.18 16:02, Auer, Lukas wrote:
> On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote:
>> QEMU embeds the location of the kernel image in the device tree.
>> Store
>> this address in the environment as variable kernel_start and use it
>> in
>> CONFIG_BOOTCOMMAND to boot the kernel. Use the
On Tue, 2018-10-30 at 16:27 +0100, Alexander Graf wrote:
>
> On 30.10.18 16:02, Auer, Lukas wrote:
> > On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote:
> > > QEMU embeds the location of the kernel image in the device tree.
> > > Store
> > > this address in the environment as variable
This part should've been remove in commit 88d60db01168 ("arm: ti: boot:
Remove environment partition"), but I missed it somehow. Remove reading
dtb file from environment partition on eMMC, as we don't have it
anymore.
Signed-off-by: Sam Protsenko
---
include/environment/ti/boot.h | 1 -
1 file
On Mon, Oct 29, 2018 at 8:05 PM Tom Rini wrote:
>
> Hey all,
>
> It's two weeks until v2018.11 release and today I've put out rc3. The
> delta is pretty reasonable and at this point I can really hold things to
> either obviously correct fixes or bugfixes/regression fixes/Kconfig
> migrations
Hi Joe,
On Mon, Oct 22, 2018 at 10:25:44PM +, Joe Hershberger wrote:
> On Fri, Sep 14, 2018 at 7:51 AM Quentin Schulz
> wrote:
> >
> > The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
> > 1000BASE-X and triple-speed copper SFP capable, can communicate with
> > the MAC
On 30.10.18 16:18, Marek Vasut wrote:
> Of course would this be good. But perhaps we can make this SPL
> binary size check "better" by not changing the INIT_RAM_SIZE
> define. Its definitely possible - I just don't know how hard
> (I didn't look into this).
On Tue, Oct 30, 2018 at 04:19:35PM +, Peter Robinson wrote:
> On Mon, Oct 29, 2018 at 8:05 PM Tom Rini wrote:
> >
> > Hey all,
> >
> > It's two weeks until v2018.11 release and today I've put out rc3. The
> > delta is pretty reasonable and at this point I can really hold things to
> > either
Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).
Signed-off-by: Simon Goldschmidt
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Tom,
The following changes since commit 454cf76184c65426b68033a23da086e73663f2fc:
Prepare v2018.11-rc3 (2018-10-29 16:04:26 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-mpc85xx.git tags/mpc85xx-for-v2018.11
for you to fetch changes up to
When the device tree is missing a correct spi slave description below
the bus (compatible "spi-flash" or spi-max-frequency are missing),
the 'set_speed' callback can be called with 'speed' == 0 Hz.
At least with cadence qspi, this leads to a division by zero.
Prevent this by initializing speed to
On 10/8/18 6:51 AM, Bin Meng wrote:
> Per T1040RM (Rev. 1, 08/2015), the value of
> FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
> and should be 0x0080 (bit 440 in the RCW).
>
> Signed-off-by: Bin Meng
> ---
This set is applied to u-boot-mpc85xx master, awaiting upstream.
York
On 17.10.2018 13:27, Rajat Srivastava wrote:
Add functionality to read and parse SFDP parameters to auto-detect
flash size, page size and address width of flash. This enables
flash access above 16MB using 4-byte addressing mode.
Add driver support to get SFDP information of flash and use it to
On 10/4/18 12:04 AM, Chris Packham wrote:
> Workaround makes FS as default mode on all affected socs.
>
> Add support to check erratum-A005275 validity for an soc. This info is
> required to determine whether a given soc is affected by this erratum.
> Add quirk for this erratum
HI Patrick,
On 30 October 2018 at 07:44, Patrick Delaunay wrote:
>
> + Update the function syscon_node_to_regmap() to force bound on
> syscon uclass and directly use the list of device from DM.
> + Remove the static list syscon_list.
>
> This patch avoid issue (crash) when
On 10/29/2018 08:25 PM, Simon Goldschmidt wrote:
> Add -u-boot.dtsi files to keep the current U-Boot behaviour:
> - add u-boot,dm-pre-reloc where required
> - disable watchdog
> - set uart clock frequency
> - add gpio bank-name properties
> where appropriate:
> - make qspi work (add alias for
On 10/30/2018 04:33 PM, Stefan Roese wrote:
> On 30.10.18 16:18, Marek Vasut wrote:
>>> > Of course would this be good. But perhaps we can make this SPL
>>> > binary size check "better" by not changing the INIT_RAM_SIZE
>>> > define. Its definitely possible - I just don't know how
On 10/30/2018 10:30 PM, Simon Goldschmidt wrote:
> On 30.10.2018 22:26, Marek Vasut wrote:
>> On 10/30/2018 10:23 PM, Simon Goldschmidt wrote:
>>> Correctly define CONFIG_SPL_MAX_FOOTPRINT to make the default arm
>>> linker script for SPL check the total SRAM size available for SPL
>>> (code,
On 10/29/2018 08:25 PM, Simon Goldschmidt wrote:
> As a preparation for merging the socfpga gen5 devicetree files
> from Linux, this patch makes the dwapb gpio driver work correctly
> without the 'bank-name' property on the gpio-controller nodes.
>
> This property is not present in the Linux
On Tue, 30 Oct 2018 23:02:50 +0100
Boris Brezillon wrote:
> On Tue, 30 Oct 2018 11:59:13 +0100
> Stefan Roese wrote:
>
> > On 30.10.18 11:41, Boris Brezillon wrote:
> > > On Tue, 30 Oct 2018 11:13:37 +0100
> > > Stefan Roese wrote:
> > >
> > >> Hi Boris,
> > >>
> > >> On 30.10.18
On Tue, 30 Oct 2018 23:43:40 +0100
Miquel Raynal wrote:
> Hi Boris,
>
> Boris Brezillon wrote on Tue, 30 Oct 2018
> 23:02:50 +0100:
>
> > On Tue, 30 Oct 2018 11:59:13 +0100
> > Stefan Roese wrote:
> >
> > > On 30.10.18 11:41, Boris Brezillon wrote:
> > > > On Tue, 30 Oct 2018 11:13:37
On 10/30/2018 10:23 PM, Simon Goldschmidt wrote:
> Correctly define CONFIG_SPL_MAX_FOOTPRINT to make the default arm
> linker script for SPL check the total SRAM size available for SPL
> (code, data, bss, heap, global data).
>
> The previously existing define CONFIG_SPL_MAX_SIZE seems to only
>
On 30.10.2018 22:26, Marek Vasut wrote:
On 10/30/2018 10:23 PM, Simon Goldschmidt wrote:
Correctly define CONFIG_SPL_MAX_FOOTPRINT to make the default arm
linker script for SPL check the total SRAM size available for SPL
(code, data, bss, heap, global data).
The previously existing define
Tested series applied to u-boot 2018.11-rc3 on pinebook, both with
reboot and cold boot.
Thanks for all the work on it!
Tested-by: Vagrant Cascadian
On 2018-10-28, Vasily Khoruzhick wrote:
> This series adds support for the Pinebook, an allwinner A64 laptop
> produced by Pine64. It also syncs
On 10/30/2018 08:21 PM, Simon Goldschmidt wrote:
> Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
> select ensures we can build without partition support (used to build
> a network boot only version of SPL and U-Boot).
>
> Signed-off-by: Simon Goldschmidt
> ---
>
>
On Tue, 30 Oct 2018 11:59:13 +0100
Stefan Roese wrote:
> On 30.10.18 11:41, Boris Brezillon wrote:
> > On Tue, 30 Oct 2018 11:13:37 +0100
> > Stefan Roese wrote:
> >
> >> Hi Boris,
> >>
> >> On 30.10.18 11:03, Boris Brezillon wrote:
> >>> On Tue, 30 Oct 2018 10:51:51 +0100
> >>> Stefan
Hi Boris,
Boris Brezillon wrote on Tue, 30 Oct 2018
23:02:50 +0100:
> On Tue, 30 Oct 2018 11:59:13 +0100
> Stefan Roese wrote:
>
> > On 30.10.18 11:41, Boris Brezillon wrote:
> > > On Tue, 30 Oct 2018 11:13:37 +0100
> > > Stefan Roese wrote:
> > >
> > >> Hi Boris,
> > >>
> > >> On
Correctly define CONFIG_SPL_MAX_FOOTPRINT to make the default arm
linker script for SPL check the total SRAM size available for SPL
(code, data, bss, heap, global data).
The previously existing define CONFIG_SPL_MAX_SIZE seems to only
check the binary size (which is without bss, heap and gd).
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