On 04/09/2020 17:33, Andre Heider wrote:
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
emmc, since our dtsi is still based on downstream and sdhc0 is used for
the sd card.
Signed-off-by: Andre Heider
We've found a tester with an eMMC board, and unfortunately this
On 9/9/20 3:50 AM, Rick Chen wrote:
> Hi Sean
>
>> Clearing MIP doesn't do anything. Whoops. The following commits should
>> tackle this problem in a more robust manner.
>
> I still not catch your points about that this commit 947263033 really
> help to fix pending IPIs not clean problem on
On Wed, Sep 09, 2020 at 04:08:17PM +0300, Andy Shevchenko wrote:
> On Wed, Sep 09, 2020 at 02:33:20PM +0200, Wolfgang Wallner wrote:
> > Currently, the calculation for the length of the DSDT table includes any
> > bytes that are added for alignment, but those bytes are not initialized.
> >
> >
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:34:35PM +0200, Stefan Roese wrote:
I agree that it's too time consuming (usually) for a manufacturing test.
Either you are okay with disabling CONFIG_SYS_ALT_MEMTEST on your board,
which will also disable
On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
>
> Hi Etienne,
>
> On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> wrote:
> >
> > This change implements a SMCCC transport for SCMI exchanges. This
> > implementation follows the Linux kernel as references implementation
> > for SCMI message
From: Jean-Jacques Hiblot
Add managed functions to get a reset_ctl from the device-tree, based on a
name or an index.
Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl)
from the device-tree.
When the device is unbound, the reset controllers are automatically
released and
Hi,
This is the 4th of a few series that are re-rolls of Jean-Jacques'
earlier efforts. The goal is to facilitate porting drivers from the
Linux kernel.
This particular series is about reset controllers. It adds a managed API,
close to that of Linux. The main difference is that bulk and
From: Jean-Jacques Hiblot
The tests are basically the same as for the regular API. Except that
the reset are initialized using the managed API, and no freed manually.
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Simon Glass
Signed-off-by: Pratyush Yadav
---
Notes:
Changes in v3:
Add command oem bootbus which executes the command
``mmc bootbus `` on the current fastboot mmc device
( = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
= boot_bus_width reset_boot_bus_width boot_mode
$> fastboot oem bootbus:
Signed-off-by: Patrick
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled
From: Jean-Philippe ROMAIN
Activate fastboot support on boot partition for eMMC, mmc1 device
on STMicroelectronics board (EV1).
Signed-off-by: Jean-Philippe ROMAIN
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 5 +
configs/stm32mp15_trusted_defconfig | 5
On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
>
> Hi Etienne,
>
> On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> wrote:
> >
> > Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
> > is used to get clock resources, allowing further clock manipulation.
> >
> > Change
Add a missing memset to acpi_create_spcr().
The other acpi_create_() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).
Signed-off-by: Wolfgang Wallner
---
On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
>
> On 9/9/20 3:55 AM, Bin Meng wrote:
> > Hi Marek,
>
> Hi,
>
> > On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
> >>
> >> On 9/8/20 5:45 PM, Bin Meng wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Tue, Sep 8, 2020 at 7:13 PM Marek Vasut
On 9/9/20 12:16 PM, Sean Anderson wrote:
> On 9/9/20 5:01 AM, Rick Chen wrote:
>> Hi Sean
>>
>>> Hi Sean
>>>
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI
Add board support for ic-automation Moritz III
Changes for v5:
- fixed random ethaddr at failure
- fixed comments
Changes for v4:
- re-sort list alphabetically
- c style comments
Changes for v3:
- Resend via git send-email
Changes for v2:
-
On Wed, Sep 09, 2020 at 06:42:10AM +, Meenakshi Aggarwal wrote:
>
>
> > -Original Message-
> > From: Tom Rini
> > Sent: Monday, September 7, 2020 6:43 PM
> > To: Meenakshi Aggarwal
> > Cc: u-boot@lists.denx.de; Priyanka Jain ; Varun Sethi
> > ; Ioana Ciornei ; Qiang Zhao
> > ; Hui
Hi Stefan,
On Wed, Sep 09, 2020 at 10:49:29AM +0200, Stefan Roese wrote:
Hi Ralph,
Thanks for finding and fixing this:
I've sent a v2 with the suggested changes.
Have also noticed that mtest takes considerably longer when doing the
bitflip test. To the point where using it for
On 9/9/20 3:46 PM, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
>>
>> On 9/9/20 3:55 AM, Bin Meng wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
On 9/8/20 5:45 PM, Bin Meng wrote:
> Hi Marek,
Hi,
>
On 9/9/20 3:55 AM, Bin Meng wrote:
> Hi Marek,
Hi,
> On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
>>
>> On 9/8/20 5:45 PM, Bin Meng wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Tue, Sep 8, 2020 at 7:13 PM Marek Vasut wrote:
On 9/8/20 3:44 AM, Bin Meng wrote:
> On Mon, Sep 7,
Hi Marek,
> From: Marek Vasut
> Sent: samedi 22 août 2020 22:46
>
> There is no dedicated pull resistor on the AV96 UART4 (console UART) pin. In
> case there is no UART adapter installed on the AV96, the line is floating and
> can
> trigger reception of garbage characters, which in turn can
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch
On 07.09.20 07:34, AKASHI Takahiro wrote:
> This function is essentially independent from tftp, and will also be
> utilised in implementing UEFI capsule update in a later commit.
> So just give it a more generic name.
> In addition, a new configuration option, CONFIG_DFU_ALT, was introduced
> so
On Wed, Sep 09, 2020 at 02:33:20PM +0200, Wolfgang Wallner wrote:
> Currently, the calculation for the length of the DSDT table includes any
> bytes that are added for alignment, but those bytes are not initialized.
>
> This is because the DSDT length is calculated after a call to
>
On Wed, Sep 09, 2020 at 02:33:21PM +0200, Wolfgang Wallner wrote:
> Add a missing memset to acpi_create_spcr().
>
> The other acpi_create_() functions perform a memset on their
> structures, acpi_create_spcr() does not and as a result the contents of
> this table are partly uninitialized (and
Add fastboot command oem partconf which executes the command
``mmc partconf 0`` on the current mmc device
to configure the eMMC boot partition with
: boot_ack boot_partition, so the command is:
$> fastboot oem partconf:
The partition_access argument is forced to 0 (userdata)
Signed-off-by:
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"
This patch also
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).
The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME
This patch also removes
Hi,
I found that there is a change in building U-Boot for Raspberry pi 4.
1. Kernel address space is increased.
2. Need to add respective *.dtb files to the /boot.
3. boot.src and boot.txt files were added to the /boot.
Please refer to the following links for more information.
On 9/9/20 5:01 AM, Rick Chen wrote:
> Hi Sean
>
>> Hi Sean
>>
>>> Some IPIs may already be pending when U-Boot is started. This could be a
>>> problem if a secondary hart tries to handle an IPI before the boot hart has
>>> initialized the IPI device.
>>>
>>> This commit uses NULL as a sentinel
Hi Marek,
> From: Marek Vasut
> Sent: samedi 22 août 2020 22:45
>
> PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
> 50 MHz generated from PLL4Q cannot be divided well enough to produce accurate
> clock for HDMI pixel clock. Adjust it to generate 74.25 MHz instead. The
>
On 9/8/20 6:59 PM, Frank Wunderlich wrote:
[...]
> +static u32 xhci_td_remainder(struct xhci_ctrl *ctrl, int transferred,
> + int trb_buff_len, unsigned int td_total_len,
> + int maxp, bool more_trbs_coming)
> {
> - int packets_transferred;
>
Hi Stefan,
On Wed, Sep 09, 2020 at 03:34:35PM +0200, Stefan Roese wrote:
I agree that it's too time consuming (usually) for a manufacturing test.
Either you are okay with disabling CONFIG_SYS_ALT_MEMTEST on your board,
which will also disable this bitflip test. Or please continue adding a
new
On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
>
> On 9/9/20 3:46 PM, Bin Meng wrote:
> > On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
> >>
> >> On 9/9/20 3:55 AM, Bin Meng wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
>
>
On 09/09/20 03:37PM, Pratyush Yadav wrote:
> Hi,
>
> This is the 4th of a few series that are re-rolls of Jean-Jacques'
> earlier efforts. The goal is to facilitate porting drivers from the
> Linux kernel.
>
> This particular series is about reset controllers. It adds a managed API,
> close to
Only set the fdtfile environment variable when not already set.
Fixes: 867572f09ebe6 ("ARM: mvebu: clearfog: run-time selection of DT file")
Cc: Joel Johnson
Reported-by: Andre Heider
Signed-off-by: Baruch Siach
---
board/solidrun/clearfog/clearfog.c | 3 +++
1 file changed, 3 insertions(+)
Hi Ralph,
On 09.09.20 15:06, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 10:49:29AM +0200, Stefan Roese wrote:
Hi Ralph,
Thanks for finding and fixing this:
I've sent a v2 with the suggested changes.
Yes, thanks.
Have also noticed that mtest takes considerably longer when
On 09.09.20 15:02, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to
On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
>
> Hi Etienne,
>
> On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> wrote:
> >
> > This change implements a mailbox transport using SMT format for SCMI
> > exchanges. This implementation follows the Linux kernel and
> > SCP-firmware [1] as
On 9/9/20 6:26 AM, Heinrich Schuchardt wrote:
> On 9/9/20 12:16 PM, Sean Anderson wrote:
>> On 9/9/20 5:01 AM, Rick Chen wrote:
>>> Hi Sean
>>>
Hi Sean
> Some IPIs may already be pending when U-Boot is started. This could be a
> problem if a secondary hart tries to handle an IPI
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.
This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:
* acpi_inc()
*
From: Jean-Philippe ROMAIN
Enable the fastboot oem command format and set the variable
"partitions" with default eMMC partitions list.
Signed-off-by: Patrick Delaunay
Signed-off-by: Jean-Philippe ROMAIN
---
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig | 1
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode
On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0
Signed-off-by: Patrick Delaunay
---
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index
This change implements a mailbox transport using SMT format for SCMI
exchanges. This implementation follows the Linux kernel and
SCP-firmware [1] as references implementation for SCMI message
processing using SMT format for communication channel meta-data.
Use of mailboxes in SCMI FDT bindings
This change implements a SMCCC transport for SCMI exchanges. This
implementation follows the Linux kernel as references implementation
for SCMI message processing, using the SMT format for communication
channel meta-data.
Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
kernel
This change introduces SCMI agent uclass to interact with a firmware
using the SCMI protocols [1].
SCMI agent uclass currently supports a single method to request
processing of the SCMI message by an identified server. A SCMI message
is made of a byte payload associated to a protocol ID and a
On Wed, Sep 09, 2020 at 10:13:50AM +0200, Matthias Brugger wrote:
> Hi Tom,
>
> Please have a look at the second round of patches for the RPi. Two patches
> fixes the network driver of the RPi4 which didn't work reliable. Another
> patch enables USB keyboard for 32 bit RPi4.
>
> Petr tested the
Hi Etienne,
On Wed, 9 Sep 2020 at 03:58, Etienne Carriere
wrote:
>
> On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> >
> > Hi Etienne,
> >
> > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > wrote:
> > >
> > > Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
> > > is
Hi Pratyush,
On Tue, 8 Sep 2020 at 21:53, Pratyush Yadav wrote:
>
> On 08/09/20 05:56PM, Simon Glass wrote:
> > On Mon, 7 Sep 2020 at 23:40, Pratyush Yadav wrote:
> > >
> > > From: Jean-Jacques Hiblot
> > >
> > > Add a test to verify that GPIOs can be acquired/released using the managed
> > >
On Wed, 9 Sep 2020 at 06:33, Wolfgang Wallner
wrote:
>
> Currently, the calculation for the length of the DSDT table includes any
> bytes that are added for alignment, but those bytes are not initialized.
>
> This is because the DSDT length is calculated after a call to
> acpi_inc_align(). Split
Hi Etienne,
On Wed, 9 Sep 2020 at 03:41, Etienne Carriere
wrote:
>
> On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> >
> > Hi Etienne,
> >
> > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > wrote:
> > >
> > > This change implements a SMCCC transport for SCMI exchanges. This
> > >
On Wed, 9 Sep 2020 at 06:33, Wolfgang Wallner
wrote:
>
> Add a missing memset to acpi_create_spcr().
>
> The other acpi_create_() functions perform a memset on their
> structures, acpi_create_spcr() does not and as a result the contents of
> this table are partly uninitialized (and thus
/master
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200909
The following changes since commit 96d66a9b8ce11aae9f8bef5244b83b4740b37644:
Prepare v2020.10-rc4 (2020-09-07 14:17:33 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot
Patrick DELAUNAY would like to recall the message, "[PULL] Pull request:
u-boot-stm32 for v2020.10= u-boot-stm32-20200909".
Hi Stefan,
On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
>
> On 09.09.20 10:14, Priyanka Jain wrote:
> > This is required to fix
> > "Error binding driver 'gic-v3': -96"
> > on lx2160a platforms.
> >
> > Signed-off-by: Priyanka Jain
> > ---
> > arch/arm/lib/gic-v3-its.c | 5 +
> > 1
On Wed, 9 Sep 2020 at 16:35, Simon Glass wrote:
>
> Hi Etienne,
>
> On Wed, 9 Sep 2020 at 03:58, Etienne Carriere
> wrote:
> >
> > On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> > >
> > > Hi Etienne,
> > >
> > > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > > wrote:
> > > >
> > > > Add
/master
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200909
The following changes since commit 96d66a9b8ce11aae9f8bef5244b83b4740b37644:
Prepare v2020.10-rc4 (2020-09-07 14:17:33 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot
On 09.09.20 17:21, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/mailbox/stm32-ipcc.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/gpio/gpio-uclass.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_ltdc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_dsi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/video/stm32/stm32_dsi.c
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git
Cosmetics: Add header with SPDX licence
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 24ed83dd46..dbea99532c 100644
---
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index
Add test on the size of ofnode_phandle_args result to avoid access
to uninitialized elements in args[] field.
This patch avoids the issue when gpio-ranges cell size is not 3 as
expected, for example:
gpio-ranges = < 0>;
instead of
gpio-ranges = < 0 112 16>;
Signed-off-by: Patrick
Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
is used to get clock resources, allowing further clock manipulation.
Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents.
Add DM test scmi_clocks to test these 3 clocks.
Update DM test sandbox_scmi_agent
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.
Signed-off-by: Etienne Carriere
Reviewed-by: Simon Glass
---
No change in v4.
No change in v3.
Changes in v2:
- No change but added R-b tag.
- Yet a question: do we need to add this binding doc in U-Boot
since
Add tests for SCMI reset controllers. A test device driver
sandbox-scmi_devices.c is used to get reset resources, allowing further
resets manipulation.
Change sandbox-smci_agent to emulate 1 reset controller exposed through
an agent. Add DM test scmi_resets to test this reset controller.
This change introduces a clock driver for SCMI agent devices. When
SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
clock device for each SCMI clock protocol devices enabled in the FDT.
SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also
From: "Edgar E. Iglesias"
Trap non-PIE builds early if the start address doesn't match
between run-time and link-time. This will trap the startup
sequence rather than letting it run into obscure errors.
Signed-off-by: Edgar E. Iglesias
---
arch/arm/cpu/armv8/start.S | 13 +
1 file
Hi,
I am sorry to ask such a basic question, but i really can't find any
documentation on the commands possible in scripting.
Documentation of Hush and its commands i can't find.
I am working with the script in u-boot env below.
I can read it, but just because i am guessing.
Any help is
On 07.09.20 07:34, AKASHI Takahiro wrote:
> Summary
> ===
> 'UpdateCapsule' is one of runtime services defined in UEFI specification
> and its aim is to allow a caller (OS) to pass information to the firmware,
> i.e. U-Boot. This is mostly used to update firmware binary on devices by
>
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch
Hi Ralph,
On 09.09.20 17:07, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:53:08PM +0200, Stefan Roese wrote:
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Very good, I will send a separate patch that adds a Kconfig option.
As it turns out, doing a separate patch for
On Wed, Sep 09, 2020 at 04:48:30PM +0200, Heinrich Schuchardt wrote:
> On 07.09.20 07:34, AKASHI Takahiro wrote:
[snip]
> > required and partly because there is a problem with virt-make-fs.
>
> What problem with virt-make-fs exists? How will this be solved?
This I suspect is related to the
On 9/9/20 4:05 PM, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
>>
>> On 9/9/20 3:46 PM, Bin Meng wrote:
>>> On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
On 9/9/20 3:55 AM, Bin Meng wrote:
> Hi Marek,
Hi,
> On Wed, Sep 9, 2020 at
On Wed, Sep 09, 2020 at 10:05:42PM +0800, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
> >
> > On 9/9/20 3:46 PM, Bin Meng wrote:
> > > On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
> > >>
> > >> On 9/9/20 3:55 AM, Bin Meng wrote:
> > >>> Hi Marek,
> > >>
> > >> Hi,
>
Hi Stefan,
On Wed, Sep 09, 2020 at 03:53:08PM +0200, Stefan Roese wrote:
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Very good, I will send a separate patch that adds a Kconfig option.
As it turns out, doing a separate patch for this gets messy, and also
would introduce a dependency
Hi Stefan,
On Wed, Sep 09, 2020 at 05:13:49PM +0200, Stefan Roese wrote:
Usually the RB is only added, when not too many further changes are
made by the committer. There is no strict rule here AFAIK.
In that case I'll omit your RB on v3 as the change is somewhat larger,
and includes the
From: "Edgar E. Iglesias"
This fixes some build issues with large (> 1MB) PIE U-Boot setups.
We also document the 4K aligned load address requirement and
add an early run-time check for it.
As requested by reviewers, I've also added a runtime check for
non-PIE builds to trap the startup
From: "Edgar E. Iglesias"
Mention the requirement of 4K aligned load addresses in the
help section for the POSITION_INDEPENDENT option.
Suggested-by: Michal Simek
Signed-off-by: Edgar E. Iglesias
---
arch/arm/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: "Edgar E. Iglesias"
PIE requires a 4K aligned load address. If this is not met, trap
the startup sequence in a WFI loop rather than running into obscure
failures.
Tested-by: Michal Simek
Suggested-by: André Przywara
Signed-off-by: Edgar E. Iglesias
---
arch/arm/cpu/armv8/start.S | 17
From: "Edgar E. Iglesias"
Linking a U-Boot larger than 1MB fails with PIE enabled:
u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end'
defined in .bss_start section in u-boot.
This extends the supported range by
This merges the PLIC initialization code from two functions into one.
Signed-off-by: Sean Anderson
Reviewed-by: Bin Meng
---
This patch builds but has NOT been tested.
(no changes since v1)
arch/riscv/lib/andes_plic.c | 58 -
1 file changed, 25
On 6/24/20 6:47 AM, Sean Anderson wrote:
> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
> just enable them as normal. The enable count is local to the struct clk,
> but this will never result in the actual en-/dis-able op being called
> (unless the same struct clk is
On 09/09/2020 02:56, Simon Glass wrote:
> On Tue, 8 Sep 2020 at 11:33, Alper Nebi Yasak
> wrote:
>> I might be too late to say this but the SEQ thing looks ugly to me.
>> Maybe there could be some generic control-flow-like nodes that could
>> generate and insert things in their own place. If it
On 9/1/20 4:07 PM, Sean Anderson wrote:
> The clock subsystem requires that clk_free be called on clocks obtained via
> clk_get_*.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
> ---
>
> (no changes since v1)
>
> drivers/watchdog/designware_wdt.c | 17 -
> 1
Hi Jasper,
On Wed, Sep 09, 2020 at 07:03:58PM +0200, Jasper van Santen wrote:
I am sorry to ask such a basic question, but i really can't find any
documentation on the commands possible in scripting.
Documentation of Hush and its commands i can't find.
The hush shell gives you the ability to
On Wed, 9 Sep 2020 10:13:50 +0200
Matthias Brugger wrote:
> Hi Tom,
>
> Please have a look at the second round of patches for the RPi. Two patches
> fixes
> the network driver of the RPi4 which didn't work reliable. Another patch
> enables
> USB keyboard for 32 bit RPi4.
>
> Petr tested
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.
The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree.
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured
This series cleans up the timer drivers in RISC-V and converts them to DM.
This series needs to be tested! I have only tested it on QEMU and the K210.
Notably, this means that the HiFive and anything Andes is completely untested.
Changes in v4:
- Both the Andes PMLT and Sifive CLINT now fall
This converts the clint driver from the riscv-specific interface to be a
DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously
implicitly depended on the CLINT to select REGMAP.
Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb),
the SiFive CLINT is
Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson
---
checkpatch still complains about this one, but I don't see any reason to
break it up even further. It
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
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