Hi Sean,
On 5/11/22 18:48, Sean Anderson wrote:
On 5/10/22 5:51 AM, Amelie Delaunay wrote:
Hi Patrick,
Hi Sean,
On 5/9/22 16:37, Patrick DELAUNAY wrote:
Hi Sean,
On 5/8/22 20:21, Sean Anderson wrote:
On 4/26/22 8:37 AM, Patrick Delaunay wrote:
Add the counter of the PLL user n_pll_cons
On Tuesday 17 May 2022 08:40:48 Jaehoon Chung wrote:
> On 5/12/22 03:27, Pali Rohár wrote:
> > Currently default fallback SDHC mode is 1-bit. Add new config option
> > CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
> > mode. This is useful e.g. for SPL builds which
On Mon, May 16, 2022 at 12:50:34PM -0300, Fabio Estevam wrote:
> Hi Marcel,
>
> On 16/05/2022 12:41, Marcel Ziswiler wrote:
>
> > Talking about uuu, has anybody managed to get that going on the i.MX
> > 8M Mini yet? Regular USB device/host
> > functionality works great but last I tried gadget
On 06.05.22 13:54, Robert Marko wrote:
uDPU relies on using fixed-phy for the SFP support, and since the
fixed-phy parsing was moved to the generic driver instead of mvneta
networking stopped working on uDPU with:
uDPU>> dhcp
dm_eth_phy_connect failed
This is due to the conversion commit not
On 06.05.22 11:05, Pali Rohár wrote:
If proper U-Boot on Turris Omnia tries to print something on debug UART
then CPU hangs. Reason is that debug UART in proper U-Boot for Turris
Omnia has incorrect configuration of base register. Base register is
different in SPL and also in different stages of
On 09.05.22 11:12, Pali Rohár wrote:
This allows to use U-Boot console on Turris devices via network.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
configs/turris_mox_defconfig | 1 +
configs/turris_omnia_defconfig | 1 +
2 files changed, 2
On 4/14/22 15:59, Andrew Scull wrote:
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.
Having a '.' in the section names
Add Nuvoton BMC NPCM750 i2c driver
Signed-off-by: Jim Liu
---
drivers/i2c/Kconfig| 5 +
drivers/i2c/Makefile | 1 +
drivers/i2c/npcm-i2c.c | 632 +
3 files changed, 638 insertions(+)
create mode 100644 drivers/i2c/npcm-i2c.c
diff --git
Hi Eddie,
Thanks for the patches. I am currently traveling so apologies for
the slow replies. This one looks good, I'll have a look at the rest
once I get back
On Fri, 13 May 2022 at 19:30, Eddie James wrote:
>
> Requesting the locality uses the timeout values, so they need
> to be set
On 05.05.22 04:09, Chris Packham wrote:
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64
directly. Remove the unused config item.
Signed-off-by: Chris Packham
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/mach-mvebu/Kconfig | 4
1 file
On 03.05.22 11:13, Pali Rohár wrote:
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and
CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not
enabled. So hide them.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
On 16.05.22 18:49, Pali Rohár wrote:
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/serial/Kconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git
Replace in the function of_machine_is_compatible(), the used API
fdt_node_check_compatible() by ofnode_device_is_compatible()
to support a live tree.
Signed-off-by: Patrick Delaunay
---
drivers/core/device.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
Hi Patrice,
On 5/12/22 09:17, Patrice Chotard wrote:
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI
Add Nuvoton BMC NPCM750 Pinmux and Pinconf support.
Signed-off-by: Jim Liu
---
drivers/pinctrl/Kconfig |1 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/nuvoton/Kconfig |7 +
drivers/pinctrl/nuvoton/Makefile |4 +
Hi Tom,
please pull this next batch of mostly Marvell related patches:
- Misc Kconfig cleanups (Chris & Pali)
- turris_omnia: Fix hangup in debug UART (this introduces
TPL/SPL_DEBUG_UART_BASE) Pali
- mvebu: uDPU: include
Hi Patrice
On 5/12/22 09:17, Patrice Chotard wrote:
Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 4
1 file changed, 4 deletions(-)
On 06.05.22 20:01, Robert Marko wrote:
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
Add Nuvoton BMC NPCM750 mmc control driver.
Signed-off-by: Jim Liu
---
drivers/mmc/Kconfig | 12 ++
drivers/mmc/Makefile | 1 +
drivers/mmc/npcm_sdhci.c | 89
3 files changed, 102 insertions(+)
create mode 100644 drivers/mmc/npcm_sdhci.c
synquacer_cs_set() function does not wait the chip select
is deasserted when the driver sets the DMSTOP to deselect
the slave.
This commit checks the Slave Select Released(SRS) bit to wait
until the slave is deselected.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
There is a TX-FIFO and Shift Register empty(TFES) status
bit in spi controller. This commit checks the TFES bit
to wait the TX transfer completes.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
drivers/spi/spi-synquacer.c | 10 --
1 file changed, 4 insertions(+), 6
DMSTART bit must not be set while there is active transfer.
This commit sets the DMSTART bit only when the transfer begins.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
drivers/spi/spi-synquacer.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
On 5/17/22 16:27, Pali Rohár wrote:
> On Tuesday 17 May 2022 08:40:48 Jaehoon Chung wrote:
>> On 5/12/22 03:27, Pali Rohár wrote:
>>> Currently default fallback SDHC mode is 1-bit. Add new config option
>>> CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
>>> mode. This
Hi,
On 5/11/22 23:09, Marek Vasut wrote:
The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to
"busy" variable is ORed without being initialized,
must be zeroed before use.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
drivers/spi/spi-synquacer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-synquacer.c
When we support SPI-NAND flash with spi-synquacer driver,
we encounter several issues.
This series fixes the spi-synquacer driver to make SPI-NAND flash
device work. This series also includes some improvement and
simplifies the implementation.
Masahisa Kojima (4):
spi: synquacer: busy variable
Hi,
On 5/17/22 17:26, Jim Liu wrote:
> Add Nuvoton BMC NPCM750 mmc control driver.
There is no where this driver is building.
If you have more patch to upstream, I think that it's better to send as
patchset than now.
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Jim Liu
> ---
>
NPCM750 provides identical ethernet MAC controllers for WAN/LAN applications.
Signed-off-by: Jim Liu
---
drivers/net/Kconfig | 5 +
drivers/net/Makefile | 1 +
drivers/net/npcm750_eth.c | 745 ++
3 files changed, 751 insertions(+)
create mode
Hi,
On 5/11/22 18:44, Sean Anderson wrote:
Hi Patrick,
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a minimal support for STM32MP13 RCC, the reset and clock controller
- update of the RCC MISC driver to bind the correct clock and reset
driver
- reset driver, same than STM32MP15x =
Use test_part_types as the name instead of dm_compact.
Signed-off-by: Bin Meng
---
test/py/tests/test_part.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/py/tests/test_part.py b/test/py/tests/test_part.py
index cba9804510..2b5184654d 100644
---
Reset the console timeout value as some tests may change its default
value during the execution.
This fixes the random case timeout issue seen in the U-Boot CI.
Signed-off-by: Bin Meng
---
test/py/u_boot_console_base.py | 4
1 file changed, 4 insertions(+)
diff --git
Use test_fstypes as the name instead of test_dm_compact.
Signed-off-by: Bin Meng
---
test/py/tests/test_fs/test_fs_cmd.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/py/tests/test_fs/test_fs_cmd.py
b/test/py/tests/test_fs/test_fs_cmd.py
index
On Mon, May 9, 2022 at 6:10 PM Marek Vasut wrote:
>
> On 4/25/22 06:39, Stefan Roese wrote:
> > On 4/24/22 23:39, Marek Vasut wrote:
> >> Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
> >> Tested on W25Q128JWPIM part.
> >>
> >> Signed-off-by: Marek Vasut
> >> Cc: Horatiu
From: Fabio Estevam
The imx8mn-ddr4-evk board has Ethernet support already, but the
lpddr4 board does not.
Add Ethernet support for the LPDDR4 variant too.
Signed-off-by: Fabio Estevam
---
configs/imx8mn_evk_defconfig | 8
1 file changed, 8 insertions(+)
diff --git
On 5/17/22 14:39, Patrick DELAUNAY wrote:
Hi,
[...]
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+ /* Check whether this is Avenger96 board.
On Tue, May 17, 2022 at 06:00:16PM +0200, Pali Rohár wrote:
> On Tuesday 17 May 2022 11:52:14 Tom Rini wrote:
> > On Mon, May 16, 2022 at 11:56:51PM +0200, Pali Rohár wrote:
> > > On Monday 16 May 2022 08:31:43 Tom Rini wrote:
> > > > On Sat, May 14, 2022 at 01:00:06AM +0200, Pali Rohár wrote:
> >
On 5/17/22 17:32, Patrick DELAUNAY wrote:
Hi,
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+ /* Check whether this is Avenger96 board. */
+
On Mon, May 16, 2022 at 11:56:51PM +0200, Pali Rohár wrote:
> On Monday 16 May 2022 08:31:43 Tom Rini wrote:
> > On Sat, May 14, 2022 at 01:00:06AM +0200, Pali Rohár wrote:
> >
> > > Hello! I tried to enable support for 2GB+ of DDR memory (with 4GB DDR3)
> > > on powerpc P2020 board in 32-bit
It should be CONFIG_SANDBOX_RAM_SIZE_MB.
Signed-off-by: Bin Meng
---
doc/arch/sandbox.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
index bc670b98b7..246ab5b380 100644
--- a/doc/arch/sandbox.rst
+++ b/doc/arch/sandbox.rst
@@
On 5/17/22 15:43, Patrick DELAUNAY wrote:
Hi,
Hi,
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+ /* Check whether this is Avenger96 board. */
On 5/17/22 16:32, Marek Vasut wrote:
On 5/17/22 15:43, Patrick DELAUNAY wrote:
Hi,
Hi,
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+ /*
Image created by LTO is not friendly to debugger, let's document this.
Signed-off-by: Bin Meng
---
doc/arch/sandbox.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
index 246ab5b380..19167d22fb 100644
--- a/doc/arch/sandbox.rst
+++
Hi,
On 5/17/22 14:53, Marek Vasut wrote:
On 5/17/22 14:39, Patrick DELAUNAY wrote:
Hi,
[...]
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+
Since the phy_{read,write}_mmd functions are static inlines using
other static inline functions, they cause code using them to explode.
Defining local wrappers cuts the size of the generated code by 50%:
$ size drivers/net/phy/dp83867.o.{before,after}
textdata bss dec hex
On Tuesday 17 May 2022 11:52:14 Tom Rini wrote:
> On Mon, May 16, 2022 at 11:56:51PM +0200, Pali Rohár wrote:
> > On Monday 16 May 2022 08:31:43 Tom Rini wrote:
> > > On Sat, May 14, 2022 at 01:00:06AM +0200, Pali Rohár wrote:
> > >
> > > > Hello! I tried to enable support for 2GB+ of DDR memory
Those options show up in menuconfig when selecting ARM or MIPS which
is dangerous if a user accidently sets them. This also clutters up the
menuconfig top-level screen. Because those options should only be set
by SoC specific or board specific configs, make them invisible.
Signed-off-by: Daniel
ARM semihosting provides no provisions for determining if there is
pending input. The only way to determine if there is console input is to
do a read (and block until the user types something). For this reason,
we always return true for tstc (since you will always get input if you
try). However,
On 16.05.22 04:42, Weijie Gao wrote:
This patch adds support for noncached_alloc() which was only supported by
ARM platform.
Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of
On 16.05.22 04:42, Weijie Gao wrote:
To be compatible with old u-boot used by lots of MT7621 devices, the u-boot
needs to boot-up MT7621's all cores, and all VPES of each core.
This patch adds asm/mipsmtregs.h from linux kernel which is need for
boot-up VPEs.
Signed-off-by: Weijie Gao
---
On 16.05.22 04:42, Weijie Gao wrote:
This patch adds __image_copy_len needed by TPL of MT7621 SoC.
The __image_copy_len represents the binary blob size of both SPL/TPL
binaries. To achieve this, __text_start/end are added for calculation.
Signed-off-by: Weijie Gao
---
v5 changes: none
v4
On 16.05.22 04:42, Weijie Gao wrote:
This patch add more definitions needed for MT7621 initialization.
MT7621 needs to initialize GIC/CPC and other related parts.
Signed-off-by: Weijie Gao
---
v5 changes: none
v4 changes: new
---
arch/mips/include/asm/cm.h | 67
Commit b1a14f8a1c2e ("UBIFS: Change ubifsload to not read beyond the
requested size") added optimization to do not read more bytes than it is
really needed. But this commit introduced incorrect handling of the hole at
the end of file. This logic cause U-Boot to crash or lockup when trying to
read
On 5/9/22 09:23, Chin-Ting Kuo wrote:
User can get correct HCLK frequency during driver probe stage
by adding the following configuration in the device tree.
"clocks = < ASPEED_CLK_AHB>".
Signed-off-by: Chin-Ting Kuo
---
drivers/clk/aspeed/clk_ast2500.c | 24
1 file
On 16.05.22 04:42, Weijie Gao wrote:
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.
The default build target is u-boot-mt7621.bin.
The specification of this chip:
https://www.mediatek.com/products/homenetworking/mt7621
Signed-off-by: Weijie Gao
---
v5
On 16.05.22 04:44, Weijie Gao wrote:
If the payload is compressed, SPL_COPY_PAYLOAD_ONLY should always be set
since the payload will not be directly read to its load address. The
payload will first be read to a temporary buffer, and then be decompressed
to its load address, without image
On 16.05.22 04:44, Weijie Gao wrote:
The BootROM of MT7621 requires a image header for SPL to record its size
and load address when booting from NAND.
To create such an image, one can use the following command line:
mkimage -T mtk_image -a 0x8020 -e 0x8020 -n "mt7621=1"
-d
On 16.05.22 04:42, Weijie Gao wrote:
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.
The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and
On 16.05.22 04:43, Weijie Gao wrote:
This patch adds pinctrl support for MediaTek MT7621 SoC.
The MT7621 SoC supports pinconf, but it is not the same as mt7628.
Signed-off-by: Weijie Gao
---
v5 changes: Remove the use of common.h
v4 changes: none
v3 changes: none
v2 changes: none
---
On 16.05.22 04:44, Weijie Gao wrote:
Add support to load legacy image with payload compressed. This redirects
the boot flow for all legacy images. If the payload is not compresses, the
s/compresses/compressed/
actual behavior will remain unchanged.
Signed-off-by: Weijie Gao
---
v5
Kojima-san,
On Mon, May 16, 2022 at 08:00:41PM +0900, Masahisa Kojima wrote:
> The bootmenu enumerates the UEFI boot options
> for boot device selection.
>
> This commit adds the description how the UEFI boot work
> in bootmenu. This commit also adds "Synopsis", "Description"
> and
On 16.05.22 04:42, Weijie Gao wrote:
The MT7621 requires external binary blob being executed during u-boot's
boot-up flow. It's necessary to provide a guide here for users to correctly
build the u-boot.
Signed-off-by: Weijie Gao
---
v5 changes: none
v4 changes: new
---
On 16.05.22 04:43, Weijie Gao wrote:
The address returned by regmap_get_range() is not remapped. Directly r/w
to this address is ok for ARM platforms since it's idential to the virtual
address.
But for MIPS platform only virtual address should be used for access.
To solve this issue, the
Hi Akashi-san,
On Wed, 18 May 2022 at 10:31, Takahiro Akashi
wrote:
>
> Kojima-san,
>
> On Mon, May 16, 2022 at 08:00:41PM +0900, Masahisa Kojima wrote:
> > The bootmenu enumerates the UEFI boot options
> > for boot device selection.
> >
> > This commit adds the description how the UEFI boot
Le 16/05/2022 à 09:22, Michael Nazzareno Trimarchi a écrit :
Hi
On Mon, May 16, 2022 at 9:10 AM Marcel Ziswiler
wrote:
On Mon, 2022-05-16 at 08:58 +0200, Michael Nazzareno Trimarchi wrote:
Hi
On Mon, May 16, 2022 at 8:51 AM Francesco Dolcini
wrote:
Hello,
On Fri, May 13, 2022 at
Hi Marek,
On Sun, Oct 10, 2021 at 2:28 AM Marek Behún wrote:
>
> From: Marek Behún
>
> On mvebu this is defined if and only if !ARM64.
>
I'm working on a 64-bit MVEBU board which I'll hopefully be submitting
soon (just getting the Linux stuff sorted first). Was there any
particular reason you
Hi Jaehoon
Thanks for your reply.
NPCM750 main patch is upstream on uboot master.
it can build on uboot master branch.
The default config is poleg_evb_defconfig and the log is as below:
U-Boot 2022.07-rc2-00065-gc387e62614 (May 18 2022 - 10:19:05 +0800)
CPU:
The codes that call STBTT_malloc() / stbtt__new_active() do not check
the return value at present which may cause segfault.
Signed-off-by: Bin Meng
---
drivers/video/stb_truetype.h | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git
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