Re: [U-Boot] [PATCH v2 1/2] drivers/crypto/fsl: assign job-rings to non-TrustZone

2018-01-26 Thread Auer, Lukas
On Fri, 2018-01-26 at 02:09 +, Bryan O'Donoghue wrote: > After enabling TrustZone various parts of the CAAM silicon become > inaccessible to non TrustZone contexts. The job-ring registers are > designed > to allow non TrustZone contexts like Linux to still submit jobs to > CAAM > even after

Re: [U-Boot] [PATCH v2 2/2] warp7 : run sec_init for CAAM RNG

2018-01-26 Thread Auer, Lukas
On Fri, 2018-01-26 at 02:09 +, Bryan O'Donoghue wrote: > This patch adds a sec_init call into board_init. Doing so in > conjunction > with the patch "drivers/crypto/fsl: assign job-rings to non- > TrustZone" > enables use of the CAAM in Linux when OPTEE/TrustZone is active. > > u-boot will

Re: [U-Boot] [PATCH v2 2/2] warp7 : run sec_init for CAAM RNG

2018-01-26 Thread Auer, Lukas
On Fri, 2018-01-26 at 11:32 +, Bryan O'Donoghue wrote: > > On 26/01/18 09:09, Auer, Lukas wrote: > > Hi Bryan, > > > > this fails to apply for me on current HEAD. It seems like you have > > additional modifications to wrap7.c in your tree (there is no &

Re: [U-Boot] [RESEND PATCH v3 2/2] imx: mx7: run sec_init for CAAM RNG

2018-01-26 Thread Auer, Lukas
On Fri, 2018-01-26 at 12:24 +, Bryan O'Donoghue wrote: > This patch adds a sec_init call into arch_misc_init(). Doing so in > conjunction with the patch "drivers/crypto/fsl: assign job-rings to > non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone > is > active. > > u-boot

Re: [U-Boot] [PATCH v4 2/2] imx: mx7: run sec_init for CAAM RNG

2018-01-26 Thread Auer, Lukas
On Fri, 2018-01-26 at 16:27 +, Bryan O'Donoghue wrote: > This patch adds a sec_init call into arch_misc_init(). Doing so in > conjunction with the patch "drivers/crypto/fsl: assign job-rings to > non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone > is > active. > > u-boot

Re: [U-Boot] [PATCH] crypto/fsl: instantiate all rng state handles

2018-01-25 Thread Auer, Lukas
On Thu, 2018-01-25 at 15:53 +, Bryan O'Donoghue wrote: > > On 25/01/18 13:11, Lukas Auer wrote: > > Extend the instantiate_rng() function and the corresponding CAAM > > job > > descriptor to instantiate all RNG state handles. This moves the RNG > > instantiation code in line with the CAAM

Re: [U-Boot] [PATCH 0/2] Fix CAAM for TrustZone enable for warp7

2018-01-25 Thread Auer, Lukas
On Wed, 2018-01-24 at 19:41 +, Bryan O'Donoghue wrote: > > On 24/01/18 17:41, Auer, Lukas wrote: > > Thanks for adding me to the CC list. > > I have experienced the same thing regarding the dec0 registers. > > However, I don't understand why you wa

Re: [U-Boot] [PATCH 0/2] Fix CAAM for TrustZone enable for warp7

2018-01-24 Thread Auer, Lukas
On Tue, 2018-01-23 at 21:10 +, Bryan O'Donoghue wrote: > This series is the u-boot fix to a problem we encountered when > enabling > OPTEE/TrustZone on the WaRP7. The symptom is once TrustZone is > activated > the first page of CAAM registers becomes read-only, read-zero from > the >

Re: [U-Boot] [PATCH 0/2] Fix CAAM for TrustZone enable for warp7

2018-01-24 Thread Auer, Lukas
On Wed, 2018-01-24 at 14:35 +, Bryan O'Donoghue wrote: > > On 24/01/18 12:52, Auer, Lukas wrote: > > On Tue, 2018-01-23 at 21:10 +, Bryan O'Donoghue wrote: > > > This series is the u-boot fix to a problem we encountered when > > > enabling > > > OP

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-04 Thread Auer, Lukas
On Tue, 2018-09-04 at 17:31 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Sep 4, 2018 at 5:39 AM Auer, Lukas > wrote: > > > > On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > > > This adds QEMU RISC-V 'virt' board target support, with the hope > >

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-05 Thread Auer, Lukas
On Wed, 2018-09-05 at 09:28 +0800, Rick Chen wrote: > > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > > > Sent: Wednesday, September 05, 2018 5:53 AM > > > To: bmeng...@gmail.com > > > Cc: Rick Jian-Zhi Chen(陳建志); u-boot@lists.denx.de >

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-05 Thread Auer, Lukas
On Wed, 2018-09-05 at 10:34 +0800, Bin Meng wrote: > Hi Rick, > > On Wed, Sep 5, 2018 at 9:27 AM Rick Chen > wrote: > > > > > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > > > > Sent: Wednesday, September 05, 2018 5:53 AM > > &

Re: [U-Boot] [PATCH 08/12] riscv: Add a helper routine to print CPU information

2018-09-06 Thread Auer, Lukas
Hi Bin, On Thu, 2018-09-06 at 11:03 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Sep 4, 2018 at 5:42 AM Auer, Lukas > wrote: > > > > On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > > > This adds a helper routine to print CPU information. Currently > &

Re: [U-Boot] [PATCH 03/12] riscv: bootm: Correct the 1st kernel argument to hart id

2018-09-06 Thread Auer, Lukas
Hi Bin, On Thu, 2018-09-06 at 10:57 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Sep 4, 2018 at 5:41 AM Auer, Lukas > wrote: > > > > On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > > > The first argument of Linux kernel is the risc-v core hart id, >

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-06 Thread Auer, Lukas
Hi Bin, On Thu, 2018-09-06 at 11:14 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Sep 5, 2018 at 5:35 PM Auer, Lukas > wrote: > > > > On Wed, 2018-09-05 at 09:28 +0800, Rick Chen wrote: > > > > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-06 Thread Auer, Lukas
Hi Bin, On Thu, 2018-09-06 at 11:15 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Sep 5, 2018 at 5:37 PM Auer, Lukas > wrote: > > > > On Wed, 2018-09-05 at 10:34 +0800, Bin Meng wrote: > > > Hi Rick, > > > > > > On

Re: [U-Boot] [PATCH v3 05/17] riscv: cmd: bdinfo: Print the relocation address

2018-09-30 Thread Auer, Lukas
On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > Add printing of U-Boot relocation address. > > Signed-off-by: Bin Meng > > --- > > Changes in v3: > - net patch to print the relocation address in cmd 'bdinfo' > > Changes in v2: None > > cmd/bdinfo.c | 2 ++ > 1 file changed, 2

Re: [U-Boot] [PATCH v3 17/17] riscv: Move do_reset() to a common place

2018-09-30 Thread Auer, Lukas
Hi Bin, On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > We don't have a reset method on any RISC-V board yet. Instead of > adding the same 'unsupported' message for each CPU variant it might > make more sense to add a generic do_reset function for all CPU > variants to lib/, similar to the

Re: [U-Boot] [PATCH v3 15/17] riscv: kconfig: Imply DM support for some common drivers

2018-09-30 Thread Auer, Lukas
On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > This implies DM support for some common drivers that are used on > RISC-V. > > Signed-off-by: Bin Meng > > --- > > Changes in v3: > - new patch to imply DM support for some common drivers > > Changes in v2: None > > arch/Kconfig

Re: [U-Boot] [PATCH 06/30] riscv: add Kconfig entries for the C and A ISA extensions

2018-10-24 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 15:21 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer > wrote: > > > > Add Kconfig entries for the C (compressed instructions) and A > > (atomic > > instructions) ISA extensions. Only the C ISA extension is > > selectable. > >

Re: [U-Boot] [PATCH 07/30] riscv: set -march and -mabi based on the Kconfig configuration

2018-10-24 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 15:21 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer > wrote: > > > > Use the new Kconfig entries to construct the ISA string for the > > -march > > compiler flag. The -mabi compiler flag is selected based on the > > base > >

Re: [U-Boot] FW: [PATCH 02/30] riscv: ignore device tree binaries

2018-10-24 Thread Auer, Lukas
Hi Rick and Bin, On Tue, 2018-10-23 at 09:30 +0800, Rick Chen wrote: > > From: Bin Meng [mailto:bmeng...@gmail.com] > > Sent: Monday, October 22, 2018 2:16 PM > > To: Lukas Auer > > Cc: U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志) > > Subject: Re: [PATCH 02/30] riscv: ignore device tree binaries

Re: [U-Boot] [PATCH 06/30] riscv: add Kconfig entries for the C and A ISA extensions

2018-10-24 Thread Auer, Lukas
Hi Bin, On Wed, 2018-10-24 at 23:32 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Oct 24, 2018 at 11:21 PM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Mon, 2018-10-22 at 15:21 +0800, Bin Meng wrote: > > > Hi Lukas, > > > > &g

Re: [U-Boot] [PATCH 22/30] riscv: remove unused labels in start.S

2018-10-24 Thread Auer, Lukas
Hi Rick, On Wed, 2018-10-24 at 13:47 +0800, Rick Chen wrote: > Rick Chen 於 2018年10月24日 週三 下午1:20寫道: > > > > Bin Meng 於 2018年10月24日 週三 上午11:34寫道: > > > > > > Hi Rich, > > > > > > On Wed, Oct 24, 2018 at 10:37 AM Rick Chen > > > wrote: > > > > > > > > > > > The labels nmi_vector, trap_vector

Re: [U-Boot] [PATCH 04/30] riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I

2018-10-24 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 14:23 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer > wrote: > > > > RISC-V defines the base integer instruction sets as RV32I and > > RV64I. > > Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_64I to > > match > >

Re: [U-Boot] [PATCH 00/30] General fixes / cleanup for RISC-V and improvements to qemu-riscv

2018-10-26 Thread Auer, Lukas
Hi Bin, On Fri, 2018-10-26 at 21:20 +0800, Bin Meng wrote: > Hi Lukas, > > On Mon, Oct 22, 2018 at 5:37 PM Bin Meng wrote: > > > > Hi Lukas, > > > > On Sat, Oct 20, 2018 at 6:08 AM Lukas Auer > > wrote: > > > > > > > > > This patch series includes general fixes and cleanup for RISC-V. > >

Re: [U-Boot] [PATCH 26/30] bdinfo: riscv: print fdt_blob address

2018-10-26 Thread Auer, Lukas
Hi Rick and Bin, On Wed, 2018-10-24 at 14:54 +0800, Rick Chen wrote: > > > > Print the address of the u-boot device tree. > > > > > > > > > > This is unnecessary as it is already done by 'fdt' command. > > > > > Hi Bin & Lukas > > At the beginning, I really don't understand the fdt Usage: >

Re: [U-Boot] [PATCH v2 07/29] riscv: add Kconfig entries for the code model

2018-10-31 Thread Auer, Lukas
Hi Bin, On Wed, 2018-10-31 at 10:13 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Oct 30, 2018 at 8:57 PM Lukas Auer > wrote: > > > > RISC-V has two code models, medium low (medlow) and medium any > > (medany). > > Medlow limits addressable memory to a single 2 GiB range between > > the > >

Re: [U-Boot] FW: [PATCH 18/30] riscv: invalidate the instruction cache before jumping to Linux

2018-10-26 Thread Auer, Lukas
Hi Rick, On Mon, 2018-10-22 at 09:39 +0800, Rick Chen wrote: > > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de] > > Sent: Saturday, October 20, 2018 6:08 AM > > To: u-boot@lists.denx.de > > Cc: Bin Meng; Lukas Auer; Greentime Hu; Alexander Graf; Rick Jian- > > Zhi Chen(陳建志) > > Subject:

Re: [U-Boot] [PATCH] riscv: cache: Implement i/dcache [status, enable, disable]

2018-10-26 Thread Auer, Lukas
Hi Rick, On Mon, 2018-10-22 at 16:16 +0800, Andes wrote: > From: Rick Chen > > AndeStar V5 provide mcache_ctl register which can configure > I/D cache as enabled or disabled. > > This CSR will be encapsulated by CONFIG_NDS_V5. > If you want to configure cache on AndeStar V5 > AE350 platform.

Re: [U-Boot] [PATCH] riscv: cache: Implement i/dcache [status, enable, disable]

2018-10-30 Thread Auer, Lukas
Hi Rick, On Tue, 2018-10-30 at 10:48 +0800, Rick Chen wrote: > Auer, Lukas 於 2018年10月29日 週一 > 下午8:13寫道: > > > > Hi Rick, > > > > On Mon, 2018-10-29 at 11:16 +0800, Rick Chen wrote: > > > Auer, Lukas 於 2018年10月27日 週六 > > > 上午12:32寫道: > >

Re: [U-Boot] [PATCH 22/30] riscv: remove unused labels in start.S

2018-10-30 Thread Auer, Lukas
Hi Rick, On Tue, 2018-10-30 at 09:49 +0800, Rick Chen wrote: > Auer, Lukas 於 2018年10月30日 週二 > 上午12:43寫道: > > > > Hi Rick, > > > > On Thu, 2018-10-25 at 15:56 +, Auer, Lukas wrote: > > > Hi Rick, > > > > > > On Thu, 2018-10-25 at 09:

Re: [U-Boot] [PATCH v2 28/29] riscv: qemu: detect and boot the kernel passed by QEMU

2018-10-30 Thread Auer, Lukas
On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote: > QEMU embeds the location of the kernel image in the device tree. > Store > this address in the environment as variable kernel_start and use it > in > CONFIG_BOOTCOMMAND to boot the kernel. Use the device tree passed by > the > prior boot stage

Re: [U-Boot] [PATCH v2 24/29] riscv: store device tree passed by prior boot stage in environment

2018-10-30 Thread Auer, Lukas
On Tue, 2018-10-30 at 14:53 +0100, Alexander Graf wrote: > > On 30.10.18 14:44, Auer, Lukas wrote: > > On Tue, 2018-10-30 at 14:19 +0100, Alexander Graf wrote: > > > > > > On 30.10.18 13:55, Lukas Auer wrote: > > > > The device tree passed by the pr

Re: [U-Boot] [PATCH v2 24/29] riscv: store device tree passed by prior boot stage in environment

2018-10-30 Thread Auer, Lukas
On Tue, 2018-10-30 at 14:19 +0100, Alexander Graf wrote: > > On 30.10.18 13:55, Lukas Auer wrote: > > The device tree passed by the prior boot stage can be used to boot > > Linux. Store it as environment variable "prior_stage_dtb", so that > > it > > can be used as part of the boot command. > >

Re: [U-Boot] [PATCH v2 28/29] riscv: qemu: detect and boot the kernel passed by QEMU

2018-10-30 Thread Auer, Lukas
On Tue, 2018-10-30 at 16:27 +0100, Alexander Graf wrote: > > On 30.10.18 16:02, Auer, Lukas wrote: > > On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote: > > > QEMU embeds the location of the kernel image in the device tree. > > > Store > > > this

Re: [U-Boot] [PATCH 09/30] riscv: move target selection into separate file

2018-10-25 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 15:22 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer > wrote: > > > > Move the target selection into a separate file (Kconfig.board) to > > avoid > > clutter once we support more boards. > > > > Signed-off-by: Lukas Auer > >

Re: [U-Boot] [PATCH 11/30] riscv: fix use of incorrectly sized variables

2018-10-25 Thread Auer, Lukas
Hi Rick and Bin, On Tue, 2018-10-23 at 13:52 +0800, Rick Chen wrote: > > > -static void _exit_trap(int code, uint epc, struct pt_regs *regs) > > > +static void _exit_trap(ulong code, ulong epc, struct pt_regs > > > *regs) > > > { > > > static const char * const exception_code[] = { > > >

Re: [U-Boot] [PATCH 13/30] riscv: do not reimplement generic io functions

2018-10-25 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 15:36 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer > wrote: > > > > RISC-V u-boot reimplements the generic io functions from > > nits: U-Boot > Fixed in v2. Thanks, Lukas > > asm-generic/io.h. Remove the redundant

Re: [U-Boot] [PATCH] riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

2018-10-25 Thread Auer, Lukas
Hi Rick, On Thu, 2018-10-25 at 11:28 +0800, Rick Chen wrote: > Bin Meng 於 2018年10月25日 週四 上午11:16寫道: > > > > Hi Rick, > > > > On Thu, Oct 25, 2018 at 11:11 AM Rick Chen > > wrote: > > > > > > Bin Meng 於 2018年10月25日 週四 上午10:33寫道: > > > > > > > > Hi Rick, > > > > > > > > On Thu, Oct 25, 2018

Re: [U-Boot] [PATCH 22/30] riscv: remove unused labels in start.S

2018-10-25 Thread Auer, Lukas
Hi Rick, On Thu, 2018-10-25 at 09:16 +0800, Rick Chen wrote: > Auer, Lukas 於 2018年10月24日 週三 > 下午10:14寫道: > > > > Hi Rick, > > > > On Wed, 2018-10-24 at 13:47 +0800, Rick Chen wrote: > > > Rick Chen 於 2018年10月24日 週三 下午1:20寫道: > > >

Re: [U-Boot] [PATCH 29/30] dm: core: add missing prototype for ofnode_read_u64

2018-10-25 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 17:35 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:11 AM Lukas Auer > wrote: > > > > Signed-off-by: Lukas Auer > > --- > > > > include/dm/ofnode.h | 10 ++ > > 1 file changed, 10 insertions(+) > > > > diff --git

Re: [U-Boot] [PATCH 21/30] riscv: remove CONFIG_INIT_CRITICAL

2018-10-25 Thread Auer, Lukas
Hi Bin, On Thu, 2018-10-25 at 10:57 +0800, Bin Meng wrote: > Hi Lukas, > > On Mon, Oct 22, 2018 at 5:19 PM Bin Meng wrote: > > > > Hi Lukas, > > > > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer > > wrote: > > > > > > CONFIG_INIT_CRITICAL is deprecated and not used for RISC-V. > > > Remove it.

Re: [U-Boot] [PATCH 09/30] riscv: move target selection into separate file

2018-10-25 Thread Auer, Lukas
Hi Bin, On Thu, 2018-10-25 at 10:50 +0800, Bin Meng wrote: > On Tue, Oct 23, 2018 at 10:48 AM Rick Chen > wrote: > > > > > > Subject: Re: [PATCH 09/30] riscv: move target selection into > > > > separate file > > > > > > > > Hi Lukas, > > > > > > > > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer

Re: [U-Boot] [PATCH 12/30] riscv: make use of the barrier functions from Linux

2018-10-25 Thread Auer, Lukas
Hi Bin, On Mon, 2018-10-22 at 15:36 +0800, Bin Meng wrote: > Hi Lukas, > > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer > wrote: > > > > Replace the barrier functions in arch/riscv/include/asm/io.h with > > those > > defined in barrier.h, which is imported from Linux. This version is > >

Re: [U-Boot] [PATCH v2 28/29] riscv: qemu: detect and boot the kernel passed by QEMU

2018-11-03 Thread Auer, Lukas
On Tue, 2018-10-30 at 16:27 +0100, Alexander Graf wrote: > > On 30.10.18 16:02, Auer, Lukas wrote: > > On Tue, 2018-10-30 at 13:55 +0100, Lukas Auer wrote: > > > QEMU embeds the location of the kernel image in the device tree. > > > Store > > > this

Re: [U-Boot] FW: [PATCH 18/30] riscv: invalidate the instruction cache before jumping to Linux

2018-11-03 Thread Auer, Lukas
Hi Rick, On Wed, 2018-10-31 at 12:22 +0800, Rick Chen wrote: > Greentime Hu 於 2018年10月31日 週三 上午11:48寫道: > > > > Rick Chen 於 2018年10月29日 週一 上午10:25寫道: > > > > > > Auer, Lukas 於 2018年10月27日 週六 > > > 上午12:27寫道: > > > > > > > >

Re: [U-Boot] [PATCH v2 28/29] riscv: qemu: detect and boot the kernel passed by QEMU

2018-11-04 Thread Auer, Lukas
On Sat, 2018-11-03 at 20:33 +0100, Alexander Graf wrote: > > On 03.11.18 18:07, Auer, Lukas wrote: > > On Tue, 2018-10-30 at 16:27 +0100, Alexander Graf wrote: > > > > > > On 30.10.18 16:02, Auer, Lukas wrote: > > > > On Tue, 2018-10-30 at 13:55 +010

Re: [U-Boot] [PATCH] efi_loader: Handle RELA absolute relocations properly

2018-11-05 Thread Auer, Lukas
pplications on the > RISC-V > QEMU port. > > Reported-by: Auer, Lukas > Signed-off-by: Alexander Graf > --- > lib/efi_loader/efi_runtime.c | 3 +++ > 1 file changed, 3 insertions(+) > > Tested-by: Lukas Auer Thanks for the patch! That explains why it was working on the An

Re: [U-Boot] [PATCH v2] riscv: cache: Implement i/dcache [status, enable, disable]

2018-11-04 Thread Auer, Lukas
Hi Rick, On Thu, 2018-11-01 at 12:08 +0800, Andes wrote: > From: Rick Chen > > AndeStar RISC-V(V5) provide mcache_ctl register which > can configure I/D cache as enabled or disabled. > > This CSR will be encapsulated by CONFIG_RISCV_NDS. > If you want to configure cache on AndeStar V5 > AE350

Re: [U-Boot] [PATCH] riscv: cache: Implement i/dcache [status, enable, disable]

2018-10-29 Thread Auer, Lukas
Hi Rick, On Mon, 2018-10-29 at 11:16 +0800, Rick Chen wrote: > Auer, Lukas 於 2018年10月27日 週六 > 上午12:32寫道: > > > > Hi Rick, > > > > On Mon, 2018-10-22 at 16:16 +0800, Andes wrote: > > > From: Rick Chen > > > > > > AndeStar V5 provid

Re: [U-Boot] [PATCH 22/30] riscv: remove unused labels in start.S

2018-10-29 Thread Auer, Lukas
Hi Rick, On Thu, 2018-10-25 at 15:56 +, Auer, Lukas wrote: > Hi Rick, > > On Thu, 2018-10-25 at 09:16 +0800, Rick Chen wrote: > > Auer, Lukas 於 2018年10月24日 週三 > > 下午10:14寫道: > > > > > > Hi Rick, > > > > > > On Wed, 2018-10-24 at 13

Re: [U-Boot] [PATCH v3 4/8] dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()

2018-11-10 Thread Auer, Lukas
Hi Bin, On Wed, 2018-10-10 at 22:06 -0700, Bin Meng wrote: > Currently the comments of several APIs (eg: dm_init_and_scan()) say: > > @pre_reloc_only: If true, bind only drivers with the > DM_FLAG_PRE_RELOC > flag. If false bind all drivers. > > The 'Pre-Relocation Support' chapter in

Re: [U-Boot] [PATCH v2 07/29] riscv: add Kconfig entries for the code model

2018-11-13 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 15:34 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Oct 31, 2018 at 11:01 PM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Wed, 2018-10-31 at 10:13 +0800, Bin Meng wrote: > > > Hi Lukas, > > > > &g

Re: [U-Boot] [PATCH 05/19] riscv: Add a SYSCON driver for Core Local Interruptor

2018-11-13 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > This adds U-Boot syscon driver for RISC-V Core Local Interruptor > (CLINT). The CLINT block holds memory-mapped control and status > registers associated with software and timer interrupts. > > 3 APIs are provided for U-Boot to

Re: [U-Boot] [PATCH v3 27/28] riscv: qemu: detect and boot the kernel passed by QEMU

2018-11-13 Thread Auer, Lukas
On Tue, 2018-11-13 at 10:01 +0100, Alexander Graf wrote: > > On 09.11.18 13:59, Lukas Auer wrote: > > QEMU embeds the location of the kernel image in the device tree. > > Store > > this address in the environment as variable kernel_start. It is > > used in > > the board-local distro boot command

Re: [U-Boot] [PATCH 12/19] riscv: Do some basic architecture level cpu initialization

2018-11-15 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > Implement arch_cpu_init() to do some basic architecture level cpu > initialization, like FPU enable, etc. > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/cpu.c | 21 + > 1 file changed, 21 insertions(+) > >

Re: [U-Boot] [PATCH v2 1/1] efi_selftest: don't hang on missing timer

2018-11-15 Thread Auer, Lukas
On Wed, 2018-11-14 at 09:23 +0100, Alexander Graf wrote: > On 11/12/2018 08:57 PM, Heinrich Schuchardt wrote: > > qemu-riscv32_defconfig and qemu-riscv64_defconfig do not supply a > > timer. > > This causes the EFI selftest to hang on tests which require a > > timer. > > > > So let's disable

Re: [U-Boot] [PATCH 05/19] riscv: Add a SYSCON driver for Core Local Interruptor

2018-11-14 Thread Auer, Lukas
Hi Bin, On Wed, 2018-11-14 at 09:48 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Nov 13, 2018 at 10:45 PM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > > > This adds U-Boot syscon driver f

Re: [U-Boot] [PATCH 07/19] riscv: kconfig: Allow platform to specify Kconfig options

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > At present there are just two levels of Kconfig option hierarchy in > RISC-V. This adds a new level for platform to specify additional > options. It is organized in a way that platform-specific options > followed by board-specific ones,

Re: [U-Boot] [PATCH 09/19] riscv: qemu: Probe cpus during boot

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > This calls cpu_probe_all() to probe all available cpus. > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/qemu/Kconfig | 1 + > arch/riscv/cpu/qemu/cpu.c | 14 ++ > 2 files changed, 15 insertions(+) >

Re: [U-Boot] [PATCH 17/19] riscv: Pass correct exception code to _exit_trap()

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > The most significant bit in mcause register should be masked to > form the exception code for _exit_trap(). > > Signed-off-by: Bin Meng > --- > > arch/riscv/lib/interrupts.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >

Re: [U-Boot] [PATCH 08/19] riscv: Enlarge the default SYS_MALLOC_F_LEN

2018-11-14 Thread Auer, Lukas
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > Increase the heap size for the pre-relocation stage, so that CPU > driver can be loaded. > > Signed-off-by: Bin Meng > --- > > arch/riscv/Kconfig | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Lukas Auer

Re: [U-Boot] [PATCH 10/19] riscv: Add CSR numbers

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > The standard RISC-V ISA sets aside a 12-bit encoding space for up > to 4096 CSRs. This adds all known CSR numbers as defined in the > RISC-V Privileged Architecture Version 1.10. > > Signed-off-by: Bin Meng > --- > >

Re: [U-Boot] [PATCH 14/19] riscv: Fix context restore before returning from trap handler

2018-11-14 Thread Auer, Lukas
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > sp cannot be loaded before restoring other registers. > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/mtrap.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Lukas Auer Good catch! > diff --git

Re: [U-Boot] [PATCH 13/19] riscv: Move trap handler codes to mtrap.S

2018-11-14 Thread Auer, Lukas
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > Currently the M-mode trap handler codes are in start.S. For future > extension, move them to a separate file mtrap.S. > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/Makefile | 2 +- > arch/riscv/cpu/mtrap.S | 106 >

Re: [U-Boot] [PATCH 18/19] riscv: Refactor handle_trap() a little for future extension

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > Use a variable 'code' to store the exception code to simplify the > codes in handle_trap(). > > Signed-off-by: Bin Meng > --- > > arch/riscv/lib/interrupts.c | 16 ++-- > 1 file changed, 10 insertions(+), 6 deletions(-)

Re: [U-Boot] [PATCH 04/19] cpu: Add a RISC-V CPU driver

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > This adds a driver for RISC-V CPU. Note the driver will bind > a RISC-V timer driver if "timebase-frequency" property is > present in the device tree. > > Signed-off-by: Bin Meng > --- > Since we have the CPU driver, we could also

Re: [U-Boot] [PATCH 15/19] riscv: Return to previous privilege level after trap handling

2018-11-14 Thread Auer, Lukas
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > At present the trap handler returns to M-mode only. Change to > returning to previous privilege level instead. > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/mtrap.S | 3 --- > 1 file changed, 3 deletions(-) > Reviewed-by: Lukas Auer

Re: [U-Boot] [PATCH 16/19] riscv: Adjust the _exit_trap() position to come before handle_trap()

2018-11-14 Thread Auer, Lukas
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > With this change, we can avoid a forward declaration. > > Signed-off-by: Bin Meng > --- > > arch/riscv/lib/interrupts.c | 62 ++- > -- > 1 file changed, 30 insertions(+), 32 deletions(-) >

Re: [U-Boot] [PATCH 19/19] riscv: Allow U-Boot to run on hart 0 only

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > Allow U-Boot to run on hart 0 only, and suspend other harts. > > With this change, '-smp n' works on QEMU RISC-V board. > > Signed-off-by: Bin Meng > > --- > > arch/riscv/cpu/start.S | 4 > 1 file changed, 4 insertions(+) >

Re: [U-Boot] [PATCH v2] riscv: cache: Implement i/dcache [status, enable, disable]

2018-11-06 Thread Auer, Lukas
Hi Rick, On Tue, 2018-11-06 at 10:28 +0800, Rick Chen wrote: > Auer, Lukas 於 2018年11月4日 週日 > 下午10:21寫道: > > > > Hi Rick, > > > > On Thu, 2018-11-01 at 12:08 +0800, Andes wrote: > > > From: Rick Chen > > > > > > AndeStar RISC-V(V5)

Re: [U-Boot] [PATCH 02/19] dm: cpu: Add timebase frequency to the platdata

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > This adds a timebase_freq member to the 'struct cpu_platdata', to > hold the "timebase-frequency" value in the cpu or /cpus node. > > Signed-off-by: Bin Meng > --- > > include/cpu.h | 3 +++ > 1 file changed, 3 insertions(+) >

Re: [U-Boot] [PATCH 03/19] riscv: qemu: Create a simple-bus driver for the soc node

2018-11-14 Thread Auer, Lukas
Hi Bin, On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote: > To enumerate devices on the /soc/ node, create a "simple-bus" > driver to match "riscv-virtio-soc". > > Signed-off-by: Bin Meng > --- > > arch/riscv/cpu/qemu/cpu.c | 13 + > 1 file changed, 13 insertions(+) >

Re: [U-Boot] [PATCH v2 28/29] riscv: qemu: detect and boot the kernel passed by QEMU

2018-11-04 Thread Auer, Lukas
Hi Bin, On Sun, 2018-11-04 at 22:39 +0800, Bin Meng wrote: > Hi Lukas, > > On Tue, Oct 30, 2018 at 8:57 PM Lukas Auer > wrote: > > > > QEMU embeds the location of the kernel image in the device tree. > > Store > > this address in the environment as variable kernel_start and use it > > in > >

Re: [U-Boot] [PATCH v3 00/17] riscv: Add QEMU virt board support

2018-10-03 Thread Auer, Lukas
Hi Bin, On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > This series adds QEMU RISC-V 'virt' board target support, with the > hope of helping people easily test U-Boot on RISC-V. > > Some existing RISC-V codes have been changed to make it easily to > support new targets. Some spotted coding

Re: [U-Boot] [PATCH v3 00/17] riscv: Add QEMU virt board support

2018-10-04 Thread Auer, Lukas
Hi Bin, On Thu, 2018-10-04 at 15:01 +0800, Bin Meng wrote: > Hi Lukas, > > On Thu, Oct 4, 2018 at 12:45 AM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > > > This series adds QEMU RISC-V 'virt' bo

Re: [U-Boot] [PATCH 08/12] riscv: Add a helper routine to print CPU information

2018-09-03 Thread Auer, Lukas
On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > This adds a helper routine to print CPU information. Currently > it prints all the instruction set extensions that the processor > core supports. > > Signed-off-by: Bin Meng > --- > > arch/riscv/Makefile | 1 + >

Re: [U-Boot] [PATCH 03/12] riscv: bootm: Correct the 1st kernel argument to hart id

2018-09-03 Thread Auer, Lukas
On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > The first argument of Linux kernel is the risc-v core hart id, > from which the kernel is booted from. It is not the mach_id, > which seems to be copied from arm. > > Signed-off-by: Bin Meng > --- > > arch/riscv/lib/bootm.c | 18

Re: [U-Boot] [PATCH 12/12] riscv: Add QEMU virt board support

2018-09-03 Thread Auer, Lukas
On Thu, 2018-08-30 at 00:54 -0700, Bin Meng wrote: > This adds QEMU RISC-V 'virt' board target support, with the hope of > helping people easily test U-Boot on RISC-V. > > The QEMU virt machine models a generic RISC-V virtual machine with > support for the VirtIO standard networking and block

Re: [U-Boot] [PATCH v3 00/28] General fixes / cleanup for RISC-V and improvements to qemu-riscv

2018-11-16 Thread Auer, Lukas
Hi Rick, On Tue, 2018-11-13 at 14:52 +0800, Rick Chen wrote: > Bin Meng 於 2018年11月13日 週二 下午2:49寫道: > > > > Hi Rick, > > > > On Tue, Nov 13, 2018 at 2:41 PM Rick Chen > > wrote: > > > > > > > > This patch series includes general fixes and cleanup for > > > > > RISC-V. It also adds > > > > >

Re: [U-Boot] [PATCH v2 02/11] riscv: Add asm/dma-mapping.h for DMA mappings

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:18 +, Anup Patel wrote: > This patch adds asm/dma-mapping.h for Linux-like DMA mappings > APIs required by some of the drivers (such as, Cadance MACB > Ethernet driver). > > Signed-off-by: Anup Patel > Reviewed-by: Bin Meng > Reviewed-by: Alexander Graf > --- >

Re: [U-Boot] [PATCH v2 09/11] drivers: serial_sifive: Skip baudrate config if no input clock

2019-01-20 Thread Auer, Lukas
Hi Anup, On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > From: Atish Patra > > It is possible that input clock is not available because clk > device was not available and 'clock-frequency' DT property is > also not available. Why would the clock device not be available? I suspect the

Re: [U-Boot] [PATCH v2 10/11] cpu: Bind timer driver for boot hart

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > From: Atish Patra > > Currently, timer driver is bound only for hart0. > > There is no mandatory requirement that hart0 should always > come up. In fact, HiFive Unleashed SoC hart0 doesn't boot > in S-mode because it only has M-mode. > >

Re: [U-Boot] [PATCH v2 01/11] riscv: Rename cpu/qemu to cpu/generic

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:18 +, Anup Patel wrote: > The QEMU CPU support under arch/riscv is pretty much generic > and works fine for SiFive Unleashed as well. In fact, there > will be quite a few RISC-V SOCs for which QEMU CPU support > will work fine. > > This patch renames cpu/qemu to

Re: [U-Boot] [PATCH v2 03/11] riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:18 +, Anup Patel wrote: > On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot > DMA mapping APIs will generate DMA addresses beyond 4GB. This > breaks DMA programming in 32bit DMA capable devices (such as > Cadence MACB ethernet). For example, If DRAM is

Re: [U-Boot] [PATCH v2 06/11] clk: Add SiFive FU540 PRCI clock driver

2019-01-20 Thread Auer, Lukas
Hi Anup, On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > Add driver code for the SiFive FU540 PRCI IP block. This IP block > handles reset and clock control for the SiFive FU540 device and > implements SoC-level clock tree controls and dividers. > > Based on code written by Wesley

Re: [U-Boot] [PATCH v2 08/11] drivers: serial_sifive: Fix baud rate calculation

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > From: Atish Patra > > Compute the baud rate multipler with more precision. > > Signed-off-by: Atish Patra > Reviewed-by: Alexander Graf > --- > drivers/serial/serial_sifive.c | 28 ++-- > 1 file changed, 26

Re: [U-Boot] [PATCH v2 00/11] SiFive FU540 Support

2019-01-20 Thread Auer, Lukas
Hi Anup, On Fri, 2019-01-18 at 11:18 +, Anup Patel wrote: > This patchset adds SiFive Freedom Unleashed (FU540) support > to RISC-V U-Boot. > > The patches are based upon latest RISC-V U-Boot tree > (git://git.denx.de/u-boot-riscv.git) at commit id > 91882c472d8c0aef4db699d3f2de55bf43d4ae4b

Re: [U-Boot] [PATCH v2 05/11] net: macb: Fix GEM hardware detection

2019-01-20 Thread Auer, Lukas
On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > From: Atish Patra > > Fix MID bit field check to correctly identify all GEM hardwares. > > The check is updated as per macb driver in Linux location: > /drivers/net/ethernet/cadence/macb_main.c:259 > > Signed-off-by: Atish Patra >

Re: [U-Boot] [PATCH v2 11/11] riscv: Add SiFive FU540 board support

2019-01-20 Thread Auer, Lukas
Hi Anup, On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > This patch adds SiFive FU540 board support. For now, only > SiFive serial, SiFive PRCI, and Cadance MACB drivers are > only enabled. The SiFive FU540 defconfig by default builds > U-Boot for S-Mode because U-Boot on SiFive FU540 will

Re: [U-Boot] [PATCH v2 06/11] clk: Add SiFive FU540 PRCI clock driver

2019-01-21 Thread Auer, Lukas
On Mon, 2019-01-21 at 05:55 +, Anup Patel wrote: > > -Original Message- > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > > Sent: Monday, January 21, 2019 1:43 AM > > To: s...@chromium.org; bmeng...@gmail.com; r...@andestech.com; Anup > >

Re: [U-Boot] [PATCH v2 09/11] drivers: serial_sifive: Skip baudrate config if no input clock

2019-01-21 Thread Auer, Lukas
On Sun, 2019-01-20 at 17:07 -0800, Atish Patra wrote: > On 1/20/19 12:22 PM, Auer, Lukas wrote: > > Hi Anup, > > > > On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > > > From: Atish Patra > > > > > > It is possible that input

Re: [U-Boot] [PATCH v2 11/11] riscv: Add SiFive FU540 board support

2019-01-21 Thread Auer, Lukas
On Sun, 2019-01-20 at 17:22 -0800, Atish Patra wrote: > On 1/20/19 12:26 PM, Auer, Lukas wrote: > > Hi Anup, > > > > On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote: > > > This patch adds SiFive FU540 board support. For now, only > > > SiFive serial

Re: [U-Boot] [PATCH v2 00/11] SiFive FU540 Support

2019-01-22 Thread Auer, Lukas
On Mon, 2019-01-21 at 04:04 +, Anup Patel wrote: > > -Original Message- > > From: Atish Patra [mailto:atish.pa...@wdc.com] > > Sent: Monday, January 21, 2019 7:07 AM > > To: Auer, Lukas ; s...@chromium.org; > > bmeng...@gmail.com; r...@andestech.com;

Re: [U-Boot] [PATCH v2 00/11] SiFive FU540 Support

2019-01-22 Thread Auer, Lukas
On Tue, 2019-01-22 at 12:31 +, Anup Patel wrote: > > -Original Message- > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > > Sent: Tuesday, January 22, 2019 5:21 PM > > To: s...@chromium.org; bmeng...@gmail.com; r...@andestech.com; Anup > >

Re: [U-Boot] [PATCH v5 06/25] riscv: ax25: Hide the ax25-specific Kconfig option

2018-12-12 Thread Auer, Lukas
On Wed, 2018-12-12 at 06:12 -0800, Bin Meng wrote: > There is no need to expose RISCV_NDS to the Kconfig menu as it is > an ax25-specific option. Introduce a dedicated Kconfig option for > the cache ops of ax25 platform and use that to guard the cache ops. > > Signed-off-by: Bin Meng > > --- >

Re: [U-Boot] [PATCH v4 16/25] riscv: Update supports_extension() to use desc from cpu driver

2018-12-12 Thread Auer, Lukas
Hi Bin, On Wed, 2018-12-12 at 22:11 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Dec 12, 2018 at 7:53 PM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Tue, 2018-12-11 at 23:11 -0800, Bin Meng wrote: > > > This updates supports_extension() imp

Re: [U-Boot] [PATCH v3 16/25] riscv: Update supports_extension() to use desc from cpu driver

2018-12-12 Thread Auer, Lukas
Hi Bin, On Wed, 2018-12-12 at 15:02 +0800, Bin Meng wrote: > Hi Lukas, > > On Wed, Dec 12, 2018 at 7:40 AM Auer, Lukas > wrote: > > > > Hi Bin, > > > > On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote: > > > This updates supports_extension() imp

Re: [U-Boot] [PATCH v2 06/20] riscv: ax25: Hide the ax25-specific Kconfig option

2018-12-10 Thread Auer, Lukas
On Fri, 2018-12-07 at 06:14 -0800, Bin Meng wrote: > There is no need to expose RISCV_NDS to the Kconfig menu as it is > an ax25-specific option. > > Signed-off-by: Bin Meng > --- > > Changes in v2: None > > arch/riscv/cpu/ax25/Kconfig | 8 +++- > 1 file changed, 3 insertions(+), 5

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