Add the necessary flash entry for the Spansion S25FL164K
flash. Tested on Marvell 88F6218 based design.
Signed-off-by: Ben Dooks ben.do...@codethink.co.uk
---
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
These are a pair of patches adding some SPI flashes that were evaluated
on a Marvell Kirkwood system.
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From: Adnan Ali adnan@codethink.co.uk
Add S25FL064A and S25FL116K flash indentifiers.
Signed-off-by: Adnan Ali adnan@codethink.co.uk
---
drivers/mtd/spi/sf_params.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index
On 18/12/14 12:14, Jagan Teki wrote:
On 17 November 2014 at 20:21, Ben Dooks ben.do...@codethink.co.uk wrote:
From: Adnan Ali adnan@codethink.co.uk
Add S25FL064A and S25FL116K flash indentifiers.
Signed-off-by: Adnan Ali adnan@codethink.co.uk
---
drivers/mtd/spi/sf_params.c | 2
rd/hardkernel/odroid-c2/Makefile
> > delete mode 100644 board/hardkernel/odroid-c2/README
> > delete mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
>
> Reviewed-by: Simon Glass <s...@chromium.org>
>
> Although I'm surprised this did not come through as a rename in your patch
On 2017-10-19 10:04, Neil Armstrong wrote:
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31
firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was
moved
and grown for security reasons.
But mainline U-boot and Linux has the
On 2017-10-19 14:22, Neil Armstrong wrote:
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31
firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was
moved
and grown for security reasons.
But mainline U-boot and Linux has the
#if CONFIG_IS_ENABLED(CLK) avoidable?
[...]
Thanks,
Neil
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Ben Dooks http://www.codethink.c
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.
Since this adds size to the build, do not add it by default
and avoid putting it in the SPL build if not needed.
Signed-off-by: Ben Dooks
---
v2
Add option to clear the LIM area on startup, just in case this
is the cause of some of the data-errors on startup.
Signed-off-by: Ben Dooks
[ben.do...@codethink.co.uk: changed from sifive.com address]
---
drivers/cache/Kconfig | 8 ++
drivers/cache/cache-sifive-ccache.c | 40
We are getting a number of cache errors on starting an OS,
so to try and avoid this, clear the errors when we first
probe the cache.
Signed-off-by: Ben Dooks
[ben.do...@codethink.co.uk: changed from sifive.com address]
---
drivers/cache/cache-sifive-ccache.c | 9 -
1 file changed, 8
On 08/09/2023 14:37, Ben Dooks wrote:
We are getting a number of cache errors on starting an OS,
so to try and avoid this, clear the errors when we first
probe the cache.
Signed-off-by: Ben Dooks
[ben.do...@codethink.co.uk: changed from sifive.com address]
As a follow-up, this hasn't been
On 20/10/2022 17:13, Bin Meng wrote:
Hi Ben,
On Thu, Oct 20, 2022 at 11:51 PM Ben Dooks wrote:
The 4.6 spec added an upper 32bits to the ATU limit, and since this
driver is already assuming the unrolled feature added in the 4.8
specification this really should be set.
This is causing a bug
this causes
the config viewport to become most of memory (obviously stopping
the emulated system working correctly)
Signed-off-by: Ben Dooks
---
drivers/pci/pcie_dw_common.c | 2 ++
drivers/pci/pcie_dw_common.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/pci/pcie_dw_common.c b/drivers
On 14/06/2023 07:25, Bo Gan wrote:
On 5/25/23 4:05 AM, Ben Dooks wrote:
On 15/05/2023 14:03, Ben Dooks wrote:
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.
Since this adds size to the build
ed") of the riscv-isa-manual.
+
+ zihpm:
+type: boolean
+description:
+ The standard Zihpm extension for hardware performance counters, as
+ ratified in the 20191213 version of the unprivileged ISA
+ specification.
+
+ ztso:
+type: boolean
+description:
+ The standard Ztso extension for total store ordering, as ratified in
+ commit 2e5236 ("Ztso is now ratified.") of the riscv-isa-manual.
+
+additionalProperties: true
+...
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
https://www.codethink.co.uk/privacy.html
On 15/05/2023 14:03, Ben Dooks wrote:
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.
Since this adds size to the build, do not add it by default
and avoid putting it in the SPL build
On 05/05/2023 09:02, Ben Dooks wrote:
Fix misisng atomic and test_and_{set,clear}_bit macros to allow
the ubi/ubifs code to be built for riscv. These are fairly simple
but are not being used outside of ubifs on our builds.
Has anyone had a chance to review these for merging?
I may be losing
:
=> ubifsload 0x21 /boot/Image.lzma
Loading file '/boot/Image.lzma' to addr 0x...
Unhandled exception: Store/AMO access fault
Signed-off-by: Ben Dooks
Signed-off-by: Ben Dooks
---
v2:
- fixed debug print
---
cmd/ubifs.c | 4 ++--
fs/ubifs/ubifs.c
On 05/06/2023 08:45, Heiko Schocher wrote:
Hello Ben,
On 10.05.23 15:41, Ben Dooks wrote:
The ubifsload command is truncating any address above 4GiB as it casts
this address to an u32, instead of using an unsigned long which most of
the other load commands do. Change this to an unsigned long
On 15/06/2023 20:01, Bo Gan wrote:
On 6/14/23 10:15 AM, Ben Dooks wrote:
On 14/06/2023 07:25, Bo Gan wrote:
On 5/25/23 4:05 AM, Ben Dooks wrote:
On 15/05/2023 14:03, Ben Dooks wrote:
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous
On 2023-06-12 08:47, Leo Liang wrote:
Hi Ben,
On Fri, May 05, 2023 at 09:02:06AM +0100, Ben Dooks wrote:
Add implementations of the local_irq_{save,restore} macros so that
can be used with riscv.
Signed-off-by: Ben Dooks
---
arch/riscv/include/asm/system.h | 15 +++
1 file
:
=> ubifsload 0x21 /boot/Image.lzma
Loading file '/boot/Image.lzma' to addr 0x...
Unhandled exception: Store/AMO access fault
Signed-off-by: Ben Dooks
---
cmd/ubifs.c | 2 +-
fs/ubifs/ubifs.c | 4 ++--
include/ubifs_uboot.h | 2 +-
3 files changed, 4 inserti
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.
Since this adds size to the build, do not add it by default
and avoid putting it in the SPL build if not needed.
Signed-off-by: Ben Dooks
---
arch
Fix misisng atomic and test_and_{set,clear}_bit macros to allow
the ubi/ubifs code to be built for riscv. These are fairly simple
but are not being used outside of ubifs on our builds.
Ben Dooks (3):
riscv: add generic link for
riscv: implement local_irq_{save,restore} macros
riscv: define
Add a link from to the generic one to allow
things like ubifs to be built. This can be extended with
riscv AMO ops at a later date.
Signed-off-by: Ben Dooks
---
arch/riscv/include/asm/atomic.h | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 arch/riscv/include/asm
Add implementations of the local_irq_{save,restore} macros so that
can be used with riscv.
Signed-off-by: Ben Dooks
---
arch/riscv/include/asm/system.h | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm
These seem to be missing, and trying to build ubifs without them
is causing errors due to these being missing.
Signed-off-by: Ben Dooks
---
arch/riscv/include/asm/bitops.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
If we're building non FU540/FU740 SoC drivers, then the sifive-prci.o
is not needed. Only build this when CONFIG_CLK_SIFIVE_PRCI is selected.
Signed-off-by: Ben Dooks
---
drivers/clk/sifive/Makefile | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/clk/sifive
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