On 6/4/21 10:40 PM, Chris Morgan wrote:
On Fri, Jun 04, 2021 at 09:42:18PM +0800, 林鼎强 wrote:
Hi Chris:
It's my honor to read about spi-rockchip-sfc driver from you, and your code has
made a big difference to me.
Recently, we happen to be willing to submit the spi-mem rk sfc drivers, and we
From: Chris Morgan
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts | 16
2 files changed, 33 insertions(+)
diff --git
-off-by: Jon Lin
---
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished status
Changes in v5:
- Support dma transfer
- Add CONFIG_IS_ENABLED(CLK) limitation
- Support spinand devices
- Support SFC ver4 ver5
- Using "rockchip, sfc" as com
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished status
Changes in v5:
- Support dma transfer
- Add CONFIG_IS_ENABLED(CLK) limitation
- Support spinand devices
- Support SFC ver4 ver5
- Using "rockchip, sfc" as compatible id
- Get clock from
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 +++
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts | 16
2 files changed, 33 insertions(+)
diff --git
-off-by: Jon Lin
---
Changes in v5:
- Support dma transfer
- Add CONFIG_IS_ENABLED(CLK) limitation
- Support spinand devices
- Support SFC ver4 ver5
- Using "rockchip, sfc" as compatible id
- Get clock from the index to compatible with those case which's
clock-names is not parsed
Cha
Changes in v5:
- Support dma transfer
- Add CONFIG_IS_ENABLED(CLK) limitation
- Support spinand devices
- Support SFC ver4 ver5
- Using "rockchip, sfc" as compatible id
- Get clock from the index to compatible with those case which's
clock-names is not parsed
- px30 use "rockchip, sfc" as
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
From: Chris Morgan
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 ++
1 file c
Set clock related processing into set_speed logic. And Optimize
printing format.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
drivers/spi/rockchip_sfc.c | 83 ++
1 file changed, 40 insertions(+), 43 deletions(-)
diff --git
Using read_poll logic.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
Changes in v2:
- Fix assigned but never used return error codes
drivers/spi/rockchip_sfc.c | 67 --
1 file changed, 35 insertions(+), 32 deletions(-)
diff --git a/drivers/spi
On 2021/8/19 1:13, Chris Morgan wrote:
On Tue, Aug 17, 2021 at 09:41:01AM +0800, Jon Lin wrote:
TX single line is more compatible for corresponding board
Signed-off-by: Jon Lin
---
There are still some bugs with this. Note that if you want for now
you can just abandon this patch (or fix
Set clock related processing into set_speed logic. And Optimize
printing format.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
drivers/spi/rockchip_sfc.c | 83 ++
1 file changed, 40 insertions(+), 43 deletions(-)
diff --git a/drivers/spi
Using read_poll logic.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
drivers/spi/rockchip_sfc.c | 67 --
1 file changed, 35 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 2028b28e26
On 2021/8/14 0:48, Chris Morgan wrote:
On Fri, Aug 13, 2021 at 09:53:03AM +0800, Jon Lin wrote:
Here is the point, Can you take a try.
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 8173724ecd..33c5344c70 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi
On 2021/8/16 23:22, Chris Morgan wrote:
On Mon, Aug 16, 2021 at 09:00:59PM +0800, Jon Lin wrote:
On 2021/8/14 0:48, Chris Morgan wrote:
On Fri, Aug 13, 2021 at 09:53:03AM +0800, Jon Lin wrote:
Here is the point, Can you take a try.
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi
Set clock related processing into set_speed logic. And Optimize
printing format.
Signed-off-by: Jon Lin
---
drivers/spi/rockchip_sfc.c | 83 ++
1 file changed, 40 insertions(+), 43 deletions(-)
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi
TX single line is more compatible for corresponding board
Signed-off-by: Jon Lin
---
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 2 +-
arch/arm/dts/rk3326-odroid-go2.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
Using read_poll logic.
Signed-off-by: Jon Lin
---
drivers/spi/rockchip_sfc.c | 67 --
1 file changed, 35 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 2028b28e26..33c5344c70 100644
--- a/drivers
Using read_poll logic.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v2)
Changes in v2:
- Fix assigned but never used return error codes
drivers/spi/rockchip_sfc.c | 67 --
1 file changed, 35 insertions(+), 32 deletions(-)
diff
Set clock related processing into set_speed logic. And Optimize
printing format.
Tested-by: Chris Morgan
Signed-off-by: Jon Lin
---
Changes in v3:
- Remove useless headfile
- Fix misspelling
drivers/spi/rockchip_sfc.c | 82 ++
1 file changed, 39 insertions
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 +++
-off-by: Jon Lin
---
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
Changes in v7:
- Make sfc-use-dma configurable
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished
port for using SFC
rockchip: px30: add the serial flash controller
rockchip: px30: add support for SFC for Odroid Go Advance
Jon Lin (1):
rockchip: px30: Support configure SFC
Tom Rini (1):
CI: Update to LLVM-12
.azure-pipelines.yml | 4 +-
.gitlab-ci.yml
From: Tom Rini
The current stable release of LLVM is 12, update to that. While at it,
fix that we had not correctly upgraded to LLVM 11 previously.
Signed-off-by: Tom Rini
Signed-off-by: Jon Lin
---
(no changes since v1)
.azure-pipelines.yml| 4 ++--
.gitlab-ci.yml | 4
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
-off-by: Jon Lin
---
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
Changes in v7:
- Make sfc-use-dma configurable
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
Changes in v8:
- Change to use tx single line to make a good compatible
- Change spiflash dts node
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts
port for using SFC
rockchip: px30: add the serial flash controller
rockchip: px30: add support for SFC for Odroid Go Advance
Jon Lin (1):
rockchip: px30: Support configure SFC
arch/arm/dts/px30.dtsi | 38 ++
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
-off-by: Jon Lin
---
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
Changes in v7:
- Make sfc-use-dma configurable
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished
p: px30: add the serial flash controller
rockchip: px30: add support for SFC for Odroid Go Advance
Jon Lin (1):
rockchip: px30: Support configure SFC
arch/arm/dts/px30.dtsi | 38 ++
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts |
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
Changes in v8:
- Change to use tx single line to make a good compatible
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts | 16
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
Reviewed-by: Jagan Teki
---
(no changes since v7)
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/clk
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
Reviewed-by: Jagan Teki
Reviewed-by: Kever Yang
Reviewed-by: Philipp Tomsich
---
(no changes since v7)
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file
Chris Morgan wrote:
On Thu, Aug 12, 2021 at 09:15:14PM +0800, Jon Lin wrote:
From: Chris Morgan
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.
This is adapted from
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +
arch/arm/dts/rk3326-odroid-go2.dts | 16
2 files changed, 33 insertions(+)
diff --git
-off-by: Jon Lin
---
Changes in v7:
- Make sfc-use-dma configurable
Changes in v6:
- Fix dma transfer logic
- Fix the error of the way to wait for dma transfer finished status
Changes in v5:
- Support dma transfer
- Add CONFIG_IS_ENABLED(CLK) limitation
- Support spinand devices
- Support SFC
ger has to extract the parameters
Chris Morgan (5):
spi: rockchip_sfc: add support for Rockchip SFC
rockchip: px30: Add support for using SFC
rockchip: px30: add the serial flash controller
mtd: spi-nor-ids: Add XTX XT25F128B
rockchip: px30: add support for SFC for Odroid Go Advance
Jon Lin
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 +++
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
---
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
From: Chris Morgan
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Consulting to "NVM Express® Base Specification, revision 2.0".
If more PRP List pages are required, then the last entry of
the PRP List contains the Page Base Address of the next PRP
List page. The next PRP List page shall be memory page aligned.
Signed-off-by: Jon Lin
Reviewed-by:
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming.
Signed-off-by: Jon Lin
Reviewed-by: Stefan Agner
---
Changes in v3:
Only
On 2021/9/27 20:28, Stefan Agner wrote:
On 2021-09-26 11:12, Jon Lin wrote:
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming.
Signed-off-by: Jon Lin
Reviewed-by: Stefan Agner
---
(no changes since v1
Consulting to "NVM Express® Base Specification, revision 2.0".
If more PRP List pages are required, then the last entry of
the PRP List contains the Page Base Address of the next PRP
List page. The next PRP List page shall be memory page aligned.
Signed-off-by: Jon Lin
---
(no change
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming.
Signed-off-by: Jon Lin
---
drivers/nvme/nvme.c | 3 +++
1 file changed, 3
On 2021/11/19 9:14, Tom Rini wrote:
On Fri, Nov 19, 2021 at 08:56:08AM +0800, Bin Meng wrote:
Hi Tom,
On Fri, Nov 19, 2021 at 3:14 AM Tom Rini wrote:
On Tue, Oct 19, 2021 at 10:40:53AM +0800, Jon Lin wrote:
Most NVME devcies maintain data in internal cache for an uncertain
times, and u
在 2022/3/14 16:53, Kever Yang 写道:
+ Jon Lin,
Hi Jon,
Please help to review this patch.
Thanks,
- Kever
On 2022/2/22 09:31, Peter Geis wrote:
The rockchip-sfc driver sanity checks the maximum frequency, but not the
minimum frequency.
This causes the probe to fail when a frequency
58 matches
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