not clear this bit by default, as there are SOC's
with no valid memory region at 0x0.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
arch/arm/cpu/arm926ejs/start.S | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git
, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Cc: Heiko Schocher h...@denx.de
Cc: Christian Riesch christian.rie...@omicron.at
Cc: Sudhakar Rajashekhara sudhakar@ti.com
On Mon Jan 09, 2012 at 01:41:58PM -0500, Mike Frysinger wrote:
On Monday 09 January 2012 13:25:50 Sughosh Ganu wrote:
arch/arm/cpu/arm926ejs/start.S | 10 +++---
your patch summary should include a relevant prefix. something like arm:
or
arm926: . that way non-arm people can
On Mon Jan 09, 2012 at 04:30:56PM -0700, Tom Rini wrote:
On 01/09/2012 11:28 AM, Sughosh Ganu wrote:
snip
--- a/arch/arm/cpu/arm926ejs/davinci/Makefile
+++ b/arch/arm/cpu/arm926ejs/davinci/Makefile
@@ -38,8 +38,11 @@ COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o
et1011c.o
hi Christian,
On Tue Jan 10, 2012 at 09:15:14AM +0100, Christian Riesch wrote:
Hi Sughosh and Tom,
On Tuesday, January 10, 2012, Sughosh Ganu urwithsugh...@gmail.com wrote:
On Mon Jan 09, 2012 at 04:30:56PM -0700, Tom Rini wrote:
On 01/09/2012 11:28 AM, Sughosh Ganu wrote:
snip
hi Heiko,
On Tue Jan 10, 2012 at 10:42:08AM +0100, Heiko Schocher wrote:
Hello Sughosh, Christian, Tom,
Sughosh Ganu wrote:
I see a CONFIG_MACH_DAVINCI_* like define in da850evm.h and
hawkboard.h. Should i add a similar define for cam_enc_4xx, and use
these instead.
Actually
not clear this bit by default, as there are SOC's
with no valid memory region at 0x0.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes since V1
* Added arm926 keyword to the subject line
* Removed the superfluous setting of r0.
* Fixed
to reflect the same.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Cc: Heiko Schocher h...@denx.de
Cc: Christian Riesch christian.rie...@omicron.at
Cc: Sudhakar Rajashekhara sudhakar@ti.com
Cc: Tom Rini tr...@ti.com
---
Changes since V1
* Use a common file instead of board specific files
On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote:
The current implementation invalidates the cache instead of flushing
it. This causes problems on platforms where the spl/u-boot is already
loaded to the RAM, with caches enabled by a first stage bootloader.
What platforms are
hi Heiko,
On Wed Jan 11, 2012 at 07:52:02AM +0100, Heiko Schocher wrote:
Hello Sughosh,
Sughosh Ganu wrote:
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled
On Wed Jan 11, 2012 at 11:47:27AM +0100, Marek Vasut wrote:
On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote:
The current implementation invalidates the cache instead of flushing
it. This causes problems on platforms where the spl/u-boot is already
loaded to the RAM, with
On Wed Jan 11, 2012 at 01:42:38PM +0100, Marek Vasut wrote:
On Wed Jan 11, 2012 at 11:47:27AM +0100, Marek Vasut wrote:
On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote:
The current implementation invalidates the cache instead of
flushing it. This causes problems on
to reflect the same.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Christian Riesch christian.rie...@omicron.at
Cc: Sudhakar Rajashekhara sudhakar@ti.com
Cc: Tom Rini tr...@ti.com
---
Changes since V2
* Made changes
On Wed Jan 11, 2012 at 02:52:44PM +0100, Marek Vasut wrote:
Changing the ecc layout for a single board, hmm not sure. Using a
spl instead does me no harm whatsoever -- I don't need to update the
spl frequently in any case, and then can use the nand driver as is.
And how do you
On Wed Jan 11, 2012 at 04:01:31PM +0100, Marek Vasut wrote:
More so, given the fact that we don't have any control over
rbl -- so if rbl changes it's layout for any subsequent board, we'd
have to add that as well to the nand driver, and both in u-boot as
well as the kernel.
to reflect the same.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Christian Riesch christian.rie...@omicron.at
Cc: Sudhakar Rajashekhara sudhakar@ti.com
Cc: Tom Rini tr...@ti.com
---
Changes since V3
* Removed
On Thu Jan 12, 2012 at 06:56:01AM +0100, Christian Riesch wrote:
On Wednesday, January 11, 2012, Marek Vasut marek.va...@gmail.com wrote:
snip
RBL executes an AIS script. Sughosh, could you please explain what your
AIS
does or how you create it?
So basically, this SPL business can be
On Wed Jan 11, 2012 at 07:50:50PM +0100, Marek Vasut wrote:
On Wed Jan 11, 2012 at 04:01:31PM +0100, Marek Vasut wrote:
More so, given the fact that we don't have any control over
rbl -- so if rbl changes it's layout for any subsequent board, we'd
have to add that as well to
hi Heiko,
On Thu Jan 12, 2012 at 08:24:03AM +0100, Heiko Schocher wrote:
Hello Sughosh,
Sughosh Ganu wrote:
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled
hi Christian,
On Thu Jan 12, 2012 at 10:02:47AM +0100, Christian Riesch wrote:
Hi Sughosh,
On Wed, Jan 11, 2012 at 6:03 PM, Sughosh Ganu urwithsugh...@gmail.com wrote:
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed
hi Christian,
On Thu Jan 12, 2012 at 01:03:05PM +0100, Christian Riesch wrote:
Hi Sughosh,
On Tue, Jan 10, 2012 at 7:12 PM, Sughosh Ganu urwithsugh...@gmail.com wrote:
The current implementation invalidates the cache instead of flushing
it. This causes problems on platforms where the spl
hi Christian,
On Thu Jan 12, 2012 at 03:04:37PM +0100, Christian Riesch wrote:
On Thu, Jan 12, 2012 at 2:53 PM, Sughosh Ganu urwithsugh...@gmail.com wrote:
On Thu Jan 12, 2012 at 01:03:05PM +0100, Christian Riesch wrote:
snip
Since all my tests were successful I wonder what issues did
.
On Tue, Jan 10, 2012 at 7:12 PM, Sughosh Ganu urwithsugh...@gmail.com wrote:
The current implementation invalidates the cache instead of flushing
it. This causes problems on platforms where the spl/u-boot is already
loaded to the RAM, with caches enabled by a first stage bootloader
hi Heiko,
On Fri Jan 13, 2012 at 04:06:22PM +0100, Heiko Schocher wrote:
snip
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x2300 /*
On Fri Jan 13, 2012 at 07:41:37AM -0700, Tom Rini wrote:
On Fri, Jan 13, 2012 at 1:26 AM, Sughosh Ganu urwithsugh...@gmail.com wrote:
snip
bic r0, r0, #0x0087 /* clear bits 7, 2:0 (B--- -CAM)
*/
orr r0, r0, #0x0002 /* set bit 2 (A) Align
hi Heiko,
On Fri Jan 13, 2012 at 04:29:29PM +0100, Heiko Schocher wrote:
Hello Sugosh,
Sughosh Ganu wrote:
hi Christian,
On Fri Jan 13, 2012 at 09:06:26AM +0100, Christian Riesch wrote:
Hi Sughosh,
I had a look at the patch and I tried to understand what's going on
here (I must
On Fri Jan 13, 2012 at 11:49:57PM +0530, Aneesh V wrote:
On Friday 13 January 2012 11:08 PM, Sughosh Ganu wrote:
snip
Are you sure, the RBL enables the D-Cache on your board? Nevertheless,
I think, we must disable the D-Cache here with cleaning it (as your
patch did) instead only
not clear this bit by default, as there are SOC's
with no valid memory region at 0x0.
Also fix the comments to match code.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
Changes since V2
* Added code to invalidate I cache, based on review comment by Aneesh.
* Fixed comments to match
hi Albert,
On Sat Jan 14, 2012 at 10:02:16AM +0100, Albert ARIBAUD wrote:
snip
/*
- * disable MMU stuff and caches
+ * disable MMU and D cache, and enable I cache.
*/
mrc p15, 0, r0, c1, c0, 0
-bic r0, r0, #0x2300 /* clear bits 13, 9:8 (--V-
The current implementation invalidates the cache instead of flushing
it. This causes problems on platforms where the spl/u-boot is already
loaded to the RAM, with caches enabled by a first stage bootloader.
Also fix the comments to match code.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
hi Christian,
On Sat Jan 14, 2012 at 06:20:06PM +0100, Christian Riesch wrote:
Hi Sughosh,
snip
On Thursday, January 12, 2012, Sughosh Ganu urwithsugh...@gmail.com wrote:
1) The first test was done with the SPL and yes, here the RBL loads
the SPL into SRAM, initializes DDR memory
On Mon Jan 16, 2012 at 10:57:05AM -0700, Tom Rini wrote:
On Fri, Jan 13, 2012 at 10:38 AM, Sughosh Ganu urwithsugh...@gmail.com
wrote:
hi Heiko,
On Fri Jan 13, 2012 at 04:29:29PM +0100, Heiko Schocher wrote:
Hello Sugosh,
Sughosh Ganu wrote:
hi Christian,
On Fri Jan 13
On Tue Jan 17, 2012 at 08:27:58AM -0700, Tom Rini wrote:
On Mon, Jan 16, 2012 at 11:46 PM, Sughosh Ganu urwithsugh...@gmail.com
wrote:
Hmm.. how did u-boot work on such boards? How can u-boot work with
D-Cache
enabled, if u-boot is not initializing it? (And I think, on davinci SoC
hi Christian,
On Sun Jan 29, 2012 at 02:36:39PM +0100, Christian Riesch wrote:
Hi all,
On Fri, Jan 27, 2012 at 7:33 PM, Tom Rini tom.r...@gmail.com wrote:
So, what do we want to do here? We really want to get this fix in so
we can get the hawkboard SPL changes in, and the other platforms
hi Christian,
On Mon Jan 30, 2012 at 09:10:46AM +0100, Christian Riesch wrote:
snip
Perhaps we should revert that change and instead remove
CONFIG_SKIP_LOWLEVEL_INIT from the da850 board config files. But since
we don't need the lowlevel_init function for DA850 SoCs we must either
add a
On Mon Jan 30, 2012 at 10:03:40AM -0700, Tom Rini wrote:
Q1) Currently, the low level initialization code for ARM926EJS CPUs in
the u-boot bootloader clears the V-bit of the cp15 control register
c1. By default, this bit is set on AM1808 and OMAP-L138 before u-boot
ist started. Sughosh Ganu
hi Christian,
On Tue, Jan 31, 2012 at 7:26 PM, Christian Riesch
christian.rie...@omicron.at wrote:
The V bit of the c1 register of CP15 should not be cleared
since the SoC has no valid memory at 0x.
Signed-off-by: Christian Riesch christian.rie...@omicron.at
Reported-by: Sughosh
arm, arm926ejs: Enable icache only if CONFIG_SYS_ICACHE_OFF is not
defined
arm, davinci: Add support for the Calimain board from OMICRON
electronics
Sughosh Ganu (2):
arm, arm926ejs: Flush the data cache before disabling it
Changes to move hawkboard to the new spl infrastructure
hi Manjunath,
On Thu Feb 02, 2012 at 07:23:20PM +0530, Manjunath Hadli wrote:
Move the clock related function from cpu.c to new file
speed.c. Eliminate volatile keyword usage which made no
justification and also to keep checkpatch.pl happy. Replace
REG instructions by readl.
Signed-off-by:
hi Albert,
On Sun, Feb 12, 2012 at 3:48 PM, Albert ARIBAUD
albert.u.b...@aribaud.netwrote:
Hi all,
I just did a ./MAKEALL arm with ELDK42 on the u-boot-arm/master for which
I just sent a pull request.
The raw result is:
- SUMMARY
Boards
On Sun, Feb 12, 2012 at 8:09 PM, Tom Rini tom.r...@gmail.com wrote:
On Sun, Feb 12, 2012 at 7:35 AM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
snip
Fail with various causes; I'll send out individual status mails (CC:
interested parties) later today.
I pulled in a new
On Fri Aug 10, 2012 at 02:15:20AM +0530, Sughosh Ganu wrote:
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh
easier to test I've placed it on
http://github.com/trini/u-boot WIP/spl-improvements
Tested the patch series on hawkboard with new spl image. Spl boots up
the u-boot image fine. Nice work :)
Tested-by: Sughosh Ganu urwithsugh...@gmail.com
-sughosh
___
U
On Fri Aug 24, 2012 at 04:58:30PM -0700, Tom Rini wrote:
From: Stefano Babic sba...@denx.de
If an u-boot image is not found, SPL thinks to load a bare
u-boot.bin image with a maximum size of 200KB.
Use CONFIG_SYS_MONITOR_LEN instead.
Signed-off-by: Stefan Roese stefan.ro...@gmail.com
The common spl framework expects the u-boot payload size through
CONFIG_SYS_MONITOR_LEN. Define the macro with the u-boot's size. With
this change, CONFIG_SYS_NAND_U_BOOT_SIZE is no longer required. Delete
the same.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
To be applied on top
On Fri Aug 24, 2012 at 04:58:25PM -0700, Tom Rini wrote:
- Remove includes we don't need
- Switch some printf statements to puts
- Convert some printf statements to debug, introduce new puts statements
- In most cases saying just No mkimage signature, assuming
u-boot.bin or similar is
hi,
The tlb entries for the pcie mem space for the corenet SoC's is done
for 1.5GiB but certain boards use all the 4 pcie controller
instantiations, and each controller is assigned 512MiB size in the
config files. Should the tlb entries not map 2GiB space as against
1.5GiB. Am i missing something.
hi Albert,
On Mon Jul 08, 2013 at 12:22:57PM +0200, Albert ARIBAUD wrote:
snip
It you flush first then disable, you leave a time window between the
two where a write to the cache can happen (either because your code
does one, or because the compiler optimized one in). If it happens,
then you
hi Albert,
On Mon Jul 08, 2013 at 12:22:57PM +0200, Albert ARIBAUD wrote:
snip
It you flush first then disable, you leave a time window between the
two where a write to the cache can happen (either because your code
does one, or because the compiler optimized one in). If it happens,
then you
hi Albert,
On Mon Jul 08, 2013 at 02:32:16PM +0200, Albert ARIBAUD wrote:
Hi Sughosh,
On Mon, 8 Jul 2013 17:38:46 +0530, Sughosh Ganu
urwithsugh...@gmail.com wrote:
hi Albert,
On Mon Jul 08, 2013 at 12:22:57PM +0200, Albert ARIBAUD wrote:
snip
It you flush first then disable
hi Scott,
On Tue, Jul 9, 2013 at 12:37 AM, Scott Wood scottw...@freescale.com wrote:
On 07/04/2013 01:13:29 PM, Sughosh Ganu wrote:
hi,
The tlb entries for the pcie mem space for the corenet SoC's is done
for 1.5GiB but certain boards use all the 4 pcie controller
instantiations, and each
hi Albert,
On Mon Jul 08, 2013 at 09:55:51PM +0200, Albert ARIBAUD wrote:
snip
Invalidating the cache in addition to flushing it would not prevent
further writes from dirtying the cache lines if they happen before
the cache is disabled.
I have a doubt on this. The arm926ejs uses a
hi Albert,
On Mon Jul 08, 2013 at 09:55:51PM +0200, Albert ARIBAUD wrote:
snip
Invalidating the cache in addition to flushing it would not prevent
further writes from dirtying the cache lines if they happen before
the cache is disabled.
I have a doubt on this. The arm926ejs uses a
hi Albert,
On Tue Jul 09, 2013 at 10:28:13AM +0200, Albert ARIBAUD wrote:
The arm926ej-s data cache does not have a single fixed policy, and
does not have a bypass-on-write policy, only write-through and
copy-back.
Other, more complex, policies may be defined, but at the MMU, not
hi Tom,
On Tue Jul 09, 2013 at 05:19:32PM -0400, Tom Rini wrote:
snip
Yes, I am not really comfortable with this. I will see if I can write some
sandbox tests for the other image types today and post my results. I guess
this bootm code has built up over a long time and it is hard to know
hi Albert,
On Wed Jul 10, 2013 at 02:30:30PM +0200, Albert ARIBAUD wrote:
You are correct re the other policies of the DDI0198E (ARM926EJ-S
TRM) MMU -- page 3-11, bits 3-2 of the section descriptor. Note however
that you may have to refer to your specific SoC's TRM or equivalent, as
On Wed, Jul 10, 2013 at 3:21 PM, Sughosh Ganu urwithsugh...@gmail.comwrote:
hi Tom,
On Tue Jul 09, 2013 at 05:19:32PM -0400, Tom Rini wrote:
snip
Yes, I am not really comfortable with this. I will see if I can write
some
sandbox tests for the other image types today and post my
hi,
On Wed Jul 10, 2013 at 11:56:30PM -0700, Simon Glass wrote:
I have netbsd running on hawkboard, but i do not boot it using the
bootm command, but use the go command instead. I will try to build a
netbsd image with the u-boot header and give it a try with bootm. Need
a day or two
On Wed Jul 10, 2013 at 11:08:09PM -0700, Simon Glass wrote:
The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/blackfin/lib/boot.c | 2 ++
hi,
While testing on hawkboard with the latest commit, i hit an issue of
commands not being accepted.
hawkboard reset
Unknown command '�' - try 'help'
hawkboard
Running git bisect showed that this is caused due to commit 054ea170f271:
cmd_mem: cmp: unify size code paths. Has anyone seen
hi Christian,
On Tue, Jul 3, 2012 at 11:52 AM, Christian Riesch
christian.rie...@omicron.at wrote:
Hi Sughosh,
On Mon, Jul 2, 2012 at 9:24 PM, Sughosh Ganu urwithsugh...@gmail.com
wrote:
hi,
While testing on hawkboard with the latest commit, i hit an issue of
commands not being
hi Graeme,
On Wed Jul 04, 2012 at 09:28:07AM +1000, Graeme Russ wrote:
snip
On Mon, Jul 2, 2012 at 9:24 PM, Sughosh Ganu urwithsugh...@gmail.com
wrote:
hi,
While testing on hawkboard with the latest commit, i hit an issue of
commands not being accepted.
hawkboard rese
On Tue Jul 03, 2012 at 12:54:04AM +0530, Sughosh Ganu wrote:
hi,
While testing on hawkboard with the latest commit, i hit an issue of
commands not being accepted.
hawkboard reset
Unknown command '�' - try 'help'
hawkboard
Running git bisect showed that this is caused due to commit
hi Mikhail,
On Mon Jul 09, 2012 at 10:53:39PM +0400, Mikhail Kshevetskiy wrote:
This patch allow us to have a universal spl that detects a boot
device and select a corresponding boot algorithm for main u-boot part
(SOC_DA8XX only)
I have not tested this patch, will do so sometime this week. I
hi Mikhail,
On Mon Jul 09, 2012 at 10:53:40PM +0400, Mikhail Kshevetskiy wrote:
Motivation:
* we have a board with 128 Kb spi flash, so normal u-boot.ais does not
fit on it.
This patch add support of compressed 2-nd u-boot stage. To create a compressed
ais image its required:
* define
On Tue Jul 10, 2012 at 11:20:53PM +0400, Mikhail Kshevetskiy wrote:
On Wed, 11 Jul 2012 00:09:06 +0530
Sughosh Ganu urwithsugh...@gmail.com wrote:
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c
b/arch/arm/cpu/arm926ejs/davinci/spl.c index 74632e5..50b4bbc 100644
--- a/arch/arm/cpu
On Wed Jul 11, 2012 at 01:19:40AM -0700, Tom Rini wrote:
On 07/10/2012 11:38 PM, Sughosh Ganu wrote:
On Tue Jul 10, 2012 at 11:20:53PM +0400, Mikhail Kshevetskiy wrote:
On Wed, 11 Jul 2012 00:09:06 +0530
Sughosh Ganu urwithsugh...@gmail.com wrote:
diff --git a/arch/arm/cpu/arm926ejs
On Wed Jul 11, 2012 at 03:46:46AM -0700, Tom Rini wrote:
On 07/11/2012 03:40 AM, Sughosh Ganu wrote:
On Wed Jul 11, 2012 at 01:19:40AM -0700, Tom Rini wrote:
On 07/10/2012 11:38 PM, Sughosh Ganu wrote:
On Tue Jul 10, 2012 at 11:20:53PM +0400, Mikhail Kshevetskiy wrote:
On Wed, 11 Jul 2012
On Wed Jul 11, 2012 at 04:43:19AM -0700, Tom Rini wrote:
On 07/11/2012 04:05 AM, Sughosh Ganu wrote:
snip
I'm fine saying that we should wrap the call around an #if, but I
would expect it to be set in the common case and only not set in
custom production boards.
Correct, so all
boots up fine.
Acked-by: Sughosh Ganu urwithsugh...@gmail.com
Tested-by: Sughosh Ganu urwithsugh...@gmail.com
-sughosh
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/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/hardware.h|1 +
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
3 files changed, 7 insertions(+)
Tested on hawkboard. Board boots up fine.
Tested-by: Sughosh Ganu urwithsugh...@gmail.com
-sughosh
On Tue Jul 03, 2012 at 12:54:04AM +0530, Sughosh Ganu wrote:
hi,
While testing on hawkboard with the latest commit, i hit an issue of
commands not being accepted.
hawkboard reset
Unknown command '�' - try 'help'
hawkboard
Running git bisect showed that this is caused due to commit
algorithm for SPL.
Signed-off-by: Linu Cherian linucher...@gmail.com
Acked-by: Sughosh Ganu urwithsugh...@gmail.com
Tom, since this is a bug fix, can this go to the 2012.07 release.
-sughosh
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hi Wolfgang,
On Fri Jul 27, 2012 at 03:16:15PM +0530, Sughosh Ganu wrote:
On Fri Jul 27, 2012 at 01:51:53PM +0530, Linu Cherian wrote:
Hawkboard was using the wrong nand_read_page version for SPL image.
As a side effect, the u-boot image loaded by the SPL from nand
was getting corrupted
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
arch/arm/cpu/arm926ejs/davinci
hi Albert,
On Tue Nov 13, 2012 at 08:55:23PM +0100, Albert ARIBAUD wrote:
snip
I tried the 1st patch of the series, and with that u-boot does not
come up on the board. It is also printing out some random values for
the dram and nand sizes.
The patch was applied on top of
-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Tested on hawkboard. Spl and u-boot images boot up fine with these
changes.
Tested-by: Sughosh Ganu urwithsugh...@gmail.com
-sughosh
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hi Stefano,
On Sun Nov 14, 2010 at 03:55:01PM +0100, Stefano Babic wrote:
diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
new file mode 100644
index 000..c75ea63
--- /dev/null
+++ b/board/davinci/ea20/ea20.c
@@ -0,0 +1,237 @@
+/*
+ * Copyright (C) 2010 Texas
hi Ben,
On Wed Nov 17, 2010 at 11:26:47AM -0500, Ben Gardiner wrote:
Hi Stefano,
On Wed, Nov 17, 2010 at 5:09 AM, Stefano Babic sba...@denx.de wrote:
[...]
diff --git a/arch/arm/include/asm/arch-davinci/da8xx_common.h
b/arch/arm/include/asm/arch-davinci/da8xx_common.h
deleted file
] da850: Add RMII support for EMAC -- Sudhakar
Rajashekhara sudhakar@ti.com 2010-11-18 09:59:37 -0500
Add board support for hawkboard -- Sughosh Ganu
urwithsugh...@gmail.com 2010-11-01 23:30:34 +0530
Remove board_init_f function from nand_boot.c -- Sughosh Ganu
urwithsugh...@gmail.com 2010-11
-- Sudhakar
Rajashekhara sudhakar@ti.com 2010-11-18 09:59:37 -0500
Add board support for hawkboard -- Sughosh Ganu
urwithsugh...@gmail.com 2010-11-01 23:30:34 +0530
Remove board_init_f function from nand_boot.c -- Sughosh Ganu
urwithsugh...@gmail.com 2010-11-01 23:29:27 +0530
Move and rename
hi,
On Tue Nov 23, 2010 at 01:31:46PM -0500, Ben Gardiner wrote:
On Tue, Nov 23, 2010 at 1:25 PM, Paulraj, Sandeep s-paul...@ti.com wrote:
I have been tracking this e-mail chain for some time now and I have lost
track of which patches to apply in which order.
Can someone please give me
hi Ben,
On Fri Nov 19, 2010 at 10:16:09AM -0500, Ben Gardiner wrote:
We are happy to see the omap-L138 support in u-boot moving forward. We
would like to get either SD or USB (or both) omapL138 support upstream
next. Does the ea20 have USB or SD? Will the hawkboard u-boot support
include USB
Move the davinci common headers to the architecture specific
include file path.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
Changes since V5
* Based off Ben Gardiner's tree, no changes in the patch
.../arm/include/asm/arch-davinci/da8xx_common.h|0
.../arm/include/asm/arch
-off-by: Sughosh Ganu urwithsugh...@gmail.com
Acked-by: Scott Wood scottw...@freescale.com
---
Changes since V5
* Based off Ben Gardiner's tree, no changes in the patch.
board/samsung/smdk6400/smdk6400_nand_spl.c | 37
nand_spl/board/samsung/smdk6400/Makefile |6
it to the nand flash at address 0x2. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc108). Create the AIS
Signed bin, as use the normal UART boot procedure to boot the image.
Signed-off-by: Sughosh Ganu
it to the nand flash at address 0x2. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc108). Create the AIS
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
Signed-off-by: Ben Gardiner bengardi
This was missed out in a couple of files under nand_spl
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
nand_spl/nand_boot.c |3 ++-
nand_spl/nand_boot_fsl_nfc.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/nand_spl/nand_boot.c b/nand_spl
This was missed out in a couple of files under nand_spl
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
V2:
Fix whitespace issues.
nand_spl/nand_boot.c |3 ++-
nand_spl/nand_boot_fsl_nfc.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/nand_spl
Move and rename common header files from under board/davinci to the
standard include file path.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
This patch is needed for adding board support for the hawkboard which
uses nand_spl based boot mechanism.
board/davinci/common/misc.c
it to the nand flash at address 0x2. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc108). Create the AIS
Signed bin, as use the normal UART boot procedure to boot the image.
Signed-off-by: Sughosh Ganu
hi Wolfgang,
On Thu Oct 21, 2010 at 10:30:09PM +0200, Wolfgang Denk wrote:
Dear Sughosh Ganu,
In message 1287690158-6055-1-git-send-email-urwithsugh...@gmail.com you
wrote:
Move and rename common header files from under board/davinci to the
standard include file path.
Signed-off
hi Wolfgang,
On Thu Oct 21, 2010 at 10:44:35PM +0200, Wolfgang Denk wrote:
Dear Sughosh Ganu,
In message 1287690234-6109-1-git-send-email-urwithsugh...@gmail.com you
wrote:
snip
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
Makefile
hi Wolfgang,
On Fri Oct 22, 2010 at 09:56:01AM +0200, Wolfgang Denk wrote:
Dear Sughosh Ganu,
In message 20101022072634.ga8...@hardy you wrote:
This patch is needed for adding board support for the hawkboard which
uses nand_spl based boot mechanism.
Why would that be the case
hi Wolfgang,
On Fri Oct 22, 2010 at 10:26:08AM +0200, Wolfgang Denk wrote:
Dear Sughosh Ganu,
In message 20101022080434.gc8...@hardy you wrote:
Which points out where the actual problem comes from: relative path
based file inclusion is a Bad Thing and should be avoided.
So
hi Wolfgang,
On Fri Oct 22, 2010 at 10:05:43AM +0200, Wolfgang Denk wrote:
Dear Sughosh Ganu,
In message 20101022075016.gb8...@hardy you wrote:
Is there not a better way than adding such a huge #ifdef block?
Not sure about this one. I need the pinmux configuration functions
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
now unnecessary config.mk file.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
board/davinci/da8xxevm/config.mk | 43 --
include/configs/da830evm.h |1 +
include/configs
hi Himanshu,
On Mon, Oct 25, 2010 at 6:46 PM, Himanshu Chauhan
hschau...@nulltrace.orgwrote:
I am compiling u-boot for ARM versatile-PB board. But the compilation
fails with this error:
board.c: In function ‘__dram_init_banksize’:
board.c:459: error: ‘CONFIG_SYS_SDRAM_BASE’ undeclared
hi Wolfgang,
On Fri, Oct 22, 2010 at 2:22 PM, Sughosh Ganu urwithsugh...@gmail.comwrote:
hi Wolfgang,
On Fri Oct 22, 2010 at 10:05:43AM +0200, Wolfgang Denk wrote:
#if defined(CONFIG_ARM) !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-void board_init_f (ulong bootflag)
+void
Move the davinci common headers to the architecture specific
include file path.
Signed-off-by: Sughosh Ganu urwithsugh...@gmail.com
---
V2:
Based on comments from Wolfgang, move the headers under
asm/arch-davinci/.
.../arm/include/asm/arch-davinci/da8xx_common.h|0
.../arm/include
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