[U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode

2014-02-19 Thread Ye . Li
When configure the USDHC driver to PIO mode by defining CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail. Two bugs in the driver to cause the issue: 1. The read buffer was invalidated after reading from DATAPORT register, which should be only applied to DMA mode. The valid data

Re: [U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode

2014-02-20 Thread Ye Li
Thanks, I will change the commit log accordingly. Best regards, Ye Li -Original Message- From: Stefano Babic [mailto:sba...@denx.de] Sent: Wednesday, February 19, 2014 9:41 PM To: Li Ye-B37916; sba...@denx.de; Estevam Fabio-R49496 Cc: u-boot@lists.denx.de; Albert ARIBAUD Subject: Re

[U-Boot] [PATCH v2] esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver

2014-02-20 Thread Ye . Li
From: Ye.Li b37...@freescale.com When configure the fsl_esdhc driver to PIO mode by defining CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail. Two bugs in the driver to cause the issue: 1. The read buffer was invalidated after reading from DATAPORT register, which should be only

[U-Boot] [PATCH v4 1/2] imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 board

2014-09-29 Thread Ye . Li
/freescale/mx6qarm2/MAINTAINERS index 42c19d1..c8d594b 100644 --- a/board/freescale/mx6qarm2/MAINTAINERS +++ b/board/freescale/mx6qarm2/MAINTAINERS @@ -1,6 +1,8 @@ MX6QARM2 BOARD M: Jason Liu r64...@freescale.com +M: Ye Li b37...@freescale.com S: Maintained F: board/freescale/mx6qarm2

[U-Boot] [PATCH v4 2/2] imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards

2014-09-29 Thread Ye . Li
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v3: - Add maintainer and status

[U-Boot] [PATCH] imx: mx6 sabreauto: Add board support for USB EHCI

2014-10-10 Thread Ye . Li
On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the BSP support. Since the power control uses the GPIO

[U-Boot] [PATCH 1/2] imx: mx6sl: Add IOMUX setting for USDHC1-3

2014-10-13 Thread Ye . Li
Set the USDHC1-3 IOMUX settings which are used for mx6slevk board. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h

[U-Boot] [PATCH 2/2] imx: mx6slevk: Add support for USDHC1 and USDHC3 slots

2014-10-13 Thread Ye . Li
There are three SD/MMC sockets on mx6slevk boards. Implements the full support for them. The default boot socket is USDHC2, so the MMC environment is set to that device. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6slevk/mx6slevk.c | 101 --

[U-Boot] [PATCH 2/2] imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3

2014-10-13 Thread Ye . Li
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment is set to this device. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 96 +--

[U-Boot] [PATCH 1/2] mmc: fsl_esdhc: Update esdhc driver for iMX6SX

2014-10-13 Thread Ye . Li
The reset value of uSDHCx_INT_STATUS_EN register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li b37...@freescale.com --- drivers/mmc/fsl_esdhc.c | 13 + 1 files changed, 13 insertions(+),

[U-Boot] [PATCH v2] imx: mx6 sabreauto: Add board support for USB EHCI

2014-10-13 Thread Ye . Li
On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the board support codes. Since the power control uses

[U-Boot] [PATCH v2 1/2] mmc: fsl_esdhc: Update esdhc driver for iMX6SX

2014-10-14 Thread Ye . Li
The reset value of uSDHCx_INT_STATUS_EN register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Remove codes which set INT_STATUS_EN register according PIO or

[U-Boot] [PATCH v2 2/2] imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3

2014-10-14 Thread Ye . Li
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment is set to this device. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Modify the function return value board/freescale/mx6sxsabresd/mx6sxsabresd.c |

[U-Boot] [PATCH v2 2/2] imx: mx6slevk: Add support for USDHC1 and USDHC3 slots

2014-10-14 Thread Ye . Li
There are three SD/MMC sockets on mx6slevk boards. Implements the full support for them. The default boot socket is USDHC2, so the MMC environment is set to that device. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Correct the return value of board_mmc_init function

[U-Boot] [PATCH v2 1/2] imx: mx6sl: Add IOMUX setting for USDHC1-3

2014-10-14 Thread Ye . Li
Set the USDHC1-3 IOMUX settings which are used for mx6slevk board. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH] imximage: Fix the bootdata.size calculation

2014-10-22 Thread Ye . Li
The bootdata.size should contain the IVT offset part, but the calculation in imximage tool does not have. This will cause some data at the end of image not be loaded into memory. Signed-off-by: Ye.Li b37...@freescale.com --- tools/imximage.c |2 +- 1 files changed, 1 insertions(+), 1

[U-Boot] [PATCH 2/5] imx: mx6sl: Add perclk_clk_sel bit define in CCM

2014-10-26 Thread Ye . Li
The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h

[U-Boot] [PATCH 4/5] imx: mx6sl: Set the preclk clock source to OSC 24Mhz

2014-10-26 Thread Ye . Li
For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/cpu/armv7/mx6/soc.c | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c

[U-Boot] [PATCH 5/5] imx: mx6: Enable 24Mhz OSC for GPT clock source

2014-10-26 Thread Ye . Li
Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that enable the 24Mhz OSC GPT on all MX6 platforms. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6_common.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6_common.h

[U-Boot] [PATCH 3/5] imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz source

2014-10-26 Thread Ye . Li
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/cpu/armv7/mx6/clock.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c

[U-Boot] [PATCH 1/5] imx: gpt: Add 24Mhz OSC clock source support for GPT

2014-10-26 Thread Ye . Li
Introduce a new configuration CONFIG_MXC_GPT_HCLK. When it is set, the GPT will use 24Mhz OSC as clock source. Otherwise, the GPT will use 32Khz OSC as clock source. Since only the GPT on iMX6 series provide the clock source option for 24Mhz OSC. For other series(MX5), if the configuration is

[U-Boot] [PATCH 4/5] imx: mx6sl: Set the preclk clock source to OSC 24Mhz

2014-10-26 Thread Ye . Li
For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/cpu/armv7/mx6/soc.c | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c

[U-Boot] [PATCH 5/5] imx: mx6: Enable 24Mhz OSC for GPT clock source

2014-10-26 Thread Ye . Li
Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that enable the 24Mhz OSC GPT on all MX6 platforms. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6_common.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6_common.h

[U-Boot] [PATCH 3/5] imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz source

2014-10-26 Thread Ye . Li
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/cpu/armv7/mx6/clock.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c

[U-Boot] [PATCH 2/5] imx: mx6sl: Add perclk_clk_sel bit define in CCM

2014-10-26 Thread Ye . Li
The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h

[U-Boot] [PATCH 1/5] imx: gpt: Add 24Mhz OSC clock source support for GPT

2014-10-26 Thread Ye . Li
Introduce a new configuration CONFIG_MXC_GPT_HCLK. When it is set, the GPT will use 24Mhz OSC as clock source. Otherwise, the GPT will use 32Khz OSC as clock source. Since only the GPT on iMX6 series provide the clock source option for 24Mhz OSC. For other series(MX5), if the configuration is

[U-Boot] [PATCH v2 1/5] imx: gpt: Add High frequency clock source support for GPT

2014-10-28 Thread Ye . Li
Introduce a new configuration CONFIG_MXC_GPT_HCLK. When it is set, the GPT will select a high frequency clock as clock source. Otherwise, the GPT will stay to use 32Khz OSC as clock source. In the implementation, since only the GPT on i.MX6 series provide the clock source option for 24Mhz OSC.

[U-Boot] [PATCH v2 4/5] imx: mx6sl: Set the preclk clock source to OSC 24Mhz

2014-10-28 Thread Ye . Li
For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None arch/arm/cpu/armv7/mx6/soc.c | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH v2 5/5] imx: mx6: Enable high frequency clock source for GPT

2014-10-28 Thread Ye . Li
Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that 24Mhz OSC clock source will be selected for GPT on all MX6 platforms. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Modify the patch message subject and content to use high frequency clock.

[U-Boot] [PATCH v2 3/5] imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz source

2014-10-28 Thread Ye . Li
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None arch/arm/cpu/armv7/mx6/clock.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH v2 2/5] imx: mx6sl: Add perclk_clk_sel bit define in CCM

2014-10-28 Thread Ye . Li
The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None arch/arm/include/asm/arch-mx6/crm_regs.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH] imximage: Fix imximage IVT bug for EIM-NOR boot

2014-08-20 Thread Ye . Li
From: Ye.Li ye...@freescale.com The load region size of EIM-NOR are defined to 0. For this case, the parameter imximage_init_loadsize must be calculated. The imximage tool implements the calculation in the imximage_generate function, but the following function imximage_set_header resets the value

[U-Boot] [PATCH] iMX6: Disable the L2 before chaning the PL310 latency

2014-08-20 Thread Ye . Li
From: Ye.Li ye...@freescale.com The Latency parameters of PL310 Tag RAM latency control register and Data RAM Latency control register are set in L2 cache enable. And setting these registers must have PL310 NOT enabled. But when using Plugin mode boot, the PL310 is enabled by bootrom. The patch

Re: [U-Boot] [PATCH v2 2/2] net: fec_mxc: Do not error out when FEC_TBD_READY

2014-08-20 Thread Ye Li
after the TDAR polling. Best regards, Ye Li -Original Message- From: Marek Vasut [mailto:ma...@denx.de] Sent: Thursday, August 21, 2014 11:53 AM To: Fabio Estevam Cc: joe.hershber...@gmail.com; sba...@denx.de; u-boot@lists.denx.de; Li Ye-B37916; ota...@ossystems.com.br; Estevam Fabio-R49496

[U-Boot] [PATCH 3/5] iMX6DL:SABRESD: Add new DDR script

2014-09-02 Thread Ye . Li
Add specified mx6dl_4x_mt41j128.cfg DDR script for iMX6DLSABRESD board. Not share from nitrogen6x. The default boot device also changes to SD card. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg | 130 ++

[U-Boot] [PATCH 4/5] iMX6Solo:SABRESD: Add the i.MX6Solo SABRESD board support

2014-09-02 Thread Ye . Li
The i.MX6solo SABRE-SD board configuration has the following difference with i.MX6dl sabre-sd: - DDR bus width: 32bit - DDR capacity: 512M Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg | 106

[U-Boot] [PATCH 5/5] iMX6Solo:SABREAUTO: Add the i.MX6Solo SABREAUTO board support

2014-09-02 Thread Ye . Li
This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/mx6solo.cfg | 106

[U-Boot] [PATCH 2/5] iMX6Q:SABREAUTO: Rename the imximage.cfg to mx6q.cfg

2014-09-02 Thread Ye . Li
Rename the imximage.cfg to mx6q.cfg. No function change at all Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/imximage.cfg | 129 board/freescale/mx6qsabreauto/mx6q.cfg | 129

[U-Boot] [PATCH 1/5] iMX6Q/DL:SABREAUTO/SABRESD: Move DDR and FDT configs to defconfig

2014-09-02 Thread Ye . Li
To support more iMX6 variants, 1. Make the DDR size configurable based on the defconfig file 2. Make the FDT file configurable based on the defconfig file Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/mx6qsabreauto.c |2 +-

[U-Boot] [PATCH 1/4] iMX6Q:arm2: Add the kernel FDT Loading support

2014-09-03 Thread Ye . Li
To support loading FDT file for kernel, add the fdt address, file and loading script to arm2 board default environment. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6qarm2.h | 41 ++--- 1 files changed, 38 insertions(+), 3 deletions(-)

[U-Boot] [PATCH 4/4] iMX6Q/DL:arm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards

2014-09-03 Thread Ye . Li
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qarm2/imximage.cfg | 189

[U-Boot] [PATCH 3/4] iMX6DL:arm2: Add support for i.MX6DL arm2 DDR3 board

2014-09-03 Thread Ye . Li
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT

[U-Boot] [PATCH 2/4] iMX6Q:arm2: Change the mmcroot and mmcpart env value

2014-09-03 Thread Ye . Li
1. Set the image load partition to the first FAT partition. 2. Set the kernel rootfs partition to the second partition. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6qarm2.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/mx6qarm2.h

[U-Boot] [PATCH 2/2] iMX6SLEVK: Change to use generic board

2014-09-03 Thread Ye . Li
Enable CONFIG_SYS_GENERIC_BOARD for imx6slevk to use generic board. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6slevk.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 3d05a64..194d7bd

[U-Boot] [PATCH 1/2] iMX6Q/DL:ARM2: Change to use generic board

2014-09-03 Thread Ye . Li
Enable the CONFIG_SYS_GENERIC_BOARD for imx6q/dl arm2 board to use generic board. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6qarm2.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index

[U-Boot] [PATCH v2 3/5] iMX6DL:arm2: Add support for i.MX6DL arm2 DDR3 board

2014-09-04 Thread Ye . Li
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT

[U-Boot] [PATCH v2 1/5] iMX6Q:arm2: Add the kernel FDT Loading support

2014-09-04 Thread Ye . Li
To support loading FDT file for kernel, add the fdt address, file and loading script to arm2 board default environment. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None include/configs/mx6qarm2.h | 41 ++--- 1 files changed, 38

[U-Boot] [PATCH v2 5/5] iMX6Q/DL:arm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards

2014-09-04 Thread Ye . Li
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - The (CONFIG_DDR_32BIT) is true

[U-Boot] [PATCH v2 2/5] iMX6Q:arm2: Change the mmcroot and mmcpart env value

2014-09-04 Thread Ye . Li
1. Set the image load partition to the first FAT partition. 2. Set the kernel rootfs partition to the second partition. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None include/configs/mx6qarm2.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git

[U-Boot] [PATCH v2 4/5] iMX6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD reset

2014-09-04 Thread Ye . Li
Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source, do not reset this PFD to avoid system hang. Customers may set this in DDR script or use BT_FREQ to select low freq boot. Signed-off-by: Ye.Li b37...@freescale.com

[U-Boot] [PATCH v3 3/5] imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 board

2014-09-08 Thread Ye . Li
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT

[U-Boot] [PATCH v3 5/5] imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards

2014-09-08 Thread Ye . Li
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - Rework the short log subject

[U-Boot] [PATCH v3 1/5] imx: mx6qarm2: Add the kernel FDT Loading support

2014-09-08 Thread Ye . Li
To support loading FDT file for kernel, add the fdt address, file and loading script to arm2 board default environment. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - Rework the short log subject. Changes since v1: - None include/configs/mx6qarm2.h | 41

[U-Boot] [PATCH v3 2/5] imx: mx6qarm2: Change the mmcroot and mmcpart env value

2014-09-08 Thread Ye . Li
1. Set the image load partition to the first FAT partition. 2. Set the kernel rootfs partition to the second partition. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - Rework the short log subject Changes since v1: - None include/configs/mx6qarm2.h |4 ++-- 1 files

[U-Boot] [PATCH v3 4/5] imx: mx6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD reset

2014-09-08 Thread Ye . Li
Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source, do not reset this PFD to avoid system hang. Customers may set this in DDR script or use BT_FREQ to select low freq boot. Signed-off-by: Ye.Li b37...@freescale.com

[U-Boot] [PATCH v2 4/4] imx: mx6solosabreauto: Add the i.MX6Solo SABREAUTO board support

2014-09-09 Thread Ye . Li
This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Rework the short log subject

[U-Boot] [PATCH v2 1/4] imx: mx6sabresd/sabreauto: Move MX6Q/DL DDR and FDT configs to defconfig

2014-09-09 Thread Ye . Li
To support more iMX6 variants, 1. Make the DDR size configurable based on the defconfig file 2. Make the FDT file configurable based on the defconfig file Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Rework the short log subject board/freescale/mx6qsabreauto/mx6qsabreauto.c

[U-Boot] [PATCH v2 3/4] imx: mx6solosabresd: Add the i.MX6Solo SABRESD board support

2014-09-09 Thread Ye . Li
The i.MX6solo SABRE-SD board configuration has the following difference with i.MX6dl sabre-sd: - DDR bus width: 32bit - DDR capacity: 512M Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Remove the nosmp kernel parameter, since kernel can detect cores number by SCU. - Rework

[U-Boot] [PATCH v2 2/4] imx: mx6qsabreauto: Rename the imximage.cfg to mx6q.cfg

2014-09-09 Thread Ye . Li
Rename the imximage.cfg to mx6q.cfg. No function change at all Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Use format-patch -M to detect renames - Rework the short log subject .../mx6qsabreauto/{imximage.cfg = mx6q.cfg} |2 +- configs/mx6qsabreauto_defconfig

[U-Boot] [PATCH v2 2/2] imx: mx6slevk: Change to use generic board

2014-09-09 Thread Ye . Li
Enable CONFIG_SYS_GENERIC_BOARD for imx6slevk to use generic board. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Rework the short log subject include/configs/mx6slevk.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6slevk.h

[U-Boot] [PATCH v2 1/2] imx: mx6q/dlarm2: Change to use generic board

2014-09-09 Thread Ye . Li
Enable the CONFIG_SYS_GENERIC_BOARD for imx6q/dl arm2 board to use generic board. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Rework the short log subject include/configs/mx6qarm2.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support

2014-09-09 Thread Ye . Li
Initialize the Pfuze100 at board late init. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 52 - include/configs/mx6qsabreauto.h |6 +++ 2 files changed, 57 insertions(+), 1 deletions(-) diff --git

[U-Boot] [PATCH 1/4] imx: mx6slevk: Add I2C1 support

2014-09-10 Thread Ye . Li
Add I2C1 pin and pad settings, and enable the MXC I2C driver. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/include/asm/arch-mx6/mx6sl_pins.h |5 + board/freescale/mx6slevk/mx6slevk.c| 26 ++ include/configs/mx6slevk.h |6

[U-Boot] [PATCH 3/4] imx: mx6sabresd: Add clear print for pfuze200

2014-09-10 Thread Ye . Li
Add clear print log to show pfuze200 or pfuze100 found on mx6sabresd. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sabresd/mx6sabresd.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c

[U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-09-10 Thread Ye . Li
Initialize the Pfuze on I2C1 at board late init. The mx6slevk board has Pfuze100 or Pfuze200, print the chip type by parsing the ID. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6slevk/mx6slevk.c | 57 +++ include/configs/mx6slevk.h |

[U-Boot] [PATCH 4/4] imx: mx6: Set Pfuze mode to decrease power number for DSM

2014-09-10 Thread Ye . Li
Set all switches APS mode in normal and PFM mode in standby. So when mx6 entering DSM mode, the power number can be decreased. There is no impact for mx6 in run mode. Changes for boards: -mx6 sabreauto -mx6 sabresd -mx6slevk -mx6sxsabresd Signed-off-by: Ye.Li b37...@freescale.com ---

[U-Boot] [PATCH v2 1/4] imx: mx6slevk: Add I2C1 support

2014-09-10 Thread Ye . Li
Add I2C1 pin and pad settings, and enable the MXC I2C driver. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None arch/arm/include/asm/arch-mx6/mx6sl_pins.h |5 + board/freescale/mx6slevk/mx6slevk.c| 26 ++ include/configs/mx6slevk.h

[U-Boot] [PATCH v2 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-09-10 Thread Ye . Li
Initialize the Pfuze on I2C1 at board late init. The mx6slevk board has Pfuze100 or Pfuze200, print the chip type by parsing the ID. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None board/freescale/mx6slevk/mx6slevk.c | 57 +++

[U-Boot] [PATCH v2 4/4] imx: mx6: Set Pfuze mode to decrease power number for DSM

2014-09-10 Thread Ye . Li
Set all switches APS mode in normal and PFM mode in standby. So when mx6 entering DSM mode, the power number can be decreased. There is no impact for mx6 in run mode. Changes for boards: -mx6 sabreauto -mx6 sabresd -mx6slevk -mx6sxsabresd Signed-off-by: Ye.Li b37...@freescale.com --- Changes

[U-Boot] [PATCH v2 3/4] imx: mx6sabresd: Add clear print for pfuze200

2014-09-10 Thread Ye . Li
Add clear print log to show pfuze200 or pfuze100 found on mx6sabresd. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None board/freescale/mx6sabresd/mx6sabresd.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c

[U-Boot] [PATCH v3 1/4] imx: mx6slevk: Add I2C1 support

2014-09-10 Thread Ye . Li
Add I2C1 pin and pad settings, and enable the MXC I2C driver. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None arch/arm/include/asm/arch-mx6/mx6sl_pins.h |5 + board/freescale/mx6slevk/mx6slevk.c| 26 ++

[U-Boot] [PATCH v3 3/4] imx: mx6sabresd: Add clear print for pfuze200

2014-09-10 Thread Ye . Li
Add clear print log to show pfuze200 or pfuze100 found on mx6sabresd. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None board/freescale/mx6sabresd/mx6sabresd.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git

[U-Boot] [PATCH v3 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-09-10 Thread Ye . Li
Initialize the Pfuze on I2C1 at board late init. The mx6slevk board has Pfuze100 or Pfuze200, print the chip type by parsing the ID. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None board/freescale/mx6slevk/mx6slevk.c | 57

[U-Boot] [PATCH v3 4/4] imx: mx6: Set Pfuze mode to decrease power number for DSM

2014-09-10 Thread Ye . Li
Set all switches APS mode in normal and PFM mode in standby. So when mx6 entering DSM mode, the power number can be decreased. There is no impact for mx6 in run mode. Changes for boards: -mx6 sabreauto -mx6 sabresd -mx6slevk -mx6sxsabresd Signed-off-by: Ye.Li b37...@freescale.com --- Changes

[U-Boot] [PATCH v2 3/4] imx: mx6sxsabresd: Use the pfuze common init function

2014-09-14 Thread Ye . Li
Modify the pfuze init for mx6sxsabresd to use the shared pfuze_common_init function. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Factorize the pfuze init function for sabre boards. board/freescale/mx6sxsabresd/mx6sxsabresd.c | 40 +++ 1 files

[U-Boot] [PATCH v2 1/4] imx: mx6sabre common: Factorize the Pfuze init function

2014-09-14 Thread Ye . Li
Since the Pfuze initializations are similar on various mx6 SABRE boards. Factorize the initialization to a common function in file board/freescale/common/pfuze.c. So that all SABRE boards BSP can share the function. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Factorize the

[U-Boot] [PATCH v2 2/4] imx: mx6sabresd: Use the pfuze common init function

2014-09-14 Thread Ye . Li
Modify the pfuze init for mx6q/dlsabresd to use the shared pfuze_common_init function. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Factorize the pfuze init function for sabre boards. board/freescale/mx6sabresd/mx6sabresd.c | 40 +++--- 1 files

[U-Boot] [PATCH v2 4/4] imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support

2014-09-14 Thread Ye . Li
Initialize the pfuze100 at board late init. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Factorize the pfuze init function for sabre boards. board/freescale/mx6qsabreauto/mx6qsabreauto.c | 20 ++-- include/configs/mx6qsabreauto.h |6

[U-Boot] [PATCH v4] imx: mx6: Set Pfuze mode to decrease power number for DSM

2014-09-15 Thread Ye . Li
Set all switches APS mode in normal and PFM mode in standby. So when mx6 entering DSM mode, the power number can be decreased. There is no impact for mx6 in run mode. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - Try to correct the return code per Fabio's comments, but send

[U-Boot] [PATCH v4] imx: mx6sabre: pfuze: Add clear print for pfuze200

2014-09-15 Thread Ye . Li
Add clear print log to show pfuze200 or pfuze100 found on mx6 sabre boards. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None Changes since v3: - Separate the patch from patch set - Add the clear print to factorized pfuze function

[U-Boot] [PATCH 3/3] imx: mx6slevk: Add PMIC Pfuze support

2014-09-15 Thread Ye . Li
Initialize the Pfuze on I2C1 at mx6slekv board late init. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None Changes since v3: - Use the factorized pfuze common function in pfuze init board/freescale/mx6slevk/mx6slevk.c | 22

[U-Boot] [PATCH 2/3] imx: mx6slevk: Add I2C1 support

2014-09-15 Thread Ye . Li
Enable the MXC I2C driver for mx6slevk and setup the I2C1. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None Changes since v3: - Split the I2C1 pad setting to another new patch. board/freescale/mx6slevk/mx6slevk.c | 26 ++

[U-Boot] [PATCH 1/3] imx: mx6sololite: Add I2C1 pad settings

2014-09-15 Thread Ye . Li
Add I2C1 SDA/SCL pad settings for mx6 sololite Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v1: - None Changes since v2: - None Changes since v3: - Split the I2C1 pad settings to a new patch since it is board independent. arch/arm/include/asm/arch-mx6/mx6sl_pins.h |5 +

[U-Boot] [PATCH] usb: ehci-mx6: Rename the USB register base address

2014-09-15 Thread Ye . Li
The mx6sl/mx6sx has 2 OTG and 1 host. So they have name USBO2H_USB_BASE_ADDR in imx-regs.h. The driver hard codes the USB base address name to USBOH3, which causes the driver failed to build for mx6sl/mx6sx. This patch uniform the address name to USB_BASE_ADDR for all mx6 series. Signed-off-by:

[U-Boot] [PATCH v2] imximage: Fix the bootdata.size calculation

2014-10-30 Thread Ye . Li
In system boot chapter of i.MX6 reference manual, the Image Vector Table figure shows the bootdata.start points to the beginning of the destination memory. It means the bootdata.size should contain the IVT offset part, but the calculation in imximage tool does not have. We found this issue when

[U-Boot] [PATCH v3 1/5] imx: gpt: Add High frequency clock source support for GPT

2014-10-30 Thread Ye . Li
Introduce a new configuration CONFIG_MXC_GPT_HCLK. When it is set, the GPT will select a high frequency clock as clock source. Otherwise, the GPT will stay to use 32Khz OSC as clock source. In the implementation, since only the GPT on i.MX6 series provide the clock source option for 24Mhz OSC.

[U-Boot] [PATCH v3 2/5] imx: mx6sl: Add perclk_clk_sel bit define in CCM

2014-10-30 Thread Ye . Li
The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - None arch/arm/include/asm/arch-mx6/crm_regs.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH v3 5/5] imx: mx6: Enable high frequency clock source for GPT

2014-10-30 Thread Ye . Li
Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that 24Mhz OSC clock source will be selected for GPT on all MX6 platforms. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - Modify the patch message subject and content to use high frequency

[U-Boot] [PATCH v3 4/5] imx: mx6sl: Set the preclk clock source to OSC 24Mhz

2014-10-30 Thread Ye . Li
For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - None arch/arm/cpu/armv7/mx6/soc.c | 17 + 1 files changed, 17 insertions(+), 0

[U-Boot] [PATCH v3 3/5] imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz source

2014-10-30 Thread Ye . Li
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - None arch/arm/cpu/armv7/mx6/clock.c |4 1 files changed, 4 insertions(+), 0

[U-Boot] [PATCH v3 2/2] imx: mx6slevk: Add support for USDHC1 and USDHC3 slots

2014-10-30 Thread Ye . Li
There are three SD/MMC sockets on mx6slevk boards. Implements the full support for them. The default boot socket is USDHC2, so the MMC environment is set to that device. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - Resolve the checkpatch warnings Changes since v1: - Correct

[U-Boot] [PATCH v3 1/2] imx: mx6sl: Add IOMUX setting for USDHC1-3

2014-10-30 Thread Ye . Li
Set the USDHC1-3 IOMUX settings which are used for mx6slevk board. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - None arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff

[U-Boot] [PATCH v3] imx: mx6 sabreauto: Add board support for USB EHCI

2014-10-30 Thread Ye . Li
On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the board support codes. Since the power control uses

[U-Boot] [PATCH] imx: mx6slevk: Change default mmcdev to USDHC2 device

2014-11-03 Thread Ye . Li
Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to 1. So modify the default mmcdev in environment variables to dev 1. Signed-off-by: Ye.Li b37...@freescale.com --- include/configs/mx6slevk.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git

[U-Boot] [PATCH v3 1/2] mmc: fsl_esdhc: Update esdhc driver for iMX6SX

2014-11-03 Thread Ye . Li
The reset value of uSDHCx_INT_STATUS_EN register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - None Changes since v1: - Remove codes which set INT_STATUS_EN

[U-Boot] [PATCH v3 2/2] imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3

2014-11-03 Thread Ye . Li
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment device and mmcdev variable are set to this device. Signed-off-by: Ye.Li b37...@freescale.com --- Changes since v2: - Modify the default mmcdev environment variable to

[U-Boot] [PATCH 1/4] imx: mx6: Add support for MX6 plugin images

2014-11-04 Thread Ye . Li
Plugin image is a firmware which can be executed by boot ROM to do device initialization, custom settings, delay assertion, etc. The boot ROM detects the image type using the plugin flag of the boot data structure. If the plugin flag is 1, then the ROM uses the image as a plugin function. The

[U-Boot] [PATCH 2/4] imx: mx6q/dlarm2: Add support for building plugin image

2014-11-04 Thread Ye . Li
Update cfg script to build for plugin image. This default plugin image supports the boot devices as DCD image. To enable the plugin, must define the CONFIG_USE_PLUGIN in mx6qarm2.h Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qarm2/Makefile |4 +

[U-Boot] [PATCH 3/4] imx: mx6slevk: Add support for building plugin image

2014-11-04 Thread Ye . Li
Update cfg script to build for plugin image. This default plugin image supports the boot devices as DCD image. To enable the plugin, must define the CONFIG_USE_PLUGIN in mx6slevk.h Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6slevk/Makefile |4 +

[U-Boot] [PATCH 4/4] imx: mx6sxsabresd: Add support for building plugin image

2014-11-04 Thread Ye . Li
Update cfg script to build for plugin image. This default plugin image supports the boot devices as DCD image. To enable the plugin, must define the CONFIG_USE_PLUGIN in mx6sxsabresd.h Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sxsabresd/Makefile |4 +

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