Re: [PATCH 3/3] spi: atmel: Drop atmel_spi.h

2020-06-11 Thread Jagan Teki
On Thu, May 28, 2020 at 12:30 AM Jagan Teki  wrote:
>
> atmel_spi.h has register offsets, and atmel_spi_slave
> structure, move it into .c file for better readability
> and drop atmel_spi.h
>
> Cc: Wenyou Yang 
> Signed-off-by: Jagan Teki 
> ---

Applied to u-boot-spi/master


[PATCH 3/3] spi: atmel: Drop atmel_spi.h

2020-05-27 Thread Jagan Teki
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h

Cc: Wenyou Yang 
Signed-off-by: Jagan Teki 
---
 drivers/spi/atmel_spi.c | 88 +++--
 1 file changed, 85 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index b9f684d67e..b120664661 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -9,20 +9,102 @@
 #include 
 #include 
 #include 
-
 #include 
-
 #include 
 #include 
 #include 
 #if CONFIG_IS_ENABLED(DM_GPIO)
 #include 
 #endif
+#include 
 
-#include "atmel_spi.h"
+/*
+ * Register definitions for the Atmel AT32/AT91 SPI Controller
+ */
+/* Register offsets */
+#define ATMEL_SPI_CR   0x
+#define ATMEL_SPI_MR   0x0004
+#define ATMEL_SPI_RDR  0x0008
+#define ATMEL_SPI_TDR  0x000c
+#define ATMEL_SPI_SR   0x0010
+#define ATMEL_SPI_IER  0x0014
+#define ATMEL_SPI_IDR  0x0018
+#define ATMEL_SPI_IMR  0x001c
+#define ATMEL_SPI_CSR(x)   (0x0030 + 4 * (x))
+#define ATMEL_SPI_VERSION  0x00fc
+
+/* Bits in CR */
+#define ATMEL_SPI_CR_SPIEN BIT(0)
+#define ATMEL_SPI_CR_SPIDISBIT(1)
+#define ATMEL_SPI_CR_SWRST BIT(7)
+#define ATMEL_SPI_CR_LASTXFER  BIT(24)
+
+/* Bits in MR */
+#define ATMEL_SPI_MR_MSTR  BIT(0)
+#define ATMEL_SPI_MR_PSBIT(1)
+#define ATMEL_SPI_MR_PCSDECBIT(2)
+#define ATMEL_SPI_MR_FDIV  BIT(3)
+#define ATMEL_SPI_MR_MODFDIS   BIT(4)
+#define ATMEL_SPI_MR_WDRBT BIT(5)
+#define ATMEL_SPI_MR_LLB   BIT(7)
+#define ATMEL_SPI_MR_PCS(x)(((x) & 15) << 16)
+#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24)
+
+/* Bits in RDR */
+#define ATMEL_SPI_RDR_RD(x)(x)
+#define ATMEL_SPI_RDR_PCS(x)   ((x) << 16)
+
+/* Bits in TDR */
+#define ATMEL_SPI_TDR_TD(x)(x)
+#define ATMEL_SPI_TDR_PCS(x)   ((x) << 16)
+#define ATMEL_SPI_TDR_LASTXFER BIT(24)
+
+/* Bits in SR/IER/IDR/IMR */
+#define ATMEL_SPI_SR_RDRF  BIT(0)
+#define ATMEL_SPI_SR_TDRE  BIT(1)
+#define ATMEL_SPI_SR_MODF  BIT(2)
+#define ATMEL_SPI_SR_OVRES BIT(3)
+#define ATMEL_SPI_SR_ENDRX BIT(4)
+#define ATMEL_SPI_SR_ENDTX BIT(5)
+#define ATMEL_SPI_SR_RXBUFFBIT(6)
+#define ATMEL_SPI_SR_TXBUFEBIT(7)
+#define ATMEL_SPI_SR_NSSR  BIT(8)
+#define ATMEL_SPI_SR_TXEMPTY   BIT(9)
+#define ATMEL_SPI_SR_SPIENSBIT(16)
+
+/* Bits in CSRx */
+#define ATMEL_SPI_CSRx_CPOLBIT(0)
+#define ATMEL_SPI_CSRx_NCPHA   BIT(1)
+#define ATMEL_SPI_CSRx_CSAAT   BIT(3)
+#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4)
+#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8)
+#define ATMEL_SPI_CSRx_SCBR_MAXGENMASK(7, 0)
+#define ATMEL_SPI_CSRx_DLYBS(x)((x) << 16)
+#define ATMEL_SPI_CSRx_DLYBCT(x)   ((x) << 24)
+
+/* Bits in VERSION */
+#define ATMEL_SPI_VERSION_REV(x)   ((x) & 0xfff)
+#define ATMEL_SPI_VERSION_MFN(x)   ((x) << 16)
+
+/* Constants for CSRx:BITS */
+#define ATMEL_SPI_BITS_8   0
+#define ATMEL_SPI_BITS_9   1
+#define ATMEL_SPI_BITS_10  2
+#define ATMEL_SPI_BITS_11  3
+#define ATMEL_SPI_BITS_12  4
+#define ATMEL_SPI_BITS_13  5
+#define ATMEL_SPI_BITS_14  6
+#define ATMEL_SPI_BITS_15  7
+#define ATMEL_SPI_BITS_16  8
 
 #define MAX_CS_COUNT   4
 
+/* Register access macros */
+#define spi_readl(as, reg) \
+   readl(as->regs + ATMEL_SPI_##reg)
+#define spi_writel(as, reg, value) \
+   writel(value, as->regs + ATMEL_SPI_##reg)
+
 struct atmel_spi_platdata {
struct at91_spi *regs;
 };
-- 
2.25.1