Re: [PATCH v3 4/9] arm: socfpga: Update Stratix10 SPL data save and restore implementation

2026-06-03 Thread Yuslaimi, Alif Zakuan

Hi Tien Fong,

On 3/6/2026 3:17 pm, Chee, Tien Fong wrote:

Hi Alif,


On 18/5/2026 9:12 am, [email protected] wrote:

From: Alif Zakuan Yuslaimi 

Enable backup for data section to support warm reset in Stratix10 SPL as
no SPL image would be reloaded in warm reset.

Signed-off-by: Alif Zakuan Yuslaimi 
---

(no changes since v1)

  arch/arm/mach-socfpga/spl_s10.c | 17 +
  configs/socfpga_stratix10_defconfig |  2 +-
  2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/ 
spl_s10.c

index 8ab80740c6e..ce1d5d4c8ff 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -21,12 +21,29 @@
  #include 
  #include 
+u32 reset_flag(void)



spl_save_restore_data() calls reset_flag(cold_reboot_flag). S10 defines 
reset_flag(void), which is not a proper override of the weak 
reset_flag(u32 flag) and may break under strict prototypes. Logic 
matches Agilex5 (0 = warm → restore, 1 = cold → save); only the 
signature needs fixing.




Thanks for pointing this out, I will fix this in v4.

Regards,
Alif



Best regards,

Tien Fong





Re: [PATCH v3 4/9] arm: socfpga: Update Stratix10 SPL data save and restore implementation

2026-06-03 Thread Chee, Tien Fong

Hi Alif,


On 18/5/2026 9:12 am, [email protected] wrote:

From: Alif Zakuan Yuslaimi 

Enable backup for data section to support warm reset in Stratix10 SPL as
no SPL image would be reloaded in warm reset.

Signed-off-by: Alif Zakuan Yuslaimi 
---

(no changes since v1)

  arch/arm/mach-socfpga/spl_s10.c | 17 +
  configs/socfpga_stratix10_defconfig |  2 +-
  2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index 8ab80740c6e..ce1d5d4c8ff 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -21,12 +21,29 @@
  #include 
  #include 
  
+u32 reset_flag(void)



spl_save_restore_data() calls reset_flag(cold_reboot_flag). S10 defines 
reset_flag(void), which is not a proper override of the weak 
reset_flag(u32 flag) and may break under strict prototypes. Logic 
matches Agilex5 (0 = warm → restore, 1 = cold → save); only the 
signature needs fixing.



Best regards,

Tien Fong



[PATCH v3 4/9] arm: socfpga: Update Stratix10 SPL data save and restore implementation

2026-05-17 Thread alif . zakuan . yuslaimi
From: Alif Zakuan Yuslaimi 

Enable backup for data section to support warm reset in Stratix10 SPL as
no SPL image would be reloaded in warm reset.

Signed-off-by: Alif Zakuan Yuslaimi 
---

(no changes since v1)

 arch/arm/mach-socfpga/spl_s10.c | 17 +
 configs/socfpga_stratix10_defconfig |  2 +-
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index 8ab80740c6e..ce1d5d4c8ff 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -21,12 +21,29 @@
 #include 
 #include 
 
+u32 reset_flag(void)
+{
+   /* Check rstmgr.stat for warm reset status */
+   u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);
+
+   /* Check whether any L4 watchdogs or SDM had triggered warm reset */
+   u32 warm_reset_mask = RSTMGR_L4WD_MPU_WARMRESET_MASK;
+
+   if (status & warm_reset_mask)
+   return 0;
+
+   return 1;
+}
+
 void board_init_f(ulong dummy)
 {
const struct cm_config *cm_default_cfg = cm_get_default_config();
int ret;
struct udevice *dev;
 
+   if (IS_ENABLED(CONFIG_XPL_BUILD))
+   spl_save_restore_data();
+
ret = spl_early_init();
if (ret)
hang();
diff --git a/configs/socfpga_stratix10_defconfig 
b/configs/socfpga_stratix10_defconfig
index 82f0cceafb4..be0c452ead0 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -3,7 +3,6 @@ CONFIG_COUNTER_FREQUENCY=4
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TEXT_BASE=0x20
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
 CONFIG_SF_DEFAULT_MODE=0x2003
@@ -19,6 +18,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10
 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
 CONFIG_IDENT_STRING="socfpga_stratix10"
 CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_RECOVER_DATA_SECTION=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
-- 
2.43.7