Re: [U-Boot] [PATCH v1 17/19] pinctrl: armada-37xx: Fix SB pinctrl groups according to new revision

[Stefan Roese]

On 07.03.2018 22:52, Marek Behún wrote:

The groups pcie1, ptp and mii changed in new revision (from 2016).
Also smi was added to support enabling the MDIO pins.

Signed-off-by: Marek Behun 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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[U-Boot] [PATCH v1 17/19] pinctrl: armada-37xx: Fix SB pinctrl groups according to new revision

[Marek Behún]

The groups pcie1, ptp and mii changed in new revision (from 2016).
Also smi was added to support enabling the MDIO pins.

Signed-off-by: Marek Behun 
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 
b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 2bf853eba1..8913e25c55 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -174,11 +174,12 @@ static struct armada_37xx_pin_group 
armada_37xx_sb_groups[] = {
PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"),
PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"),
-   PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
-   PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
+   PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
+   PIN_GRP_GPIO("pcie1", 3, 3, BIT(5) | BIT(9) | BIT(10), "pcie"),
+   PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
-   PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"),
+   PIN_GRP("mii_col", 23, 1, BIT(8) | BIT(14), "mii", "mii_err"),
 };
 
 const struct armada_37xx_pin_data armada_37xx_pin_nb = {
-- 
2.16.1

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