Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-05-03 Thread Stefano Babic 
On 02/05/2018 14:41, Jagan Teki wrote:
> Hi Stefano,
> 
> On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic  wrote:
>> On 26/04/2018 09:33, Jagan Teki wrote:
>>>  On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic  wrote:
 Hi Jagan,

> 
> [snip]
> 
> +
> +static int mx6dl_dcd_table[] = {
> + 0x020e0774, 0x000C, /* MX6_IOM_GRP_DDR_TYPE */
> + 0x020e0754, 0x, /* MX6_IOM_GRP_DDRPKE */
> +
> + 0x020e04ac, 0x0028, /* MX6_IOM_DRAM_SDCLK_0 */
> + 0x020e04b0, 0x0028, /* MX6_IOM_DRAM_SDCLK_1 */
> +
> + 0x020e0464, 0x0028, /* MX6_IOM_DRAM_CAS */
> + 0x020e0490, 0x0028, /* MX6_IOM_DRAM_RAS */
> + 0x020e074c, 0x0028, /* MX6_IOM_GRP_ADDDS */
> +
> + 0x020e0494, 0x0028, /* MX6_IOM_DRAM_RESET */
> + 0x020e04a0, 0x, /* MX6_IOM_DRAM_SDBA2 */
> + 0x020e04b4, 0x0028, /* MX6_IOM_DRAM_SDODT0 */
> + 0x020e04b8, 0x0028, /* MX6_IOM_DRAM_SDODT1 */
> + 0x020e076c, 0x0028, /* MX6_IOM_GRP_CTLDS */
> +
> + 0x020e0750, 0x0002, /* MX6_IOM_GRP_DDRMODE_CTL */
> + 0x020e04bc, 0x0028, /* MX6_IOM_DRAM_SDQS0 */
> + 0x020e04c0, 0x0028, /* MX6_IOM_DRAM_SDQS1 */
> + 0x020e04c4, 0x0028, /* MX6_IOM_DRAM_SDQS2 */
> + 0x020e04c8, 0x0028, /* MX6_IOM_DRAM_SDQS3 */
> +
> + 0x020e0760, 0x0002, /* MX6_IOM_GRP_DDRMODE */
> + 0x020e0764, 0x0028, /* MX6_IOM_GRP_B0DS */
> + 0x020e0770, 0x0028, /* MX6_IOM_GRP_B1DS */
> + 0x020e0778, 0x0028, /* MX6_IOM_GRP_B2DS */
> + 0x020e077c, 0x0028, /* MX6_IOM_GRP_B3DS */
> +
> + 0x020e0470, 0x0028, /* MX6_IOM_DRAM_DQM0 */
> + 0x020e0474, 0x0028, /* MX6_IOM_DRAM_DQM1 */
> + 0x020e0478, 0x0028, /* MX6_IOM_DRAM_DQM2 */
> + 0x020e047c, 0x0028, /* MX6_IOM_DRAM_DQM3 */
> +
> + 0x021b001c, 0x8000, /* MMDC0_MDSCR */
> +
> + 0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
> +
> + 0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
> + 0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
> +
> + 0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
> + 0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
> +
> + 0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
> +
> + 0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
> +
> + 0x021b081c, 0x, /* DDR_PHY_P0_MPREDQBY0DL3 */
> + 0x021b0820, 0x, /* DDR_PHY_P0_MPREDQBY1DL3 */
> + 0x021b0824, 0x, /* DDR_PHY_P0_MPREDQBY2DL3 */
> + 0x021b0828, 0x, /* DDR_PHY_P0_MPREDQBY3DL3 */
> +
> + 0x021b08b8, 0x0800, /* DDR_PHY_P0_MPMUR0 */
> +
> + 0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
> + 0x021b0008, 0x00333040, /* MMDC0_MDOTC */
> + 0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
> + 0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
> + 0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
> +
> + 0x021b0018, 0x00011740, /* MMDC0_MDMISC */
> + 0x021b001c, 0x8000, /* MMDC0_MDSCR */
> + 0x021b002c, 0x26D2, /* MMDC0_MDRWD */
> + 0x021b0030, 0x00431023, /* MMDC0_MDOR */
> + 0x021b0040, 0x0017, /* Chan0 CS0_END */
> + 0x021b, 0x8319, /* MMDC0_MDCTL */
> +
> + 0x021b001c, 0x02008032, /* MMDC0_MDSCR  MR2 write, CS0 */
> + 0x021b001c, 0x8033, /* MMDC0_MDSCR, MR3 write, CS0 */
> + 0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
> + 0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
> + 0x021b001c, 0x04008040, /* MMDC0_MDSCR */
> +
> + 0x021b0020, 0x7800, /* MMDC0_MDREF */
> +
> + 0x021b0818, 0x0007, /* DDR_PHY_P0_MPODTCTRL */
> +
> + 0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
> + 0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
> + 0x021b001c, 0x, /* MMDC0_MDSCR */
> +};
> +

 Sorry to have not raised this before. I saw this the first time, but I
 did not understand. I tried to find a reason for it, but still I had no
 answer.

 This is a DL, and DDR support is full integrated in U-Boot, including
 dynamic calibration if desired. What is the reason to dump the DCD table
 into code and push it with ddr_init, instead of setting structures for
 chip, gpr and calibration as most of boards are doing ? If you dump the
 table, you could this in the .cfg file where the DCD table belongs to,
 of course adding entries for DDR initialisation. I do not see after long
 thoughts any reason to go in this way.
>>>
>>> Like initializing ddr config and calibration using mx6sdl_dram_iocfg
>>> and mx6_dram_cfg? yes I usually does the same instead of hot codding
>>> hex values.
>>
>> Yes, this is what I mean.
> 
> ddr calibration

Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-05-02 Thread Jagan Teki 
Hi Stefano,

On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic  wrote:
> On 26/04/2018 09:33, Jagan Teki wrote:
>>  On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic  wrote:
>>> Hi Jagan,
>>>

[snip]

 +
 +static int mx6dl_dcd_table[] = {
 + 0x020e0774, 0x000C, /* MX6_IOM_GRP_DDR_TYPE */
 + 0x020e0754, 0x, /* MX6_IOM_GRP_DDRPKE */
 +
 + 0x020e04ac, 0x0028, /* MX6_IOM_DRAM_SDCLK_0 */
 + 0x020e04b0, 0x0028, /* MX6_IOM_DRAM_SDCLK_1 */
 +
 + 0x020e0464, 0x0028, /* MX6_IOM_DRAM_CAS */
 + 0x020e0490, 0x0028, /* MX6_IOM_DRAM_RAS */
 + 0x020e074c, 0x0028, /* MX6_IOM_GRP_ADDDS */
 +
 + 0x020e0494, 0x0028, /* MX6_IOM_DRAM_RESET */
 + 0x020e04a0, 0x, /* MX6_IOM_DRAM_SDBA2 */
 + 0x020e04b4, 0x0028, /* MX6_IOM_DRAM_SDODT0 */
 + 0x020e04b8, 0x0028, /* MX6_IOM_DRAM_SDODT1 */
 + 0x020e076c, 0x0028, /* MX6_IOM_GRP_CTLDS */
 +
 + 0x020e0750, 0x0002, /* MX6_IOM_GRP_DDRMODE_CTL */
 + 0x020e04bc, 0x0028, /* MX6_IOM_DRAM_SDQS0 */
 + 0x020e04c0, 0x0028, /* MX6_IOM_DRAM_SDQS1 */
 + 0x020e04c4, 0x0028, /* MX6_IOM_DRAM_SDQS2 */
 + 0x020e04c8, 0x0028, /* MX6_IOM_DRAM_SDQS3 */
 +
 + 0x020e0760, 0x0002, /* MX6_IOM_GRP_DDRMODE */
 + 0x020e0764, 0x0028, /* MX6_IOM_GRP_B0DS */
 + 0x020e0770, 0x0028, /* MX6_IOM_GRP_B1DS */
 + 0x020e0778, 0x0028, /* MX6_IOM_GRP_B2DS */
 + 0x020e077c, 0x0028, /* MX6_IOM_GRP_B3DS */
 +
 + 0x020e0470, 0x0028, /* MX6_IOM_DRAM_DQM0 */
 + 0x020e0474, 0x0028, /* MX6_IOM_DRAM_DQM1 */
 + 0x020e0478, 0x0028, /* MX6_IOM_DRAM_DQM2 */
 + 0x020e047c, 0x0028, /* MX6_IOM_DRAM_DQM3 */
 +
 + 0x021b001c, 0x8000, /* MMDC0_MDSCR */
 +
 + 0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
 +
 + 0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
 + 0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
 +
 + 0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
 + 0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
 +
 + 0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
 +
 + 0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
 +
 + 0x021b081c, 0x, /* DDR_PHY_P0_MPREDQBY0DL3 */
 + 0x021b0820, 0x, /* DDR_PHY_P0_MPREDQBY1DL3 */
 + 0x021b0824, 0x, /* DDR_PHY_P0_MPREDQBY2DL3 */
 + 0x021b0828, 0x, /* DDR_PHY_P0_MPREDQBY3DL3 */
 +
 + 0x021b08b8, 0x0800, /* DDR_PHY_P0_MPMUR0 */
 +
 + 0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
 + 0x021b0008, 0x00333040, /* MMDC0_MDOTC */
 + 0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
 + 0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
 + 0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
 +
 + 0x021b0018, 0x00011740, /* MMDC0_MDMISC */
 + 0x021b001c, 0x8000, /* MMDC0_MDSCR */
 + 0x021b002c, 0x26D2, /* MMDC0_MDRWD */
 + 0x021b0030, 0x00431023, /* MMDC0_MDOR */
 + 0x021b0040, 0x0017, /* Chan0 CS0_END */
 + 0x021b, 0x8319, /* MMDC0_MDCTL */
 +
 + 0x021b001c, 0x02008032, /* MMDC0_MDSCR  MR2 write, CS0 */
 + 0x021b001c, 0x8033, /* MMDC0_MDSCR, MR3 write, CS0 */
 + 0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
 + 0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
 + 0x021b001c, 0x04008040, /* MMDC0_MDSCR */
 +
 + 0x021b0020, 0x7800, /* MMDC0_MDREF */
 +
 + 0x021b0818, 0x0007, /* DDR_PHY_P0_MPODTCTRL */
 +
 + 0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
 + 0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
 + 0x021b001c, 0x, /* MMDC0_MDSCR */
 +};
 +
>>>
>>> Sorry to have not raised this before. I saw this the first time, but I
>>> did not understand. I tried to find a reason for it, but still I had no
>>> answer.
>>>
>>> This is a DL, and DDR support is full integrated in U-Boot, including
>>> dynamic calibration if desired. What is the reason to dump the DCD table
>>> into code and push it with ddr_init, instead of setting structures for
>>> chip, gpr and calibration as most of boards are doing ? If you dump the
>>> table, you could this in the .cfg file where the DCD table belongs to,
>>> of course adding entries for DDR initialisation. I do not see after long
>>> thoughts any reason to go in this way.
>>
>> Like initializing ddr config and calibration using mx6sdl_dram_iocfg
>> and mx6_dram_cfg? yes I usually does the same instead of hot codding
>> hex values.
>
> Yes, this is what I mean.

ddr calibration here has reinitialized few of same registers multiple
times with a sequence, using mx6_dram_cfg I can't achieve the same. I
need to dig further on to this for

Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-04-26 Thread Jagan Teki 
On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic  wrote:
> On 26/04/2018 09:33, Jagan Teki wrote:
>>  On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic  wrote:
>>> Hi Jagan,
>>>
>>> On 11/04/2018 14:36, Jagan Teki wrote:
 Add initial support for i.MX6DL BTicino Mamoj board.

 Mamoh board added:
 - SPL
 - SPL_DM
 - SPL_OF_CONTROL
 - DM for U-Boot proper
 - OF_CONTROL for U-Boot proper
 - eMMC
 - FEC
 - Boot from eMMC
 - Boot from USB SDP

 Signed-off-by: Simone CIANNI 
 Signed-off-by: Raffaele RECALCATI 
 Signed-off-by: Jagan Teki 
 ---
  arch/arm/dts/Makefile |   1 +
  arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |  15 
  arch/arm/dts/imx6dl-mamoj.dts |  84 +++
  arch/arm/mach-imx/mx6/Kconfig |  29 +++
  board/bticino/mamoj/Kconfig   |  12 +++
  board/bticino/mamoj/MAINTAINERS   |  10 +++
  board/bticino/mamoj/Makefile  |   8 ++
  board/bticino/mamoj/README|  60 +
  board/bticino/mamoj/mamoj.c   |  27 ++
  board/bticino/mamoj/spl.c | 154 
 ++
  configs/imx6dl_mamoj_defconfig|  39 +
  include/configs/imx6dl-mamoj.h|  88 +++
  12 files changed, 527 insertions(+)
  create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
  create mode 100644 arch/arm/dts/imx6dl-mamoj.dts
  create mode 100644 board/bticino/mamoj/Kconfig
  create mode 100644 board/bticino/mamoj/MAINTAINERS
  create mode 100644 board/bticino/mamoj/Makefile
  create mode 100644 board/bticino/mamoj/README
  create mode 100644 board/bticino/mamoj/mamoj.c
  create mode 100644 board/bticino/mamoj/spl.c
  create mode 100644 configs/imx6dl_mamoj_defconfig
  create mode 100644 include/configs/imx6dl-mamoj.h

 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
 index f03e276486..2a75711246 100644
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
 @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \
   imx6dl-icore.dtb \
   imx6dl-icore-mipi.dtb \
   imx6dl-icore-rqs.dtb \
 + imx6dl-mamoj.dtb \
   imx6q-cm-fx6.dtb \
   imx6q-icore.dtb \
   imx6q-icore-mipi.dtb \
 diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi 
 b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
 new file mode 100644
 index 00..d4c3c0bdf0
 --- /dev/null
 +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
 @@ -0,0 +1,15 @@
 +/*
 + * Copyright (C) 2018 Jagan Teki 
 + *
 + * SPDX-License-Identifier: GPL-2.0+
 + */
 +
 +#include "imx6qdl-u-boot.dtsi"
 +
 + {
 + u-boot,dm-spl;
 +};
 +
 +_usdhc3 {
 + u-boot,dm-spl;
 +};
 diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts
 new file mode 100644
 index 00..068d518de3
 --- /dev/null
 +++ b/arch/arm/dts/imx6dl-mamoj.dts
 @@ -0,0 +1,84 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (C) 2018 BTicino
 + * Copyright (C) 2018 Amarula Solutions B.V.
 + */
 +
 +/dts-v1/;
 +
 +#include 
 +#include "imx6dl.dtsi"
 +
 +/ {
 + model = "BTicino i.MX6DL Mamoj board";
 + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
 +};
 +
 + {
 + pinctrl-names = "default";
 + pinctrl-0 = <_enet>;
 + phy-mode = "mii";
 + status = "okay";
 +};
 +
 + {
 + pinctrl-names = "default";
 + pinctrl-0 = <_uart3>;
 + status = "okay";
 +};
 +
 + {
 + pinctrl-names = "default";
 + pinctrl-0 = <_usdhc3>;
 + bus-width = <8>;
 + non-removable;
 + keep-power-in-suspend;
 + status = "okay";
 +};
 +
 + {
 + pinctrl_enet: enetgrp {
 + fsl,pins = <
 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
 + MX6QDL_PAD_ENET_MDC__ENET_MDC   0x1b0b0
 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b1
 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2  0x1b0b0
 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3  0x1b0b0
 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
 + MX6QDL_PAD_GPIO_19__ENET_TX_ER  0x1b0b0
 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
 +

Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-04-26 Thread Stefano Babic 
On 26/04/2018 09:33, Jagan Teki wrote:
>  On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic  wrote:
>> Hi Jagan,
>>
>> On 11/04/2018 14:36, Jagan Teki wrote:
>>> Add initial support for i.MX6DL BTicino Mamoj board.
>>>
>>> Mamoh board added:
>>> - SPL
>>> - SPL_DM
>>> - SPL_OF_CONTROL
>>> - DM for U-Boot proper
>>> - OF_CONTROL for U-Boot proper
>>> - eMMC
>>> - FEC
>>> - Boot from eMMC
>>> - Boot from USB SDP
>>>
>>> Signed-off-by: Simone CIANNI 
>>> Signed-off-by: Raffaele RECALCATI 
>>> Signed-off-by: Jagan Teki 
>>> ---
>>>  arch/arm/dts/Makefile |   1 +
>>>  arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |  15 
>>>  arch/arm/dts/imx6dl-mamoj.dts |  84 +++
>>>  arch/arm/mach-imx/mx6/Kconfig |  29 +++
>>>  board/bticino/mamoj/Kconfig   |  12 +++
>>>  board/bticino/mamoj/MAINTAINERS   |  10 +++
>>>  board/bticino/mamoj/Makefile  |   8 ++
>>>  board/bticino/mamoj/README|  60 +
>>>  board/bticino/mamoj/mamoj.c   |  27 ++
>>>  board/bticino/mamoj/spl.c | 154 
>>> ++
>>>  configs/imx6dl_mamoj_defconfig|  39 +
>>>  include/configs/imx6dl-mamoj.h|  88 +++
>>>  12 files changed, 527 insertions(+)
>>>  create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/imx6dl-mamoj.dts
>>>  create mode 100644 board/bticino/mamoj/Kconfig
>>>  create mode 100644 board/bticino/mamoj/MAINTAINERS
>>>  create mode 100644 board/bticino/mamoj/Makefile
>>>  create mode 100644 board/bticino/mamoj/README
>>>  create mode 100644 board/bticino/mamoj/mamoj.c
>>>  create mode 100644 board/bticino/mamoj/spl.c
>>>  create mode 100644 configs/imx6dl_mamoj_defconfig
>>>  create mode 100644 include/configs/imx6dl-mamoj.h
>>>
>>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>>> index f03e276486..2a75711246 100644
>>> --- a/arch/arm/dts/Makefile
>>> +++ b/arch/arm/dts/Makefile
>>> @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \
>>>   imx6dl-icore.dtb \
>>>   imx6dl-icore-mipi.dtb \
>>>   imx6dl-icore-rqs.dtb \
>>> + imx6dl-mamoj.dtb \
>>>   imx6q-cm-fx6.dtb \
>>>   imx6q-icore.dtb \
>>>   imx6q-icore-mipi.dtb \
>>> diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi 
>>> b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>>> new file mode 100644
>>> index 00..d4c3c0bdf0
>>> --- /dev/null
>>> +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>>> @@ -0,0 +1,15 @@
>>> +/*
>>> + * Copyright (C) 2018 Jagan Teki 
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#include "imx6qdl-u-boot.dtsi"
>>> +
>>> + {
>>> + u-boot,dm-spl;
>>> +};
>>> +
>>> +_usdhc3 {
>>> + u-boot,dm-spl;
>>> +};
>>> diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts
>>> new file mode 100644
>>> index 00..068d518de3
>>> --- /dev/null
>>> +++ b/arch/arm/dts/imx6dl-mamoj.dts
>>> @@ -0,0 +1,84 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (C) 2018 BTicino
>>> + * Copyright (C) 2018 Amarula Solutions B.V.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include 
>>> +#include "imx6dl.dtsi"
>>> +
>>> +/ {
>>> + model = "BTicino i.MX6DL Mamoj board";
>>> + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
>>> +};
>>> +
>>> + {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <_enet>;
>>> + phy-mode = "mii";
>>> + status = "okay";
>>> +};
>>> +
>>> + {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <_uart3>;
>>> + status = "okay";
>>> +};
>>> +
>>> + {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <_usdhc3>;
>>> + bus-width = <8>;
>>> + non-removable;
>>> + keep-power-in-suspend;
>>> + status = "okay";
>>> +};
>>> +
>>> + {
>>> + pinctrl_enet: enetgrp {
>>> + fsl,pins = <
>>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>>> + MX6QDL_PAD_ENET_MDC__ENET_MDC   0x1b0b0
>>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b1
>>> + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
>>> + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
>>> + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2  0x1b0b0
>>> + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3  0x1b0b0
>>> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
>>> + MX6QDL_PAD_GPIO_19__ENET_TX_ER  0x1b0b0
>>> + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
>>> + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
>>> + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
>>> + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2  0x1b0b0
>>> +

Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-04-26 Thread Jagan Teki 
 On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic  wrote:
> Hi Jagan,
>
> On 11/04/2018 14:36, Jagan Teki wrote:
>> Add initial support for i.MX6DL BTicino Mamoj board.
>>
>> Mamoh board added:
>> - SPL
>> - SPL_DM
>> - SPL_OF_CONTROL
>> - DM for U-Boot proper
>> - OF_CONTROL for U-Boot proper
>> - eMMC
>> - FEC
>> - Boot from eMMC
>> - Boot from USB SDP
>>
>> Signed-off-by: Simone CIANNI 
>> Signed-off-by: Raffaele RECALCATI 
>> Signed-off-by: Jagan Teki 
>> ---
>>  arch/arm/dts/Makefile |   1 +
>>  arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |  15 
>>  arch/arm/dts/imx6dl-mamoj.dts |  84 +++
>>  arch/arm/mach-imx/mx6/Kconfig |  29 +++
>>  board/bticino/mamoj/Kconfig   |  12 +++
>>  board/bticino/mamoj/MAINTAINERS   |  10 +++
>>  board/bticino/mamoj/Makefile  |   8 ++
>>  board/bticino/mamoj/README|  60 +
>>  board/bticino/mamoj/mamoj.c   |  27 ++
>>  board/bticino/mamoj/spl.c | 154 
>> ++
>>  configs/imx6dl_mamoj_defconfig|  39 +
>>  include/configs/imx6dl-mamoj.h|  88 +++
>>  12 files changed, 527 insertions(+)
>>  create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/imx6dl-mamoj.dts
>>  create mode 100644 board/bticino/mamoj/Kconfig
>>  create mode 100644 board/bticino/mamoj/MAINTAINERS
>>  create mode 100644 board/bticino/mamoj/Makefile
>>  create mode 100644 board/bticino/mamoj/README
>>  create mode 100644 board/bticino/mamoj/mamoj.c
>>  create mode 100644 board/bticino/mamoj/spl.c
>>  create mode 100644 configs/imx6dl_mamoj_defconfig
>>  create mode 100644 include/configs/imx6dl-mamoj.h
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index f03e276486..2a75711246 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \
>>   imx6dl-icore.dtb \
>>   imx6dl-icore-mipi.dtb \
>>   imx6dl-icore-rqs.dtb \
>> + imx6dl-mamoj.dtb \
>>   imx6q-cm-fx6.dtb \
>>   imx6q-icore.dtb \
>>   imx6q-icore-mipi.dtb \
>> diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi 
>> b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>> new file mode 100644
>> index 00..d4c3c0bdf0
>> --- /dev/null
>> +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>> @@ -0,0 +1,15 @@
>> +/*
>> + * Copyright (C) 2018 Jagan Teki 
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include "imx6qdl-u-boot.dtsi"
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> +_usdhc3 {
>> + u-boot,dm-spl;
>> +};
>> diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts
>> new file mode 100644
>> index 00..068d518de3
>> --- /dev/null
>> +++ b/arch/arm/dts/imx6dl-mamoj.dts
>> @@ -0,0 +1,84 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2018 BTicino
>> + * Copyright (C) 2018 Amarula Solutions B.V.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include 
>> +#include "imx6dl.dtsi"
>> +
>> +/ {
>> + model = "BTicino i.MX6DL Mamoj board";
>> + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
>> +};
>> +
>> + {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <_enet>;
>> + phy-mode = "mii";
>> + status = "okay";
>> +};
>> +
>> + {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <_uart3>;
>> + status = "okay";
>> +};
>> +
>> + {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <_usdhc3>;
>> + bus-width = <8>;
>> + non-removable;
>> + keep-power-in-suspend;
>> + status = "okay";
>> +};
>> +
>> + {
>> + pinctrl_enet: enetgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>> + MX6QDL_PAD_ENET_MDC__ENET_MDC   0x1b0b0
>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b1
>> + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
>> + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
>> + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2  0x1b0b0
>> + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3  0x1b0b0
>> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
>> + MX6QDL_PAD_GPIO_19__ENET_TX_ER  0x1b0b0
>> + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
>> + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
>> + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
>> + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2  0x1b0b0
>> + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3  0x1b0b0
>> + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0
>> +

Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-04-26 Thread Stefano Babic 
Hi Jagan,

On 11/04/2018 14:36, Jagan Teki wrote:
> Add initial support for i.MX6DL BTicino Mamoj board.
> 
> Mamoh board added:
> - SPL
> - SPL_DM
> - SPL_OF_CONTROL
> - DM for U-Boot proper
> - OF_CONTROL for U-Boot proper
> - eMMC
> - FEC
> - Boot from eMMC
> - Boot from USB SDP
> 
> Signed-off-by: Simone CIANNI 
> Signed-off-by: Raffaele RECALCATI 
> Signed-off-by: Jagan Teki 
> ---
>  arch/arm/dts/Makefile |   1 +
>  arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |  15 
>  arch/arm/dts/imx6dl-mamoj.dts |  84 +++
>  arch/arm/mach-imx/mx6/Kconfig |  29 +++
>  board/bticino/mamoj/Kconfig   |  12 +++
>  board/bticino/mamoj/MAINTAINERS   |  10 +++
>  board/bticino/mamoj/Makefile  |   8 ++
>  board/bticino/mamoj/README|  60 +
>  board/bticino/mamoj/mamoj.c   |  27 ++
>  board/bticino/mamoj/spl.c | 154 
> ++
>  configs/imx6dl_mamoj_defconfig|  39 +
>  include/configs/imx6dl-mamoj.h|  88 +++
>  12 files changed, 527 insertions(+)
>  create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
>  create mode 100644 arch/arm/dts/imx6dl-mamoj.dts
>  create mode 100644 board/bticino/mamoj/Kconfig
>  create mode 100644 board/bticino/mamoj/MAINTAINERS
>  create mode 100644 board/bticino/mamoj/Makefile
>  create mode 100644 board/bticino/mamoj/README
>  create mode 100644 board/bticino/mamoj/mamoj.c
>  create mode 100644 board/bticino/mamoj/spl.c
>  create mode 100644 configs/imx6dl_mamoj_defconfig
>  create mode 100644 include/configs/imx6dl-mamoj.h
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index f03e276486..2a75711246 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \
>   imx6dl-icore.dtb \
>   imx6dl-icore-mipi.dtb \
>   imx6dl-icore-rqs.dtb \
> + imx6dl-mamoj.dtb \
>   imx6q-cm-fx6.dtb \
>   imx6q-icore.dtb \
>   imx6q-icore-mipi.dtb \
> diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi 
> b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
> new file mode 100644
> index 00..d4c3c0bdf0
> --- /dev/null
> +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
> @@ -0,0 +1,15 @@
> +/*
> + * Copyright (C) 2018 Jagan Teki 
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include "imx6qdl-u-boot.dtsi"
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> +_usdhc3 {
> + u-boot,dm-spl;
> +};
> diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts
> new file mode 100644
> index 00..068d518de3
> --- /dev/null
> +++ b/arch/arm/dts/imx6dl-mamoj.dts
> @@ -0,0 +1,84 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2018 BTicino
> + * Copyright (C) 2018 Amarula Solutions B.V.
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include "imx6dl.dtsi"
> +
> +/ {
> + model = "BTicino i.MX6DL Mamoj board";
> + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_enet>;
> + phy-mode = "mii";
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_uart3>;
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_usdhc3>;
> + bus-width = <8>;
> + non-removable;
> + keep-power-in-suspend;
> + status = "okay";
> +};
> +
> + {
> + pinctrl_enet: enetgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC   0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b1
> + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
> + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
> + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2  0x1b0b0
> + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3  0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
> + MX6QDL_PAD_GPIO_19__ENET_TX_ER  0x1b0b0
> + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
> + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
> + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
> + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2  0x1b0b0
> + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3  0x1b0b0
> + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0
> + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER   0x1b0b0
> + MX6QDL_PAD_KEY_COL3__ENET_CRS   0x1b0b0
> + MX6QDL_PAD_KEY_ROW1__ENET_COL   0x1b0b0
> + >;
> + };
> +
> +

[U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

2018-04-11 Thread Jagan Teki 
Add initial support for i.MX6DL BTicino Mamoj board.

Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP

Signed-off-by: Simone CIANNI 
Signed-off-by: Raffaele RECALCATI 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |  15 
 arch/arm/dts/imx6dl-mamoj.dts |  84 +++
 arch/arm/mach-imx/mx6/Kconfig |  29 +++
 board/bticino/mamoj/Kconfig   |  12 +++
 board/bticino/mamoj/MAINTAINERS   |  10 +++
 board/bticino/mamoj/Makefile  |   8 ++
 board/bticino/mamoj/README|  60 +
 board/bticino/mamoj/mamoj.c   |  27 ++
 board/bticino/mamoj/spl.c | 154 ++
 configs/imx6dl_mamoj_defconfig|  39 +
 include/configs/imx6dl-mamoj.h|  88 +++
 12 files changed, 527 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx6dl-mamoj.dts
 create mode 100644 board/bticino/mamoj/Kconfig
 create mode 100644 board/bticino/mamoj/MAINTAINERS
 create mode 100644 board/bticino/mamoj/Makefile
 create mode 100644 board/bticino/mamoj/README
 create mode 100644 board/bticino/mamoj/mamoj.c
 create mode 100644 board/bticino/mamoj/spl.c
 create mode 100644 configs/imx6dl_mamoj_defconfig
 create mode 100644 include/configs/imx6dl-mamoj.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f03e276486..2a75711246 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
+   imx6dl-mamoj.dtb \
imx6q-cm-fx6.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi 
b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
new file mode 100644
index 00..d4c3c0bdf0
--- /dev/null
+++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Jagan Teki 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-u-boot.dtsi"
+
+ {
+   u-boot,dm-spl;
+};
+
+_usdhc3 {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts
new file mode 100644
index 00..068d518de3
--- /dev/null
+++ b/arch/arm/dts/imx6dl-mamoj.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 BTicino
+ * Copyright (C) 2018 Amarula Solutions B.V.
+ */
+
+/dts-v1/;
+
+#include 
+#include "imx6dl.dtsi"
+
+/ {
+   model = "BTicino i.MX6DL Mamoj board";
+   compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_enet>;
+   phy-mode = "mii";
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_uart3>;
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_usdhc3>;
+   bus-width = <8>;
+   non-removable;
+   keep-power-in-suspend;
+   status = "okay";
+};
+
+ {
+   pinctrl_enet: enetgrp {
+   fsl,pins = <
+   MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+   MX6QDL_PAD_ENET_MDC__ENET_MDC   0x1b0b0
+   MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b1
+   MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
+   MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
+   MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2  0x1b0b0
+   MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3  0x1b0b0
+   MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
+   MX6QDL_PAD_GPIO_19__ENET_TX_ER  0x1b0b0
+   MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
+   MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
+   MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
+   MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2  0x1b0b0
+   MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3  0x1b0b0
+   MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0
+   MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER   0x1b0b0
+   MX6QDL_PAD_KEY_COL3__ENET_CRS   0x1b0b0
+   MX6QDL_PAD_KEY_ROW1__ENET_COL   0x1b0b0
+   >;
+   };
+
+   pinctrl_uart3: uart3grp {
+   fsl,pins = <
+   MX6QDL_PAD_EIM_D24__UART3_TX_DATA   0x1b0b1
+   MX6QDL_PAD_EIM_D25__UART3_RX_DATA   0x1b0b1
+   >;
+   };
+
+   pinctrl_usdhc3: