Board support for the Guntermann Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach eib...@gdsys.de
---
Replaces
- 0001-ppc4xx-Add-DLVision-10G-board-support.patch
- 0002-ppc4xx-Support-multiple-FPGAs.patch
- 0003-ppc4xx-Support-dual-link-OSD.patch
Changes for v2:
- define EBC register values through appropriate macros
- fix condition for extension of struct global_data
Changes for v3:
- added missing commits from v2
Conversion to struct based register access will follow in a sperate patch.
MAINTAINERS|1 +
arch/powerpc/include/asm/global_data.h |3 +
board/gdsys/405ep/405ep.c | 64 +--
board/gdsys/405ep/Makefile |1 +
board/gdsys/405ep/dlvision-10g.c | 243
board/gdsys/405ep/io.c |8 +-
board/gdsys/405ep/iocon.c | 14 +-
board/gdsys/common/Makefile|1 +
board/gdsys/common/fpga.h | 16 ++-
board/gdsys/common/osd.c | 303 +++
board/gdsys/common/osd.h |2 +-
boards.cfg |1 +
include/configs/dlvision-10g.h | 322
include/configs/io.h |7 +-
include/configs/iocon.h| 27 +++-
15 files changed, 907 insertions(+), 106 deletions(-)
create mode 100644 board/gdsys/405ep/dlvision-10g.c
create mode 100644 include/configs/dlvision-10g.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0590ad9..ea882c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -142,6 +142,7 @@ Dirk Eibach eib...@gdsys.de
devconcenterPPC460EX
dlvisionPPC405EP
+ dlvision-10gPPC405EP
gdppc440etx PPC440EP/GR
intip PPC460EX
io PPC405EP
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 2e218de..a33ca2f 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -172,6 +172,9 @@ typedef struct global_data {
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+ unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last;/* trace watch-dog triggering rate */
#endif
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index d3bd233..84ea573 100644
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -26,6 +26,7 @@
#include asm/processor.h
#include asm/io.h
#include asm/ppc4xx-gpio.h
+#include asm/global_data.h
#include ../common/fpga.h
@@ -36,8 +37,29 @@
#define REFLECTION_TESTPATTERN 0xdede
#define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN 0x)
+DECLARE_GLOBAL_DATA_PTR;
+
+int get_fpga_state(unsigned dev)
+{
+ return gd-fpga_state[dev];
+}
+
+void print_fpga_state(unsigned dev)
+{
+ if (gd-fpga_state[dev] FPGA_STATE_DONE_FAILED)
+ puts( Waiting for FPGA-DONE timed out.\n);
+ if (gd-fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
+ puts( FPGA reflection test failed.\n);
+}
+
int board_early_init_f(void)
{
+ unsigned k;
+ unsigned ctr;
+
+ for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k)
+ gd-fpga_state[k] = 0;
+
mtdcr(UIC0SR, 0x); /* clear all ints */
mtdcr(UIC0ER, 0x); /* disable all ints */
mtdcr(UIC0CR, 0x); /* set all to be non-critical */
@@ -66,10 +88,18 @@ int board_early_init_f(void)
/*
* wait for fpga-done
-* fail ungraceful if fpga is not configuring properly
*/
- while (!(in_le16((void *)LATCH2_BASE) 0x0010))
- ;
+ for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k) {
+ ctr = 0;
+ while (!(in_le16((void *)LATCH2_BASE)
+CONFIG_SYS_FPGA_DONE(k))) {
+ udelay(10);
+ if (ctr++ 5) {
+ gd-fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ break;
+ }
+ }
+ }
/*
* setup io-latches for boot (stop reset)
@@ -78,15 +108,25 @@ int board_early_init_f(void)
out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
- /*
-* wait for fpga out of reset
-* fail ungraceful if fpga is not working properly
-*/
- while (1) {
- fpga_set_reg(CONFIG_SYS_FPGA_RFL_LOW, REFLECTION_TESTPATTERN);
- if (fpga_get_reg(CONFIG_SYS_FPGA_RFL_HIGH) ==
-
