Re: [U-Boot] [PATCH v4 1/1] mmc: Add MMC support for stm32h7 Socs

2017-08-18 Thread Jaehoon Chung
Hi Patrice.

On 08/11/2017 11:35 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> This patch adds SD/MMC support for STM32H7 SoCs.
> 
> Here is an extraction of SDMMC main features, embedded in
> STM32H7 SoCs.
> The SD/MMC block include the following:
>  _ Full compliance with MultiMediaCard System Specification
>Version 4.51. Card support for three different databus modes:
>1-bit (default), 4-bit and 8-bit.
>  _ Full compatibility with previous versions of MultiMediaCards
>(backward compatibility).
>  _ Full compliance with SD memory card specifications version 4.1.
>(SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
> SPI mode and UHS-II mode not supported).
>  _ Full compliance with SDIO card specification version 4.0.
>Card support for two different databus modes: 1-bit (default)
>and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
>speed, SPI mode and UHS-II mode not supported).
>  _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
>(depending maximum allowed IO speed).
>  _ Data and command output enable signals to control external
>bidirectional drivers.
> 
> The current version of the SDMMC supports only one SD/SDIO/MMC card
> at any one time and a stack of MMC Version 4.51 or previous.
> 
> Signed-off-by: Christophe Kerello 
> Signed-off-by: Patrice Chotard 
> ---
> v4: _ replace mmc_create() usage by mmc_bind() callback
> _ rename struct stm32_sdmmc2_host to stm32_sdmmc2_priv
> v3: _ use registers offset instead of registers struct description
> _ rename clk_reg_add and pwr_reg_add to respectively clk_reg_msk and 
> pwr_reg_msk
> _ don't exit in error if DT bus-width value is not correct, force it to 1
>   and continue
> v2: _ add .get_cd() callback support
> 
>  drivers/mmc/Kconfig|   8 +
>  drivers/mmc/Makefile   |   1 +
>  drivers/mmc/stm32_sdmmc2.c | 601 
> +
>  3 files changed, 610 insertions(+)
>  create mode 100644 drivers/mmc/stm32_sdmmc2.c
> 
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 82b8d75..6ac7ab2 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -377,6 +377,14 @@ config GENERIC_ATMEL_MCI
> the SD Memory Card Specification V2.0, the SDIO V2.0 specification
> and CE-ATA V1.1.
>  
> +config STM32_SDMMC2
> + bool "STMicroelectronics STM32H7 SD/MMC Host Controller support"
> + depends on DM_MMC && BLK && OF_CONTROL && DM_MMC_OPS
> + help
> +   This selects support for the SD/MMC controller on STM32H7 SoCs.
> +   If you have a board based on such a SoC and with a SD/MMC slot,
> +   say Y or M here.
> +
>  endif
>  
>  config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 2d781c3..2584663 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
>  obj-$(CONFIG_MMC_SANDBOX)+= sandbox_mmc.o
>  obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
>  obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
> +obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
>  
>  # SDHCI
>  obj-$(CONFIG_MMC_SDHCI)  += sdhci.o
> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
> new file mode 100644
> index 000..9ef6b79
> --- /dev/null
> +++ b/drivers/mmc/stm32_sdmmc2.c
> @@ -0,0 +1,601 @@
> +/*
> + * Copyright (C) STMicroelectronics SA 2017
> + * Author(s): Patrice CHOTARD,  for 
> STMicroelectronics.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct stm32_sdmmc2_plat {
> + struct mmc_config cfg;
> + struct mmc mmc;
> +};
> +
> +struct stm32_sdmmc2_priv {
> + fdt_addr_t base;
> + struct clk clk;
> + struct reset_ctl reset_ctl;
> + struct gpio_desc cd_gpio;
> + u32 clk_reg_msk;
> + u32 pwr_reg_msk;
> +};
> +
> +struct stm32_sdmmc2_ctx {
> + u32 cache_start;
> + u32 cache_end;
> + u32 data_length;
> + bool dpsm_abort;
> +};
> +
> +/* SDMMC REGISTERS OFFSET */
> +#define SDMMC_POWER  0x00/* SDMMC power control */
> +#define SDMMC_CLKCR  0x04/* SDMMC clock control */
> +#define SDMMC_ARG0x08/* SDMMC argument  */
> +#define SDMMC_CMD0x0C/* SDMMC command   */
> +#define SDMMC_RESP1  0x14/* SDMMC response 1*/
> +#define SDMMC_RESP2  0x18/* SDMMC response 2*/
> +#define SDMMC_RESP3  0x1C/* SDMMC response 3*/
> +#define SDMMC_RESP4  0x20/* SDMMC response 4*/
> +#define SDMMC_DTIMER 0x24/* SDMMC data timer*/
> +#define 

Re: [U-Boot] [PATCH v4 1/1] mmc: Add MMC support for stm32h7 Socs

2017-08-13 Thread Simon Glass
On 11 August 2017 at 08:35,   wrote:
> From: Patrice Chotard 
>
> This patch adds SD/MMC support for STM32H7 SoCs.
>
> Here is an extraction of SDMMC main features, embedded in
> STM32H7 SoCs.
> The SD/MMC block include the following:
>  _ Full compliance with MultiMediaCard System Specification
>Version 4.51. Card support for three different databus modes:
>1-bit (default), 4-bit and 8-bit.
>  _ Full compatibility with previous versions of MultiMediaCards
>(backward compatibility).
>  _ Full compliance with SD memory card specifications version 4.1.
>(SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
> SPI mode and UHS-II mode not supported).
>  _ Full compliance with SDIO card specification version 4.0.
>Card support for two different databus modes: 1-bit (default)
>and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
>speed, SPI mode and UHS-II mode not supported).
>  _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
>(depending maximum allowed IO speed).
>  _ Data and command output enable signals to control external
>bidirectional drivers.
>
> The current version of the SDMMC supports only one SD/SDIO/MMC card
> at any one time and a stack of MMC Version 4.51 or previous.
>
> Signed-off-by: Christophe Kerello 
> Signed-off-by: Patrice Chotard 
> ---
> v4: _ replace mmc_create() usage by mmc_bind() callback
> _ rename struct stm32_sdmmc2_host to stm32_sdmmc2_priv
> v3: _ use registers offset instead of registers struct description
> _ rename clk_reg_add and pwr_reg_add to respectively clk_reg_msk and 
> pwr_reg_msk
> _ don't exit in error if DT bus-width value is not correct, force it to 1
>   and continue
> v2: _ add .get_cd() callback support
>
>  drivers/mmc/Kconfig|   8 +
>  drivers/mmc/Makefile   |   1 +
>  drivers/mmc/stm32_sdmmc2.c | 601 
> +
>  3 files changed, 610 insertions(+)
>  create mode 100644 drivers/mmc/stm32_sdmmc2.c

Reviewed-by: Simon Glass 
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[U-Boot] [PATCH v4 1/1] mmc: Add MMC support for stm32h7 Socs

2017-08-11 Thread patrice.chotard
From: Patrice Chotard 

This patch adds SD/MMC support for STM32H7 SoCs.

Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
 _ Full compliance with MultiMediaCard System Specification
   Version 4.51. Card support for three different databus modes:
   1-bit (default), 4-bit and 8-bit.
 _ Full compatibility with previous versions of MultiMediaCards
   (backward compatibility).
 _ Full compliance with SD memory card specifications version 4.1.
   (SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
SPI mode and UHS-II mode not supported).
 _ Full compliance with SDIO card specification version 4.0.
   Card support for two different databus modes: 1-bit (default)
   and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
   speed, SPI mode and UHS-II mode not supported).
 _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
   (depending maximum allowed IO speed).
 _ Data and command output enable signals to control external
   bidirectional drivers.

The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.

Signed-off-by: Christophe Kerello 
Signed-off-by: Patrice Chotard 
---
v4: _ replace mmc_create() usage by mmc_bind() callback
_ rename struct stm32_sdmmc2_host to stm32_sdmmc2_priv
v3: _ use registers offset instead of registers struct description
_ rename clk_reg_add and pwr_reg_add to respectively clk_reg_msk and 
pwr_reg_msk
_ don't exit in error if DT bus-width value is not correct, force it to 1
  and continue
v2: _ add .get_cd() callback support

 drivers/mmc/Kconfig|   8 +
 drivers/mmc/Makefile   |   1 +
 drivers/mmc/stm32_sdmmc2.c | 601 +
 3 files changed, 610 insertions(+)
 create mode 100644 drivers/mmc/stm32_sdmmc2.c

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 82b8d75..6ac7ab2 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -377,6 +377,14 @@ config GENERIC_ATMEL_MCI
  the SD Memory Card Specification V2.0, the SDIO V2.0 specification
  and CE-ATA V1.1.
 
+config STM32_SDMMC2
+   bool "STMicroelectronics STM32H7 SD/MMC Host Controller support"
+   depends on DM_MMC && BLK && OF_CONTROL && DM_MMC_OPS
+   help
+ This selects support for the SD/MMC controller on STM32H7 SoCs.
+ If you have a board based on such a SoC and with a SD/MMC slot,
+ say Y or M here.
+
 endif
 
 config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 2d781c3..2584663 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
 obj-$(CONFIG_MMC_SANDBOX)  += sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
+obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)+= sdhci.o
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
new file mode 100644
index 000..9ef6b79
--- /dev/null
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD,  for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct stm32_sdmmc2_plat {
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+
+struct stm32_sdmmc2_priv {
+   fdt_addr_t base;
+   struct clk clk;
+   struct reset_ctl reset_ctl;
+   struct gpio_desc cd_gpio;
+   u32 clk_reg_msk;
+   u32 pwr_reg_msk;
+};
+
+struct stm32_sdmmc2_ctx {
+   u32 cache_start;
+   u32 cache_end;
+   u32 data_length;
+   bool dpsm_abort;
+};
+
+/* SDMMC REGISTERS OFFSET */
+#define SDMMC_POWER0x00/* SDMMC power control */
+#define SDMMC_CLKCR0x04/* SDMMC clock control */
+#define SDMMC_ARG  0x08/* SDMMC argument  */
+#define SDMMC_CMD  0x0C/* SDMMC command   */
+#define SDMMC_RESP10x14/* SDMMC response 1*/
+#define SDMMC_RESP20x18/* SDMMC response 2*/
+#define SDMMC_RESP30x1C/* SDMMC response 3*/
+#define SDMMC_RESP40x20/* SDMMC response 4*/
+#define SDMMC_DTIMER   0x24/* SDMMC data timer*/
+#define SDMMC_DLEN 0x28/* SDMMC data length   */
+#define SDMMC_DCTRL0x2C/* SDMMC data control  */
+#define SDMMC_DCOUNT   0x30/* SDMMC data counter  */
+#define SDMMC_STA  0x34/* SDMMC status