Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-12-22 Thread Fabio Estevam 
Hi Ye Li,

On Wed, Nov 5, 2014 at 6:33 AM, Li Ye-B37916 b37...@freescale.com wrote:

 Why not use power_init_board()?
 It's dedicated and called at common/board_r.c.

 Good suggestion, will change to use the power_init_board in v2.

Have you had a chance to send a v2 for this series?

I still don't see this patch applied.

Thanks
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-05 Thread Li Ye-B37916 
Hi Przemyslaw,

On 11/4/2014 10:09 PM, Przemyslaw Marczak wrote:
 Hello Ye Li,

 On 11/04/2014 10:37 AM, Li Ye-B37916 wrote:

 Hi Przemyslaw,

 On 11/4/2014 5:24 PM, Li Ye-B37916 wrote:
 Hi Przemyslaw,


 On 10/30/2014 6:36 PM, Stefano Babic wrote:
 Hi Ye,

 On 10/09/2014 11:08, Ye.Li wrote:
 Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
 has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

 Signed-off-by: Ye.Li b37...@freescale.com
 ---
 Slowly (sorry for that..) I am checking again all PMIC related patches
 you sent last month. However, these patches do not fit very well in the
 current development.

 In the last U-Boot mini summit we get the decision to post new PMIC
 drivers according to the Device Model rules. Przemyslaw is the new
 custodian for PMICs, and he will take care of all related issues
 regarding power management.
 Can you share me more information about the new PMIC drivers development 
 that Stefano mentioned above.
 1. Have you completed the APIs define for new PMIC drivers?  If yes, where 
 I can get them.
 2. When will the new PMIC drivers deliver?
 3. Will the PMIC devices already supported in current release stay 
 supported by new PMIC drivers?


 The work on new PMIC framework was temporary on hold.
 Now I'm working on it, but the basic functionality is actually done.
 The first version you can check here:
 https://github.com/bobenstein/u-boot.git
 I need to make some rework, since the i2c is going to support the driver 
 model.

 I can now focus on this work. And this will be merged through u-boot-dm - 
 since i2c support is added.

 The plan is simple:
 1) Add new drivers to the present PMIC framework - before merge the new one.
 2) Add new PMIC framework as a separated piece of code.
 3) Migrate old drivers and boards to the new framework.
 4) Remove the old framework without any conflicts.

 So it's not a problem if you want add this driver, we add this to the current 
 framework - the migration should be simple and will not cause conflicts.

 If you are interested in the new PMIC framework design, please read the doc 
 file added by the patches from the link above.

 You can implement just one class(UCLASS_PMIC), and if you need user friendly 
 interface it is welcome to implement also UCLASS_PMIC_REGULATOR.

 Please follow the list, maybe I will send the patches at the end of this week.

 ... [ snip ] ...


 Best regards,

My patches don't add any new PMIC driver. The PFUZE100 driver already exists in 
present u-boot.  We just call the driver to apply new settings for PFUZE100.
According to your plan, can you help to figure out which phase the PMIC 
development is at now?   I feel my patches won't conflict with your job before 
phase 3. 
If there is no conflict, I will continue the upstream.

Best regards,
Ye Li

.
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-05 Thread Li Ye-B37916 
Hi Przemyslaw,

On 11/4/2014 11:56 PM, Przemyslaw Marczak wrote:
 Hello Ye Li,

 On 09/10/2014 11:08 AM, Ye.Li wrote:
 Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
 has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

 Signed-off-by: Ye.Li b37...@freescale.com
 ---
   board/freescale/mx6slevk/mx6slevk.c |   57 
 +++
   include/configs/mx6slevk.h  |7 
   2 files changed, 64 insertions(+), 0 deletions(-)

 diff --git a/board/freescale/mx6slevk/mx6slevk.c 
 b/board/freescale/mx6slevk/mx6slevk.c
 index fedd5c3..8b6a79c 100644
 --- a/board/freescale/mx6slevk/mx6slevk.c
 +++ b/board/freescale/mx6slevk/mx6slevk.c
 @@ -21,6 +21,8 @@
   #include mmc.h
   #include netdev.h
   #include i2c.h
 +#include power/pmic.h
 +#include power/pfuze100_pmic.h

   DECLARE_GLOBAL_DATA_PTR;

 @@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;

   #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)

 +#define I2C_PMIC0
 +
   /* I2C1 for PMIC */
   struct i2c_pads_info i2c_pad_info0 = {
   .sda = {
 @@ -191,6 +195,59 @@ int board_init(void)
   return 0;
   }

 +static int pfuze_init(void)
 +{
 +struct pmic *p;
 +int ret;
 +unsigned int reg;
 +
 +ret = power_pfuze100_init(I2C_PMIC);
 +if (ret)
 +return ret;
 +
 +p = pmic_get(PFUZE100);
 +ret = pmic_probe(p);
 +if (ret)
 +return ret;
 +
 +pmic_reg_read(p, PFUZE100_DEVICEID, reg);
 +printf(PMIC:  PFUZE%s ID=0x%02x\n,
 +((reg  0xf) == 0) ? 100 : 200, reg);
 +
 +/* Set SW1AB stanby volage to 0.975V */
 +pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
 +reg = ~0x3f;
 +reg |= 0x1b;
 +pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
 +
 +/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
 +pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
 +reg = ~0xc0;
 +reg |= 0x40;
 +pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
 +
 +/* Set SW1C standby voltage to 0.975V */
 +pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
 +reg = ~0x3f;
 +reg |= 0x1b;
 +pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
 +
 +/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
 +pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
 +reg = ~0xc0;
 +reg |= 0x40;
 +pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
 +
 +return 0;
 +}
 +
 +int board_late_init(void)
 +{
 +pfuze_init();
 +
 +return 0;
 +}

 Why not use power_init_board()?
 It's dedicated and called at common/board_r.c.

Good suggestion, will change to use the power_init_board in v2.

 +
   u32 get_board_rev(void)
   {
   return get_cpu_rev();
 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
 index bf5066f..09d0896 100644
 --- a/include/configs/mx6slevk.h
 +++ b/include/configs/mx6slevk.h
 @@ -30,6 +30,7 @@
   #define CONFIG_SYS_MALLOC_LEN(3 * SZ_1M)

   #define CONFIG_BOARD_EARLY_INIT_F
 +#define CONFIG_BOARD_LATE_INIT
   #define CONFIG_MXC_GPIO

   #define CONFIG_MXC_UART
 @@ -66,6 +67,12 @@
   #define CONFIG_SYS_I2C_MXC
   #define CONFIG_SYS_I2C_SPEED  10

 +/* PMIC */
 +#define CONFIG_POWER
 +#define CONFIG_POWER_I2C
 +#define CONFIG_POWER_PFUZE100
 +#define CONFIG_POWER_PFUZE100_I2C_ADDR0x08

 I assume that the I2C addr is const, if yes then it should be moved to the 
 PFUZE100 header.

It is not const. The default I2C address is 0x08.  But it can be programmed 
from 0x08 to 0x0F by setting
OTP_I2C_ADDR register.

 +
   /* allow to overwrite serial and ethaddr */
   #define CONFIG_ENV_OVERWRITE
   #define CONFIG_CONS_INDEX1


 Thank you,

Best regards,
Ye Li
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-05 Thread Przemyslaw Marczak 

Hello Ye Li,

On 11/05/2014 09:28 AM, Li Ye-B37916 wrote:

Hi Przemyslaw,

On 11/4/2014 10:09 PM, Przemyslaw Marczak wrote:

Hello Ye Li,

On 11/04/2014 10:37 AM, Li Ye-B37916 wrote:


Hi Przemyslaw,

On 11/4/2014 5:24 PM, Li Ye-B37916 wrote:

Hi Przemyslaw,


On 10/30/2014 6:36 PM, Stefano Babic wrote:

Hi Ye,

On 10/09/2014 11:08, Ye.Li wrote:

Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

Signed-off-by: Ye.Li b37...@freescale.com
---

Slowly (sorry for that..) I am checking again all PMIC related patches
you sent last month. However, these patches do not fit very well in the
current development.

In the last U-Boot mini summit we get the decision to post new PMIC
drivers according to the Device Model rules. Przemyslaw is the new
custodian for PMICs, and he will take care of all related issues
regarding power management.

Can you share me more information about the new PMIC drivers development that 
Stefano mentioned above.
1. Have you completed the APIs define for new PMIC drivers?  If yes, where I 
can get them.
2. When will the new PMIC drivers deliver?
3. Will the PMIC devices already supported in current release stay supported by 
new PMIC drivers?



The work on new PMIC framework was temporary on hold.
Now I'm working on it, but the basic functionality is actually done.
The first version you can check here:
https://github.com/bobenstein/u-boot.git
I need to make some rework, since the i2c is going to support the driver model.

I can now focus on this work. And this will be merged through u-boot-dm - since 
i2c support is added.

The plan is simple:
1) Add new drivers to the present PMIC framework - before merge the new one.
2) Add new PMIC framework as a separated piece of code.
3) Migrate old drivers and boards to the new framework.
4) Remove the old framework without any conflicts.

So it's not a problem if you want add this driver, we add this to the current 
framework - the migration should be simple and will not cause conflicts.

If you are interested in the new PMIC framework design, please read the doc 
file added by the patches from the link above.

You can implement just one class(UCLASS_PMIC), and if you need user friendly 
interface it is welcome to implement also UCLASS_PMIC_REGULATOR.

Please follow the list, maybe I will send the patches at the end of this week.

... [ snip ] ...


Best regards,


My patches don't add any new PMIC driver. The PFUZE100 driver already exists in 
present u-boot.  We just call the driver to apply new settings for PFUZE100.
According to your plan, can you help to figure out which phase the PMIC 
development is at now?   I feel my patches won't conflict with your job before 
phase 3.
If there is no conflict, I will continue the upstream.

Best regards,
Ye Li

.



Ok, so the code from github link(also can be found on the list), adds 
API for two PMIC uclasses: PMIC and REGULATOR - both are implemented by

MAX77686 driver and enabled for Trats2 and Odroid boards.
It was RFC patchset, but is fully functional. It's hard to say when 
exactly I can send next version - it's not the only task.

There are no conflicts, so please continue your work.

Best Regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-05 Thread Przemyslaw Marczak 

Hello,

On 11/05/2014 09:33 AM, Li Ye-B37916 wrote:

Hi Przemyslaw,

On 11/4/2014 11:56 PM, Przemyslaw Marczak wrote:

Hello Ye Li,

On 09/10/2014 11:08 AM, Ye.Li wrote:

Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

Signed-off-by: Ye.Li b37...@freescale.com
---
   board/freescale/mx6slevk/mx6slevk.c |   57 
+++
   include/configs/mx6slevk.h  |7 
   2 files changed, 64 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6slevk/mx6slevk.c 
b/board/freescale/mx6slevk/mx6slevk.c
index fedd5c3..8b6a79c 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -21,6 +21,8 @@
   #include mmc.h
   #include netdev.h
   #include i2c.h
+#include power/pmic.h
+#include power/pfuze100_pmic.h

   DECLARE_GLOBAL_DATA_PTR;

@@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;

   #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)

+#define I2C_PMIC0
+
   /* I2C1 for PMIC */
   struct i2c_pads_info i2c_pad_info0 = {
   .sda = {
@@ -191,6 +195,59 @@ int board_init(void)
   return 0;
   }

+static int pfuze_init(void)
+{
+struct pmic *p;
+int ret;
+unsigned int reg;
+
+ret = power_pfuze100_init(I2C_PMIC);
+if (ret)
+return ret;
+
+p = pmic_get(PFUZE100);
+ret = pmic_probe(p);
+if (ret)
+return ret;
+
+pmic_reg_read(p, PFUZE100_DEVICEID, reg);
+printf(PMIC:  PFUZE%s ID=0x%02x\n,
+((reg  0xf) == 0) ? 100 : 200, reg);
+
+/* Set SW1AB stanby volage to 0.975V */
+pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
+reg = ~0x3f;
+reg |= 0x1b;
+pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
+
+/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
+reg = ~0xc0;
+reg |= 0x40;
+pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
+
+/* Set SW1C standby voltage to 0.975V */
+pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
+reg = ~0x3f;
+reg |= 0x1b;
+pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
+
+/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
+reg = ~0xc0;
+reg |= 0x40;
+pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
+
+return 0;
+}
+
+int board_late_init(void)
+{
+pfuze_init();
+
+return 0;
+}


Why not use power_init_board()?
It's dedicated and called at common/board_r.c.


Good suggestion, will change to use the power_init_board in v2.



The power_init_board is called much more earlier, then please make sure 
that everything will work for you.



+
   u32 get_board_rev(void)
   {
   return get_cpu_rev();
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index bf5066f..09d0896 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -30,6 +30,7 @@
   #define CONFIG_SYS_MALLOC_LEN(3 * SZ_1M)

   #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
   #define CONFIG_MXC_GPIO

   #define CONFIG_MXC_UART
@@ -66,6 +67,12 @@
   #define CONFIG_SYS_I2C_MXC
   #define CONFIG_SYS_I2C_SPEED  10

+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR0x08


I assume that the I2C addr is const, if yes then it should be moved to the 
PFUZE100 header.


It is not const. The default I2C address is 0x08.  But it can be programmed 
from 0x08 to 0x0F by setting
OTP_I2C_ADDR register.



Yes, so the PMIC header is a good place for the default definitions. But 
I see that each board defines the same address for it. So leave it as it 
is.



+
   /* allow to overwrite serial and ethaddr */
   #define CONFIG_ENV_OVERWRITE
   #define CONFIG_CONS_INDEX1



Thank you,


Best regards,
Ye Li



Best regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-04 Thread Li Ye-B37916 
Hi Przemyslaw,


On 10/30/2014 6:36 PM, Stefano Babic wrote:
 Hi Ye,

 On 10/09/2014 11:08, Ye.Li wrote:
 Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
 has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

 Signed-off-by: Ye.Li b37...@freescale.com
 ---
 Slowly (sorry for that..) I am checking again all PMIC related patches
 you sent last month. However, these patches do not fit very well in the
 current development.

 In the last U-Boot mini summit we get the decision to post new PMIC
 drivers according to the Device Model rules. Przemyslaw is the new
 custodian for PMICs, and he will take care of all related issues
 regarding power management.

Can you share me more information about the new PMIC drivers development that 
Stefano mentioned above.
1. Have you completed the APIs define for new PMIC drivers?  If yes, where I 
can get them.
2. When will the new PMIC drivers deliver?
3. Will the PMIC devices already supported in current release stay supported by 
new PMIC drivers?

Best regards,
Ye Li
 Please rethink your patches and post them again, not forgetting to add
 Przemyslaw in CC.

 Best regards,
 Stefano Babic

  board/freescale/mx6slevk/mx6slevk.c |   57 
 +++
  include/configs/mx6slevk.h  |7 
  2 files changed, 64 insertions(+), 0 deletions(-)

 diff --git a/board/freescale/mx6slevk/mx6slevk.c 
 b/board/freescale/mx6slevk/mx6slevk.c
 index fedd5c3..8b6a79c 100644
 --- a/board/freescale/mx6slevk/mx6slevk.c
 +++ b/board/freescale/mx6slevk/mx6slevk.c
 @@ -21,6 +21,8 @@
  #include mmc.h
  #include netdev.h
  #include i2c.h
 +#include power/pmic.h
 +#include power/pfuze100_pmic.h
  
  DECLARE_GLOBAL_DATA_PTR;
  
 @@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;
  
  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  
 +#define I2C_PMIC0
 +
  /* I2C1 for PMIC */
  struct i2c_pads_info i2c_pad_info0 = {
  .sda = {
 @@ -191,6 +195,59 @@ int board_init(void)
  return 0;
  }
  
 +static int pfuze_init(void)
 +{
 +struct pmic *p;
 +int ret;
 +unsigned int reg;
 +
 +ret = power_pfuze100_init(I2C_PMIC);
 +if (ret)
 +return ret;
 +
 +p = pmic_get(PFUZE100);
 +ret = pmic_probe(p);
 +if (ret)
 +return ret;
 +
 +pmic_reg_read(p, PFUZE100_DEVICEID, reg);
 +printf(PMIC:  PFUZE%s ID=0x%02x\n,
 +((reg  0xf) == 0) ? 100 : 200, reg);
 +
 +/* Set SW1AB stanby volage to 0.975V */
 +pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
 +reg = ~0x3f;
 +reg |= 0x1b;
 +pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
 +
 +/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
 +pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
 +reg = ~0xc0;
 +reg |= 0x40;
 +pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
 +
 +/* Set SW1C standby voltage to 0.975V */
 +pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
 +reg = ~0x3f;
 +reg |= 0x1b;
 +pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
 +
 +/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
 +pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
 +reg = ~0xc0;
 +reg |= 0x40;
 +pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
 +
 +return 0;
 +}
 +
 +int board_late_init(void)
 +{
 +pfuze_init();
 +
 +return 0;
 +}
 +
  u32 get_board_rev(void)
  {
  return get_cpu_rev();
 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
 index bf5066f..09d0896 100644
 --- a/include/configs/mx6slevk.h
 +++ b/include/configs/mx6slevk.h
 @@ -30,6 +30,7 @@
  #define CONFIG_SYS_MALLOC_LEN   (3 * SZ_1M)
  
  #define CONFIG_BOARD_EARLY_INIT_F
 +#define CONFIG_BOARD_LATE_INIT
  #define CONFIG_MXC_GPIO
  
  #define CONFIG_MXC_UART
 @@ -66,6 +67,12 @@
  #define CONFIG_SYS_I2C_MXC
  #define CONFIG_SYS_I2C_SPEED  10
  
 +/* PMIC */
 +#define CONFIG_POWER
 +#define CONFIG_POWER_I2C
 +#define CONFIG_POWER_PFUZE100
 +#define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
 +
  /* allow to overwrite serial and ethaddr */
  #define CONFIG_ENV_OVERWRITE
  #define CONFIG_CONS_INDEX   1



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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-04 Thread Li Ye-B37916 

Hi Przemyslaw,

On 11/4/2014 5:24 PM, Li Ye-B37916 wrote:
 Hi Przemyslaw,


 On 10/30/2014 6:36 PM, Stefano Babic wrote:
 Hi Ye,

 On 10/09/2014 11:08, Ye.Li wrote:
 Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
 has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

 Signed-off-by: Ye.Li b37...@freescale.com
 ---
 Slowly (sorry for that..) I am checking again all PMIC related patches
 you sent last month. However, these patches do not fit very well in the
 current development.

 In the last U-Boot mini summit we get the decision to post new PMIC
 drivers according to the Device Model rules. Przemyslaw is the new
 custodian for PMICs, and he will take care of all related issues
 regarding power management.
 Can you share me more information about the new PMIC drivers development that 
 Stefano mentioned above.
 1. Have you completed the APIs define for new PMIC drivers?  If yes, where I 
 can get them.
 2. When will the new PMIC drivers deliver?
 3. Will the PMIC devices already supported in current release stay supported 
 by new PMIC drivers?

 Best regards,
 Ye Li
 Please rethink your patches and post them again, not forgetting to add
 Przemyslaw in CC.

 Best regards,
 Stefano Babic

  board/freescale/mx6slevk/mx6slevk.c |   57 
 +++
  include/configs/mx6slevk.h  |7 
  2 files changed, 64 insertions(+), 0 deletions(-)

 diff --git a/board/freescale/mx6slevk/mx6slevk.c 
 b/board/freescale/mx6slevk/mx6slevk.c
 index fedd5c3..8b6a79c 100644
 --- a/board/freescale/mx6slevk/mx6slevk.c
 +++ b/board/freescale/mx6slevk/mx6slevk.c
 @@ -21,6 +21,8 @@
  #include mmc.h
  #include netdev.h
  #include i2c.h
 +#include power/pmic.h
 +#include power/pfuze100_pmic.h
  
  DECLARE_GLOBAL_DATA_PTR;
  
 @@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;
  
  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  
 +#define I2C_PMIC   0
 +
  /* I2C1 for PMIC */
  struct i2c_pads_info i2c_pad_info0 = {
 .sda = {
 @@ -191,6 +195,59 @@ int board_init(void)
 return 0;
  }
  
 +static int pfuze_init(void)
 +{
 +   struct pmic *p;
 +   int ret;
 +   unsigned int reg;
 +
 +   ret = power_pfuze100_init(I2C_PMIC);
 +   if (ret)
 +   return ret;
 +
 +   p = pmic_get(PFUZE100);
 +   ret = pmic_probe(p);
 +   if (ret)
 +   return ret;
 +
 +   pmic_reg_read(p, PFUZE100_DEVICEID, reg);
 +   printf(PMIC:  PFUZE%s ID=0x%02x\n,
 +   ((reg  0xf) == 0) ? 100 : 200, reg);
 +
 +   /* Set SW1AB stanby volage to 0.975V */
 +   pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
 +   reg = ~0x3f;
 +   reg |= 0x1b;
 +   pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
 +
 +   /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
 +   pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
 +   reg = ~0xc0;
 +   reg |= 0x40;
 +   pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
 +
 +   /* Set SW1C standby voltage to 0.975V */
 +   pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
 +   reg = ~0x3f;
 +   reg |= 0x1b;
 +   pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
 +
 +   /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
 +   pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
 +   reg = ~0xc0;
 +   reg |= 0x40;
 +   pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
 +
 +   return 0;
 +}
 +
 +int board_late_init(void)
 +{
 +   pfuze_init();
 +
 +   return 0;
 +}
 +
  u32 get_board_rev(void)
  {
 return get_cpu_rev();
 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
 index bf5066f..09d0896 100644
 --- a/include/configs/mx6slevk.h
 +++ b/include/configs/mx6slevk.h
 @@ -30,6 +30,7 @@
  #define CONFIG_SYS_MALLOC_LEN  (3 * SZ_1M)
  
  #define CONFIG_BOARD_EARLY_INIT_F
 +#define CONFIG_BOARD_LATE_INIT
  #define CONFIG_MXC_GPIO
  
  #define CONFIG_MXC_UART
 @@ -66,6 +67,12 @@
  #define CONFIG_SYS_I2C_MXC
  #define CONFIG_SYS_I2C_SPEED 10
  
 +/* PMIC */
 +#define CONFIG_POWER
 +#define CONFIG_POWER_I2C
 +#define CONFIG_POWER_PFUZE100
 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
 +
  /* allow to overwrite serial and ethaddr */
  #define CONFIG_ENV_OVERWRITE
  #define CONFIG_CONS_INDEX  1


Please help to answer my questions in the emails thread.  A incorrect email 
address was given, so I resend the email now.

Best regards,
Ye Li
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-04 Thread Przemyslaw Marczak 

Hello Ye Li,

On 11/04/2014 10:37 AM, Li Ye-B37916 wrote:


Hi Przemyslaw,

On 11/4/2014 5:24 PM, Li Ye-B37916 wrote:

Hi Przemyslaw,


On 10/30/2014 6:36 PM, Stefano Babic wrote:

Hi Ye,

On 10/09/2014 11:08, Ye.Li wrote:

Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

Signed-off-by: Ye.Li b37...@freescale.com
---

Slowly (sorry for that..) I am checking again all PMIC related patches
you sent last month. However, these patches do not fit very well in the
current development.

In the last U-Boot mini summit we get the decision to post new PMIC
drivers according to the Device Model rules. Przemyslaw is the new
custodian for PMICs, and he will take care of all related issues
regarding power management.

Can you share me more information about the new PMIC drivers development that 
Stefano mentioned above.
1. Have you completed the APIs define for new PMIC drivers?  If yes, where I 
can get them.
2. When will the new PMIC drivers deliver?
3. Will the PMIC devices already supported in current release stay supported by 
new PMIC drivers?



The work on new PMIC framework was temporary on hold.
Now I'm working on it, but the basic functionality is actually done.
The first version you can check here:
https://github.com/bobenstein/u-boot.git
I need to make some rework, since the i2c is going to support the driver 
model.


I can now focus on this work. And this will be merged through u-boot-dm 
- since i2c support is added.


The plan is simple:
1) Add new drivers to the present PMIC framework - before merge the new one.
2) Add new PMIC framework as a separated piece of code.
3) Migrate old drivers and boards to the new framework.
4) Remove the old framework without any conflicts.

So it's not a problem if you want add this driver, we add this to the 
current framework - the migration should be simple and will not cause 
conflicts.


If you are interested in the new PMIC framework design, please read the 
doc file added by the patches from the link above.


You can implement just one class(UCLASS_PMIC), and if you need user 
friendly interface it is welcome to implement also UCLASS_PMIC_REGULATOR.


Please follow the list, maybe I will send the patches at the end of this 
week.


... [ snip ] ...


Best regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-11-04 Thread Przemyslaw Marczak 

Hello Ye Li,

On 09/10/2014 11:08 AM, Ye.Li wrote:

Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
has Pfuze100 or Pfuze200, print the chip type by parsing the ID.

Signed-off-by: Ye.Li b37...@freescale.com
---
  board/freescale/mx6slevk/mx6slevk.c |   57 +++
  include/configs/mx6slevk.h  |7 
  2 files changed, 64 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6slevk/mx6slevk.c 
b/board/freescale/mx6slevk/mx6slevk.c
index fedd5c3..8b6a79c 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -21,6 +21,8 @@
  #include mmc.h
  #include netdev.h
  #include i2c.h
+#include power/pmic.h
+#include power/pfuze100_pmic.h

  DECLARE_GLOBAL_DATA_PTR;

@@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;

  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)

+#define I2C_PMIC   0
+
  /* I2C1 for PMIC */
  struct i2c_pads_info i2c_pad_info0 = {
.sda = {
@@ -191,6 +195,59 @@ int board_init(void)
return 0;
  }

+static int pfuze_init(void)
+{
+   struct pmic *p;
+   int ret;
+   unsigned int reg;
+
+   ret = power_pfuze100_init(I2C_PMIC);
+   if (ret)
+   return ret;
+
+   p = pmic_get(PFUZE100);
+   ret = pmic_probe(p);
+   if (ret)
+   return ret;
+
+   pmic_reg_read(p, PFUZE100_DEVICEID, reg);
+   printf(PMIC:  PFUZE%s ID=0x%02x\n,
+   ((reg  0xf) == 0) ? 100 : 200, reg);
+
+   /* Set SW1AB stanby volage to 0.975V */
+   pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
+   reg = ~0x3f;
+   reg |= 0x1b;
+   pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
+
+   /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+   pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
+   reg = ~0xc0;
+   reg |= 0x40;
+   pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
+
+   /* Set SW1C standby voltage to 0.975V */
+   pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
+   reg = ~0x3f;
+   reg |= 0x1b;
+   pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
+
+   /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+   pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
+   reg = ~0xc0;
+   reg |= 0x40;
+   pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
+
+   return 0;
+}
+
+int board_late_init(void)
+{
+   pfuze_init();
+
+   return 0;
+}


Why not use power_init_board()?
It's dedicated and called at common/board_r.c.


+
  u32 get_board_rev(void)
  {
return get_cpu_rev();
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index bf5066f..09d0896 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -30,6 +30,7 @@
  #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)

  #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
  #define CONFIG_MXC_GPIO

  #define CONFIG_MXC_UART
@@ -66,6 +67,12 @@
  #define CONFIG_SYS_I2C_MXC
  #define CONFIG_SYS_I2C_SPEED10

+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE100
+#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08


I assume that the I2C addr is const, if yes then it should be moved to 
the PFUZE100 header.



+
  /* allow to overwrite serial and ethaddr */
  #define CONFIG_ENV_OVERWRITE
  #define CONFIG_CONS_INDEX 1



Thank you,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 2/4] imx: mx6slevk: Add PMIC Pfuze support

2014-10-30 Thread Stefano Babic 
Hi Ye,

On 10/09/2014 11:08, Ye.Li wrote:
 Initialize the Pfuze on I2C1 at board late init. The mx6slevk board
 has Pfuze100 or Pfuze200, print the chip type by parsing the ID.
 
 Signed-off-by: Ye.Li b37...@freescale.com
 ---

Slowly (sorry for that..) I am checking again all PMIC related patches
you sent last month. However, these patches do not fit very well in the
current development.

In the last U-Boot mini summit we get the decision to post new PMIC
drivers according to the Device Model rules. Przemyslaw is the new
custodian for PMICs, and he will take care of all related issues
regarding power management.

Please rethink your patches and post them again, not forgetting to add
Przemyslaw in CC.

Best regards,
Stefano Babic


  board/freescale/mx6slevk/mx6slevk.c |   57 
 +++
  include/configs/mx6slevk.h  |7 
  2 files changed, 64 insertions(+), 0 deletions(-)
 
 diff --git a/board/freescale/mx6slevk/mx6slevk.c 
 b/board/freescale/mx6slevk/mx6slevk.c
 index fedd5c3..8b6a79c 100644
 --- a/board/freescale/mx6slevk/mx6slevk.c
 +++ b/board/freescale/mx6slevk/mx6slevk.c
 @@ -21,6 +21,8 @@
  #include mmc.h
  #include netdev.h
  #include i2c.h
 +#include power/pmic.h
 +#include power/pfuze100_pmic.h
  
  DECLARE_GLOBAL_DATA_PTR;
  
 @@ -48,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR;
  
  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  
 +#define I2C_PMIC 0
 +
  /* I2C1 for PMIC */
  struct i2c_pads_info i2c_pad_info0 = {
   .sda = {
 @@ -191,6 +195,59 @@ int board_init(void)
   return 0;
  }
  
 +static int pfuze_init(void)
 +{
 + struct pmic *p;
 + int ret;
 + unsigned int reg;
 +
 + ret = power_pfuze100_init(I2C_PMIC);
 + if (ret)
 + return ret;
 +
 + p = pmic_get(PFUZE100);
 + ret = pmic_probe(p);
 + if (ret)
 + return ret;
 +
 + pmic_reg_read(p, PFUZE100_DEVICEID, reg);
 + printf(PMIC:  PFUZE%s ID=0x%02x\n,
 + ((reg  0xf) == 0) ? 100 : 200, reg);
 +
 + /* Set SW1AB stanby volage to 0.975V */
 + pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
 + reg = ~0x3f;
 + reg |= 0x1b;
 + pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
 +
 + /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
 + pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
 + reg = ~0xc0;
 + reg |= 0x40;
 + pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
 +
 + /* Set SW1C standby voltage to 0.975V */
 + pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
 + reg = ~0x3f;
 + reg |= 0x1b;
 + pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
 +
 + /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
 + pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
 + reg = ~0xc0;
 + reg |= 0x40;
 + pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
 +
 + return 0;
 +}
 +
 +int board_late_init(void)
 +{
 + pfuze_init();
 +
 + return 0;
 +}
 +
  u32 get_board_rev(void)
  {
   return get_cpu_rev();
 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
 index bf5066f..09d0896 100644
 --- a/include/configs/mx6slevk.h
 +++ b/include/configs/mx6slevk.h
 @@ -30,6 +30,7 @@
  #define CONFIG_SYS_MALLOC_LEN(3 * SZ_1M)
  
  #define CONFIG_BOARD_EARLY_INIT_F
 +#define CONFIG_BOARD_LATE_INIT
  #define CONFIG_MXC_GPIO
  
  #define CONFIG_MXC_UART
 @@ -66,6 +67,12 @@
  #define CONFIG_SYS_I2C_MXC
  #define CONFIG_SYS_I2C_SPEED   10
  
 +/* PMIC */
 +#define CONFIG_POWER
 +#define CONFIG_POWER_I2C
 +#define CONFIG_POWER_PFUZE100
 +#define CONFIG_POWER_PFUZE100_I2C_ADDR   0x08
 +
  /* allow to overwrite serial and ethaddr */
  #define CONFIG_ENV_OVERWRITE
  #define CONFIG_CONS_INDEX1
 


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