Re: [U-Boot] [PATCH 4/9] arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1

2016-09-19 Thread Chin Liang See 
On Mon, 2016-09-19 at 16:24 +0200, Marek Vasut wrote:
> On 09/15/2016 09:27 AM, Chin Liang See wrote:
> > Adding new handoff for SDRAM ctrcfg.extratime1 which is
> > required for stabil LPDDR2 operation
> 
> Same comment as 2/9 applies to the rest


Yup, we just need 1/9.

Thanks
Chin Liang


> 
> > Signed-off-by: Chin Liang See 
> > ---
> >  board/ebv/socrates/qts/sdram_config.h | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/board/ebv/socrates/qts/sdram_config.h
> > b/board/ebv/socrates/qts/sdram_config.h
> > index cf9d1d3..a0cad51 100644
> > --- a/board/ebv/socrates/qts/sdram_config.h
> > +++ b/board/ebv/socrates/qts/sdram_config.h
> > @@ -49,6 +49,9 @@
> >  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
> > 4
> >  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 
> > 3
> >  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
> > 512
> > +#define
> > CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2
> > +#define
> > CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2
> > +#define
> > CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_C
> > HIP 2
> >  #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 
> > 0
> >  #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
> > 0
> >  #define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 
> > 0x0
> > 
> 
> 
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Re: [U-Boot] [PATCH 4/9] arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1

2016-09-19 Thread Marek Vasut 
On 09/15/2016 09:27 AM, Chin Liang See wrote:
> Adding new handoff for SDRAM ctrcfg.extratime1 which is
> required for stabil LPDDR2 operation

Same comment as 2/9 applies to the rest

> Signed-off-by: Chin Liang See 
> ---
>  board/ebv/socrates/qts/sdram_config.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/board/ebv/socrates/qts/sdram_config.h 
> b/board/ebv/socrates/qts/sdram_config.h
> index cf9d1d3..a0cad51 100644
> --- a/board/ebv/socrates/qts/sdram_config.h
> +++ b/board/ebv/socrates/qts/sdram_config.h
> @@ -49,6 +49,9 @@
>  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP  4
>  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT   3
>  #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT  512
> +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2
> +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2
> +#define 
> CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 2
>  #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC   0
>  #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE  0
>  #define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST   0x0
> 


-- 
Best regards,
Marek Vasut
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