Re: [U-Boot] [PATCH v3 2/3] rk3288: sdram: auto-detect the capacity

2016-10-15 Thread Simon Glass 
On 15 October 2016 at 07:24, Simon Glass  wrote:
> On 10 October 2016 at 11:12, Vagrant Cascadian  wrote:
>> On 2016-10-07, Kever Yang wrote:
>>> Add support for rk3288 dram capacity auto detect, support DDR3 and
>>> LPDDR3, DDR2 is not supported.
>>> The program will automatically detect:
>>> - channel number
>>> - rank number
>>> - column address number
>>> - row address number
>>>
>>> The dts file do not need to describe those info after apply this patch.
>>>
>>> Signed-off-by: Kever Yang 
>>> Tested-by: Simon Glass 
>>> Tested-by: Vagrant Cascadian 
>>> ---
>>>
>>> Changes in v3:
>>> - add error report and return value when error happen
>>> - add comments for stride and address bits.
>>>
>>> Changes in v2:
>>> - update code for OF_PLATDATA enabled
>>> - bug fix for ddrconfig
>>
>> Tested the updated v3 patch with u-boot 2016.11-rc1, using both firefly
>> 2GB and 4GB variants. Both detect appropriate amount of ram and
>> otherwise work fine.
>>
>> Tested-by: Vagrant Cascadian 
>>
>> live well,
>>   vagrant
>
> Acked-by: Simon Glass 


Applied to u-boot-rockchip, thanks!
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Re: [U-Boot] [PATCH v3 2/3] rk3288: sdram: auto-detect the capacity

2016-10-15 Thread Simon Glass 
On 10 October 2016 at 11:12, Vagrant Cascadian  wrote:
> On 2016-10-07, Kever Yang wrote:
>> Add support for rk3288 dram capacity auto detect, support DDR3 and
>> LPDDR3, DDR2 is not supported.
>> The program will automatically detect:
>> - channel number
>> - rank number
>> - column address number
>> - row address number
>>
>> The dts file do not need to describe those info after apply this patch.
>>
>> Signed-off-by: Kever Yang 
>> Tested-by: Simon Glass 
>> Tested-by: Vagrant Cascadian 
>> ---
>>
>> Changes in v3:
>> - add error report and return value when error happen
>> - add comments for stride and address bits.
>>
>> Changes in v2:
>> - update code for OF_PLATDATA enabled
>> - bug fix for ddrconfig
>
> Tested the updated v3 patch with u-boot 2016.11-rc1, using both firefly
> 2GB and 4GB variants. Both detect appropriate amount of ram and
> otherwise work fine.
>
> Tested-by: Vagrant Cascadian 
>
> live well,
>   vagrant

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 2/3] rk3288: sdram: auto-detect the capacity

2016-10-10 Thread Vagrant Cascadian 
On 2016-10-07, Kever Yang wrote:
> Add support for rk3288 dram capacity auto detect, support DDR3 and
> LPDDR3, DDR2 is not supported.
> The program will automatically detect:
> - channel number
> - rank number
> - column address number
> - row address number
>
> The dts file do not need to describe those info after apply this patch.
>
> Signed-off-by: Kever Yang 
> Tested-by: Simon Glass 
> Tested-by: Vagrant Cascadian 
> ---
>
> Changes in v3:
> - add error report and return value when error happen
> - add comments for stride and address bits.
>
> Changes in v2:
> - update code for OF_PLATDATA enabled
> - bug fix for ddrconfig

Tested the updated v3 patch with u-boot 2016.11-rc1, using both firefly
2GB and 4GB variants. Both detect appropriate amount of ram and
otherwise work fine.

Tested-by: Vagrant Cascadian 

live well,
  vagrant

>  arch/arm/include/asm/arch-rockchip/sdram.h   |  15 ++
>  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 272 
> ++-
>  2 files changed, 245 insertions(+), 42 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h 
> b/arch/arm/include/asm/arch-rockchip/sdram.h
> index 82c3d07..d7d67ba 100644
> --- a/arch/arm/include/asm/arch-rockchip/sdram.h
> +++ b/arch/arm/include/asm/arch-rockchip/sdram.h
> @@ -16,6 +16,11 @@ enum {
>  };
>  
>  struct rk3288_sdram_channel {
> + /*
> +  * bit width in address, eg:
> +  * 8 banks using 3 bit to address,
> +  * 2 cs using 1 bit to address.
> +  */
>   u8 rank;
>   u8 col;
>   u8 bk;
> @@ -87,6 +92,16 @@ struct rk3288_base_params {
>   u32 ddrconfig;
>   u32 ddr_freq;
>   u32 dramtype;
> + /*
> +  * DDR Stride is address mapping for DRAM space
> +  * Stride   Ch 0 range  Ch1 range   Total
> +  * 0x00 0-256MB 256MB-512MB 512MB
> +  * 0x05 0-1GB   0-1GB   1GB
> +  * 0x09 0-2GB   0-2GB   2GB
> +  * 0x0d 0-4GB   0-4GB   4GB
> +  * 0x17 N/A 0-4GB   4GB
> +  * 0x1a 0-4GB   4GB-8GB 8GB
> +  */
>   u32 stride;
>   u32 odt;
>  };
> diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c 
> b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> index cf9ef2e..a7eadc5 100644
> --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
> @@ -57,6 +57,10 @@ struct rk3288_sdram_params {
>   struct regmap *map;
>  };
>  
> +#define TEST_PATTEN  0x5aa5f00f
> +#define DQS_GATE_TRAINING_ERROR_RANK0(1 << 4)
> +#define DQS_GATE_TRAINING_ERROR_RANK1(2 << 4)
> +
>  #ifdef CONFIG_SPL_BUILD
>  static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
>  {
> @@ -214,7 +218,7 @@ static void ddr_set_en_bst_odt(struct rk3288_grf *grf, 
> uint channel,
>  }
>  
>  static void pctl_cfg(u32 channel, struct rk3288_ddr_pctl *pctl,
> -  const struct rk3288_sdram_params *sdram_params,
> +  struct rk3288_sdram_params *sdram_params,
>struct rk3288_grf *grf)
>  {
>   unsigned int burstlen;
> @@ -264,7 +268,7 @@ static void pctl_cfg(u32 channel, struct rk3288_ddr_pctl 
> *pctl,
>  }
>  
>  static void phy_cfg(const struct chan_info *chan, u32 channel,
> - const struct rk3288_sdram_params *sdram_params)
> + struct rk3288_sdram_params *sdram_params)
>  {
>   struct rk3288_ddr_publ *publ = chan->publ;
>   struct rk3288_msch *msch = chan->msch;
> @@ -446,7 +450,7 @@ static void set_bandwidth_ratio(const struct chan_info 
> *chan, u32 channel,
>  }
>  
>  static int data_training(const struct chan_info *chan, u32 channel,
> -  const struct rk3288_sdram_params *sdram_params)
> +  struct rk3288_sdram_params *sdram_params)
>  {
>   unsigned int j;
>   int ret = 0;
> @@ -549,7 +553,7 @@ static void move_to_access_state(const struct chan_info 
> *chan)
>  }
>  
>  static void dram_cfg_rbc(const struct chan_info *chan, u32 chnum,
> -  const struct rk3288_sdram_params *sdram_params)
> +  struct rk3288_sdram_params *sdram_params)
>  {
>   struct rk3288_ddr_publ *publ = chan->publ;
>  
> @@ -563,7 +567,7 @@ static void dram_cfg_rbc(const struct chan_info *chan, 
> u32 chnum,
>  }
>  
>  static void dram_all_config(const struct dram_info *dram,
> - const struct rk3288_sdram_params *sdram_params)
> + struct rk3288_sdram_params *sdram_params)
>  {
>   unsigned int chan;
>   u32 sys_reg = 0;
> @@ -589,9 +593,191 @@ static void dram_all_config(const struct dram_info 
> *dram,
>   writel(sys_reg, >pmu->sys_reg[2]);
>   rk_clrsetreg(>sgrf->soc_con2, 0x1f, sdram_params->base.stride);
>  }
> +const int ddrconf_table[] = {