Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Jan Kiszka 
On 2015-03-19 16:02, Thierry Reding wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

 Jan

 CC: Ian Campbell i...@hellion.org.uk
 CC: Marc Zyngier marc.zyng...@arm.com

 Ian Campbell (3):
   tegra124: Add more registers to struct mc_ctlr
   jetson-tk1: Add PSCI configuration options and reserve secure code
   tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0

 Jan Kiszka (11):
   sun7i: Remove duplicate call to psci_arch_init
   ARM: Factor out common psci_get_cpu_id
   ARM: Factor out reusable psci_cpu_off_common
   ARM: Factor out reusable psci_cpu_entry
   ARM: Factor out reusable psci_get_cpu_stack_top
   ARM: Put target PC for PSCI CPU_ON on per-CPU stack
   virt-dt: Allow reservation of secure region when in a RAM carveout
   tegra: Make tegra_powergate_power_on public
   tegra: Add ap_pm_init hook
   tegra124: Add PSCI support for Tegra124
   tegra: Set CNTFRQ for secondary CPUs

  arch/arm/cpu/armv7/psci.S   | 121 
 
  arch/arm/cpu/armv7/sunxi/psci.S | 112 -
  arch/arm/cpu/armv7/virt-dt.c|  29 +++
  arch/arm/cpu/armv7/virt-v7.c|   5 ++
  arch/arm/include/asm/arch-tegra/ap.h|   5 ++
  arch/arm/include/asm/arch-tegra/powergate.h |   1 +
  arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
  arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
  arch/arm/include/asm/armv7.h|   1 +
  arch/arm/include/asm/system.h   |   1 +
  arch/arm/lib/bootm-fdt.c|   5 ++
  arch/arm/mach-tegra/Makefile|   4 +
  arch/arm/mach-tegra/ap.c|  15 
  arch/arm/mach-tegra/powergate.c |   2 +-
  arch/arm/mach-tegra/psci.S  | 114 ++
  arch/arm/mach-tegra/tegra124/Kconfig|   2 +
  arch/arm/mach-tegra/tegra124/Makefile   |   4 +
  arch/arm/mach-tegra/tegra124/ap.c   |  55 +
  board/nvidia/common/board.c |   4 +
  include/configs/jetson-tk1.h|   5 ++
  20 files changed, 428 insertions(+), 98 deletions(-)
  create mode 100644 arch/arm/mach-tegra/psci.S
  create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
 
 For the series:
 
 Reviewed-by: Thierry Reding tred...@nvidia.com
 Tested-by: Thierry Reding tred...@nvidia.com

Thanks for all feedback - what's next? Anything missing? Should I rebase
(didn't check yet if that is necessary) and resend?

Jan

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Tom Rini 
On Wed, Apr 08, 2015 at 06:13:23PM +0200, Jan Kiszka wrote:
 On 2015-04-08 17:54, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 04:12:21PM +0200, Jan Kiszka wrote:
  On 2015-04-08 16:02, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote:
  On 2015-04-08 15:43, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
  On 2015-03-19 16:02, Thierry Reding wrote:
  On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
 
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
  Jan
 
  CC: Ian Campbell i...@hellion.org.uk
  CC: Marc Zyngier marc.zyng...@arm.com
 
  Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
 
  Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
 
   arch/arm/cpu/armv7/psci.S   | 121 
  
   arch/arm/cpu/armv7/sunxi/psci.S | 112 
  -
   arch/arm/cpu/armv7/virt-dt.c|  29 +++
   arch/arm/cpu/armv7/virt-v7.c|   5 ++
   arch/arm/include/asm/arch-tegra/ap.h|   5 ++
   arch/arm/include/asm/arch-tegra/powergate.h |   1 +
   arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
   arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
   arch/arm/include/asm/armv7.h|   1 +
   arch/arm/include/asm/system.h   |   1 +
   arch/arm/lib/bootm-fdt.c|   5 ++
   arch/arm/mach-tegra/Makefile|   4 +
   arch/arm/mach-tegra/ap.c|  15 
   arch/arm/mach-tegra/powergate.c |   2 +-
   arch/arm/mach-tegra/psci.S  | 114 
  ++
   arch/arm/mach-tegra/tegra124/Kconfig|   2 +
   arch/arm/mach-tegra/tegra124/Makefile   |   4 +
   arch/arm/mach-tegra/tegra124/ap.c   |  55 +
   board/nvidia/common/board.c |   4 +
   include/configs/jetson-tk1.h|   5 ++
   20 files changed, 428 insertions(+), 98 deletions(-)
   create mode 100644 arch/arm/mach-tegra/psci.S
   create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
 
  For the series:
 
  Reviewed-by: Thierry Reding tred...@nvidia.com
  Tested-by: Thierry Reding tred...@nvidia.com
 
  Thanks for all feedback - what's next? Anything missing? Should I 
  rebase
  (didn't check yet if that is necessary) and resend?
 
  Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
  into the commit messages and then I'll apply, thanks!
 
 
  Base on master (there it applies fine but causes a trivial build
  warning) or some other tree?
 
  Applying: virt-dt: Allow reservation of secure region when in a RAM
  carveout
  Using index info to reconstruct a base tree...
  Falling back to patching base and 3-way merge...
  Auto-merging arch/arm/lib/bootm-fdt.c
  Auto-merging arch/arm/include/asm/armv7.h
  CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h
  Auto-merging arch/arm/cpu/armv7/virt-dt.c
  CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c
  Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c'
  Recorded preimage for 'arch/arm/include/asm/armv7.h'
  Failed to merge in the changes.
  Patch failed at 0008 virt-dt: Allow reservation of secure region when in
  a RAM carveout
 
  Is what I saw trying to git am -3 the current series to top of tree
  master.
 
  adcc5705? Strange, doesn't happen here.
  
  Nope, 820ca15
 
 Then please don't forget to push that baseline eventually ;). Or is
 public git.denx.de updated only once a day or so? There used to be some
 delay in the past, IIRC.

Bah, 820ca15 wasn't public and was the first 7 parts of the series
applied, but same problem with git am on adcc5705 :)

-- 
Tom


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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Jan Kiszka 
On 2015-04-08 15:43, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
 On 2015-03-19 16:02, Thierry Reding wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

 Jan

 CC: Ian Campbell i...@hellion.org.uk
 CC: Marc Zyngier marc.zyng...@arm.com

 Ian Campbell (3):
   tegra124: Add more registers to struct mc_ctlr
   jetson-tk1: Add PSCI configuration options and reserve secure code
   tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0

 Jan Kiszka (11):
   sun7i: Remove duplicate call to psci_arch_init
   ARM: Factor out common psci_get_cpu_id
   ARM: Factor out reusable psci_cpu_off_common
   ARM: Factor out reusable psci_cpu_entry
   ARM: Factor out reusable psci_get_cpu_stack_top
   ARM: Put target PC for PSCI CPU_ON on per-CPU stack
   virt-dt: Allow reservation of secure region when in a RAM carveout
   tegra: Make tegra_powergate_power_on public
   tegra: Add ap_pm_init hook
   tegra124: Add PSCI support for Tegra124
   tegra: Set CNTFRQ for secondary CPUs

  arch/arm/cpu/armv7/psci.S   | 121 
 
  arch/arm/cpu/armv7/sunxi/psci.S | 112 
 -
  arch/arm/cpu/armv7/virt-dt.c|  29 +++
  arch/arm/cpu/armv7/virt-v7.c|   5 ++
  arch/arm/include/asm/arch-tegra/ap.h|   5 ++
  arch/arm/include/asm/arch-tegra/powergate.h |   1 +
  arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
  arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
  arch/arm/include/asm/armv7.h|   1 +
  arch/arm/include/asm/system.h   |   1 +
  arch/arm/lib/bootm-fdt.c|   5 ++
  arch/arm/mach-tegra/Makefile|   4 +
  arch/arm/mach-tegra/ap.c|  15 
  arch/arm/mach-tegra/powergate.c |   2 +-
  arch/arm/mach-tegra/psci.S  | 114 
 ++
  arch/arm/mach-tegra/tegra124/Kconfig|   2 +
  arch/arm/mach-tegra/tegra124/Makefile   |   4 +
  arch/arm/mach-tegra/tegra124/ap.c   |  55 +
  board/nvidia/common/board.c |   4 +
  include/configs/jetson-tk1.h|   5 ++
  20 files changed, 428 insertions(+), 98 deletions(-)
  create mode 100644 arch/arm/mach-tegra/psci.S
  create mode 100644 arch/arm/mach-tegra/tegra124/ap.c

 For the series:

 Reviewed-by: Thierry Reding tred...@nvidia.com
 Tested-by: Thierry Reding tred...@nvidia.com

 Thanks for all feedback - what's next? Anything missing? Should I rebase
 (didn't check yet if that is necessary) and resend?
 
 Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
 into the commit messages and then I'll apply, thanks!
 

Base on master (there it applies fine but causes a trivial build
warning) or some other tree?

Jan

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Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Jan Kiszka 
On 2015-04-08 16:02, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote:
 On 2015-04-08 15:43, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
 On 2015-03-19 16:02, Thierry Reding wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

 Jan

 CC: Ian Campbell i...@hellion.org.uk
 CC: Marc Zyngier marc.zyng...@arm.com

 Ian Campbell (3):
   tegra124: Add more registers to struct mc_ctlr
   jetson-tk1: Add PSCI configuration options and reserve secure code
   tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0

 Jan Kiszka (11):
   sun7i: Remove duplicate call to psci_arch_init
   ARM: Factor out common psci_get_cpu_id
   ARM: Factor out reusable psci_cpu_off_common
   ARM: Factor out reusable psci_cpu_entry
   ARM: Factor out reusable psci_get_cpu_stack_top
   ARM: Put target PC for PSCI CPU_ON on per-CPU stack
   virt-dt: Allow reservation of secure region when in a RAM carveout
   tegra: Make tegra_powergate_power_on public
   tegra: Add ap_pm_init hook
   tegra124: Add PSCI support for Tegra124
   tegra: Set CNTFRQ for secondary CPUs

  arch/arm/cpu/armv7/psci.S   | 121 
 
  arch/arm/cpu/armv7/sunxi/psci.S | 112 
 -
  arch/arm/cpu/armv7/virt-dt.c|  29 +++
  arch/arm/cpu/armv7/virt-v7.c|   5 ++
  arch/arm/include/asm/arch-tegra/ap.h|   5 ++
  arch/arm/include/asm/arch-tegra/powergate.h |   1 +
  arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
  arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
  arch/arm/include/asm/armv7.h|   1 +
  arch/arm/include/asm/system.h   |   1 +
  arch/arm/lib/bootm-fdt.c|   5 ++
  arch/arm/mach-tegra/Makefile|   4 +
  arch/arm/mach-tegra/ap.c|  15 
  arch/arm/mach-tegra/powergate.c |   2 +-
  arch/arm/mach-tegra/psci.S  | 114 
 ++
  arch/arm/mach-tegra/tegra124/Kconfig|   2 +
  arch/arm/mach-tegra/tegra124/Makefile   |   4 +
  arch/arm/mach-tegra/tegra124/ap.c   |  55 +
  board/nvidia/common/board.c |   4 +
  include/configs/jetson-tk1.h|   5 ++
  20 files changed, 428 insertions(+), 98 deletions(-)
  create mode 100644 arch/arm/mach-tegra/psci.S
  create mode 100644 arch/arm/mach-tegra/tegra124/ap.c

 For the series:

 Reviewed-by: Thierry Reding tred...@nvidia.com
 Tested-by: Thierry Reding tred...@nvidia.com

 Thanks for all feedback - what's next? Anything missing? Should I rebase
 (didn't check yet if that is necessary) and resend?

 Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
 into the commit messages and then I'll apply, thanks!


 Base on master (there it applies fine but causes a trivial build
 warning) or some other tree?
 
 Applying: virt-dt: Allow reservation of secure region when in a RAM
 carveout
 Using index info to reconstruct a base tree...
 Falling back to patching base and 3-way merge...
 Auto-merging arch/arm/lib/bootm-fdt.c
 Auto-merging arch/arm/include/asm/armv7.h
 CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h
 Auto-merging arch/arm/cpu/armv7/virt-dt.c
 CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c
 Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c'
 Recorded preimage for 'arch/arm/include/asm/armv7.h'
 Failed to merge in the changes.
 Patch failed at 0008 virt-dt: Allow reservation of secure region when in
 a RAM carveout
 
 Is what I saw trying to git am -3 the current series to top of tree
 master.

adcc5705? Strange, doesn't happen here.

However, will have to test anyway before reposting, and the board is not
with me on this train. So I'll check again tomorrow or so if I'm missing
something.

Jan

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Tom Rini 
On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote:
 On 2015-04-08 15:43, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
  On 2015-03-19 16:02, Thierry Reding wrote:
  On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
 
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
  Jan
 
  CC: Ian Campbell i...@hellion.org.uk
  CC: Marc Zyngier marc.zyng...@arm.com
 
  Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
 
  Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
 
   arch/arm/cpu/armv7/psci.S   | 121 
  
   arch/arm/cpu/armv7/sunxi/psci.S | 112 
  -
   arch/arm/cpu/armv7/virt-dt.c|  29 +++
   arch/arm/cpu/armv7/virt-v7.c|   5 ++
   arch/arm/include/asm/arch-tegra/ap.h|   5 ++
   arch/arm/include/asm/arch-tegra/powergate.h |   1 +
   arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
   arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
   arch/arm/include/asm/armv7.h|   1 +
   arch/arm/include/asm/system.h   |   1 +
   arch/arm/lib/bootm-fdt.c|   5 ++
   arch/arm/mach-tegra/Makefile|   4 +
   arch/arm/mach-tegra/ap.c|  15 
   arch/arm/mach-tegra/powergate.c |   2 +-
   arch/arm/mach-tegra/psci.S  | 114 
  ++
   arch/arm/mach-tegra/tegra124/Kconfig|   2 +
   arch/arm/mach-tegra/tegra124/Makefile   |   4 +
   arch/arm/mach-tegra/tegra124/ap.c   |  55 +
   board/nvidia/common/board.c |   4 +
   include/configs/jetson-tk1.h|   5 ++
   20 files changed, 428 insertions(+), 98 deletions(-)
   create mode 100644 arch/arm/mach-tegra/psci.S
   create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
 
  For the series:
 
  Reviewed-by: Thierry Reding tred...@nvidia.com
  Tested-by: Thierry Reding tred...@nvidia.com
 
  Thanks for all feedback - what's next? Anything missing? Should I rebase
  (didn't check yet if that is necessary) and resend?
  
  Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
  into the commit messages and then I'll apply, thanks!
  
 
 Base on master (there it applies fine but causes a trivial build
 warning) or some other tree?

Applying: virt-dt: Allow reservation of secure region when in a RAM
carveout
Using index info to reconstruct a base tree...
Falling back to patching base and 3-way merge...
Auto-merging arch/arm/lib/bootm-fdt.c
Auto-merging arch/arm/include/asm/armv7.h
CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h
Auto-merging arch/arm/cpu/armv7/virt-dt.c
CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c
Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c'
Recorded preimage for 'arch/arm/include/asm/armv7.h'
Failed to merge in the changes.
Patch failed at 0008 virt-dt: Allow reservation of secure region when in
a RAM carveout

Is what I saw trying to git am -3 the current series to top of tree
master.

-- 
Tom


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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Tom Rini 
On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
 On 2015-03-19 16:02, Thierry Reding wrote:
  On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
 
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
  Jan
 
  CC: Ian Campbell i...@hellion.org.uk
  CC: Marc Zyngier marc.zyng...@arm.com
 
  Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
 
  Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
 
   arch/arm/cpu/armv7/psci.S   | 121 
  
   arch/arm/cpu/armv7/sunxi/psci.S | 112 
  -
   arch/arm/cpu/armv7/virt-dt.c|  29 +++
   arch/arm/cpu/armv7/virt-v7.c|   5 ++
   arch/arm/include/asm/arch-tegra/ap.h|   5 ++
   arch/arm/include/asm/arch-tegra/powergate.h |   1 +
   arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
   arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
   arch/arm/include/asm/armv7.h|   1 +
   arch/arm/include/asm/system.h   |   1 +
   arch/arm/lib/bootm-fdt.c|   5 ++
   arch/arm/mach-tegra/Makefile|   4 +
   arch/arm/mach-tegra/ap.c|  15 
   arch/arm/mach-tegra/powergate.c |   2 +-
   arch/arm/mach-tegra/psci.S  | 114 
  ++
   arch/arm/mach-tegra/tegra124/Kconfig|   2 +
   arch/arm/mach-tegra/tegra124/Makefile   |   4 +
   arch/arm/mach-tegra/tegra124/ap.c   |  55 +
   board/nvidia/common/board.c |   4 +
   include/configs/jetson-tk1.h|   5 ++
   20 files changed, 428 insertions(+), 98 deletions(-)
   create mode 100644 arch/arm/mach-tegra/psci.S
   create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
  
  For the series:
  
  Reviewed-by: Thierry Reding tred...@nvidia.com
  Tested-by: Thierry Reding tred...@nvidia.com
 
 Thanks for all feedback - what's next? Anything missing? Should I rebase
 (didn't check yet if that is necessary) and resend?

Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
into the commit messages and then I'll apply, thanks!

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Tom Rini 
On Wed, Apr 08, 2015 at 04:12:21PM +0200, Jan Kiszka wrote:
 On 2015-04-08 16:02, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote:
  On 2015-04-08 15:43, Tom Rini wrote:
  On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
  On 2015-03-19 16:02, Thierry Reding wrote:
  On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
 
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
  Jan
 
  CC: Ian Campbell i...@hellion.org.uk
  CC: Marc Zyngier marc.zyng...@arm.com
 
  Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
 
  Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
 
   arch/arm/cpu/armv7/psci.S   | 121 
  
   arch/arm/cpu/armv7/sunxi/psci.S | 112 
  -
   arch/arm/cpu/armv7/virt-dt.c|  29 +++
   arch/arm/cpu/armv7/virt-v7.c|   5 ++
   arch/arm/include/asm/arch-tegra/ap.h|   5 ++
   arch/arm/include/asm/arch-tegra/powergate.h |   1 +
   arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
   arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
   arch/arm/include/asm/armv7.h|   1 +
   arch/arm/include/asm/system.h   |   1 +
   arch/arm/lib/bootm-fdt.c|   5 ++
   arch/arm/mach-tegra/Makefile|   4 +
   arch/arm/mach-tegra/ap.c|  15 
   arch/arm/mach-tegra/powergate.c |   2 +-
   arch/arm/mach-tegra/psci.S  | 114 
  ++
   arch/arm/mach-tegra/tegra124/Kconfig|   2 +
   arch/arm/mach-tegra/tegra124/Makefile   |   4 +
   arch/arm/mach-tegra/tegra124/ap.c   |  55 +
   board/nvidia/common/board.c |   4 +
   include/configs/jetson-tk1.h|   5 ++
   20 files changed, 428 insertions(+), 98 deletions(-)
   create mode 100644 arch/arm/mach-tegra/psci.S
   create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
 
  For the series:
 
  Reviewed-by: Thierry Reding tred...@nvidia.com
  Tested-by: Thierry Reding tred...@nvidia.com
 
  Thanks for all feedback - what's next? Anything missing? Should I rebase
  (didn't check yet if that is necessary) and resend?
 
  Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
  into the commit messages and then I'll apply, thanks!
 
 
  Base on master (there it applies fine but causes a trivial build
  warning) or some other tree?
  
  Applying: virt-dt: Allow reservation of secure region when in a RAM
  carveout
  Using index info to reconstruct a base tree...
  Falling back to patching base and 3-way merge...
  Auto-merging arch/arm/lib/bootm-fdt.c
  Auto-merging arch/arm/include/asm/armv7.h
  CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h
  Auto-merging arch/arm/cpu/armv7/virt-dt.c
  CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c
  Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c'
  Recorded preimage for 'arch/arm/include/asm/armv7.h'
  Failed to merge in the changes.
  Patch failed at 0008 virt-dt: Allow reservation of secure region when in
  a RAM carveout
  
  Is what I saw trying to git am -3 the current series to top of tree
  master.
 
 adcc5705? Strange, doesn't happen here.

Nope, 820ca15

 However, will have to test anyway before reposting, and the board is not
 with me on this train. So I'll check again tomorrow or so if I'm missing
 something.

OK thanks!

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-04-08 Thread Jan Kiszka 
On 2015-04-08 17:54, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 04:12:21PM +0200, Jan Kiszka wrote:
 On 2015-04-08 16:02, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote:
 On 2015-04-08 15:43, Tom Rini wrote:
 On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote:
 On 2015-03-19 16:02, Thierry Reding wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

 Jan

 CC: Ian Campbell i...@hellion.org.uk
 CC: Marc Zyngier marc.zyng...@arm.com

 Ian Campbell (3):
   tegra124: Add more registers to struct mc_ctlr
   jetson-tk1: Add PSCI configuration options and reserve secure code
   tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0

 Jan Kiszka (11):
   sun7i: Remove duplicate call to psci_arch_init
   ARM: Factor out common psci_get_cpu_id
   ARM: Factor out reusable psci_cpu_off_common
   ARM: Factor out reusable psci_cpu_entry
   ARM: Factor out reusable psci_get_cpu_stack_top
   ARM: Put target PC for PSCI CPU_ON on per-CPU stack
   virt-dt: Allow reservation of secure region when in a RAM carveout
   tegra: Make tegra_powergate_power_on public
   tegra: Add ap_pm_init hook
   tegra124: Add PSCI support for Tegra124
   tegra: Set CNTFRQ for secondary CPUs

  arch/arm/cpu/armv7/psci.S   | 121 
 
  arch/arm/cpu/armv7/sunxi/psci.S | 112 
 -
  arch/arm/cpu/armv7/virt-dt.c|  29 +++
  arch/arm/cpu/armv7/virt-v7.c|   5 ++
  arch/arm/include/asm/arch-tegra/ap.h|   5 ++
  arch/arm/include/asm/arch-tegra/powergate.h |   1 +
  arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
  arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
  arch/arm/include/asm/armv7.h|   1 +
  arch/arm/include/asm/system.h   |   1 +
  arch/arm/lib/bootm-fdt.c|   5 ++
  arch/arm/mach-tegra/Makefile|   4 +
  arch/arm/mach-tegra/ap.c|  15 
  arch/arm/mach-tegra/powergate.c |   2 +-
  arch/arm/mach-tegra/psci.S  | 114 
 ++
  arch/arm/mach-tegra/tegra124/Kconfig|   2 +
  arch/arm/mach-tegra/tegra124/Makefile   |   4 +
  arch/arm/mach-tegra/tegra124/ap.c   |  55 +
  board/nvidia/common/board.c |   4 +
  include/configs/jetson-tk1.h|   5 ++
  20 files changed, 428 insertions(+), 98 deletions(-)
  create mode 100644 arch/arm/mach-tegra/psci.S
  create mode 100644 arch/arm/mach-tegra/tegra124/ap.c

 For the series:

 Reviewed-by: Thierry Reding tred...@nvidia.com
 Tested-by: Thierry Reding tred...@nvidia.com

 Thanks for all feedback - what's next? Anything missing? Should I rebase
 (didn't check yet if that is necessary) and resend?

 Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's
 into the commit messages and then I'll apply, thanks!


 Base on master (there it applies fine but causes a trivial build
 warning) or some other tree?

 Applying: virt-dt: Allow reservation of secure region when in a RAM
 carveout
 Using index info to reconstruct a base tree...
 Falling back to patching base and 3-way merge...
 Auto-merging arch/arm/lib/bootm-fdt.c
 Auto-merging arch/arm/include/asm/armv7.h
 CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h
 Auto-merging arch/arm/cpu/armv7/virt-dt.c
 CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c
 Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c'
 Recorded preimage for 'arch/arm/include/asm/armv7.h'
 Failed to merge in the changes.
 Patch failed at 0008 virt-dt: Allow reservation of secure region when in
 a RAM carveout

 Is what I saw trying to git am -3 the current series to top of tree
 master.

 adcc5705? Strange, doesn't happen here.
 
 Nope, 820ca15

Then please don't forget to push that baseline eventually ;). Or is
public git.denx.de updated only once a day or so? There used to be some
delay in the past, IIRC.

Jan

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-19 Thread Jan Kiszka 
On 2015-03-18 17:54, Ian Campbell wrote:
 On Wed, 2015-03-11 at 11:11 -0400, Tom Rini wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:

 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

 So, I don't know where exactly this should come in.  Hans or Ian, if you
 can ack the sunxi changes (I saw you tested it Ian, thanks!) 
 
 I just acked the ARM: Factor out common psci_get_cpu_id patch, which I
 think was the only sunxi bit. Let me know if I'm wrong about that or
 there is something non-sunxi you'd like me to look at...

Actually, patches 1..6 affect sunxi, though some only by moving code
into a shared place.

Jan

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-19 Thread Thierry Reding 
On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top
 
 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
 Jan
 
 CC: Ian Campbell i...@hellion.org.uk
 CC: Marc Zyngier marc.zyng...@arm.com
 
 Ian Campbell (3):
   tegra124: Add more registers to struct mc_ctlr
   jetson-tk1: Add PSCI configuration options and reserve secure code
   tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
 
 Jan Kiszka (11):
   sun7i: Remove duplicate call to psci_arch_init
   ARM: Factor out common psci_get_cpu_id
   ARM: Factor out reusable psci_cpu_off_common
   ARM: Factor out reusable psci_cpu_entry
   ARM: Factor out reusable psci_get_cpu_stack_top
   ARM: Put target PC for PSCI CPU_ON on per-CPU stack
   virt-dt: Allow reservation of secure region when in a RAM carveout
   tegra: Make tegra_powergate_power_on public
   tegra: Add ap_pm_init hook
   tegra124: Add PSCI support for Tegra124
   tegra: Set CNTFRQ for secondary CPUs
 
  arch/arm/cpu/armv7/psci.S   | 121 
 
  arch/arm/cpu/armv7/sunxi/psci.S | 112 -
  arch/arm/cpu/armv7/virt-dt.c|  29 +++
  arch/arm/cpu/armv7/virt-v7.c|   5 ++
  arch/arm/include/asm/arch-tegra/ap.h|   5 ++
  arch/arm/include/asm/arch-tegra/powergate.h |   1 +
  arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
  arch/arm/include/asm/arch-tegra124/mc.h |  35 +++-
  arch/arm/include/asm/armv7.h|   1 +
  arch/arm/include/asm/system.h   |   1 +
  arch/arm/lib/bootm-fdt.c|   5 ++
  arch/arm/mach-tegra/Makefile|   4 +
  arch/arm/mach-tegra/ap.c|  15 
  arch/arm/mach-tegra/powergate.c |   2 +-
  arch/arm/mach-tegra/psci.S  | 114 ++
  arch/arm/mach-tegra/tegra124/Kconfig|   2 +
  arch/arm/mach-tegra/tegra124/Makefile   |   4 +
  arch/arm/mach-tegra/tegra124/ap.c   |  55 +
  board/nvidia/common/board.c |   4 +
  include/configs/jetson-tk1.h|   5 ++
  20 files changed, 428 insertions(+), 98 deletions(-)
  create mode 100644 arch/arm/mach-tegra/psci.S
  create mode 100644 arch/arm/mach-tegra/tegra124/ap.c

For the series:

Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-18 Thread Ian Campbell 
On Wed, 2015-03-11 at 11:11 -0400, Tom Rini wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
  
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
 So, I don't know where exactly this should come in.  Hans or Ian, if you
 can ack the sunxi changes (I saw you tested it Ian, thanks!) 

I just acked the ARM: Factor out common psci_get_cpu_id patch, which I
think was the only sunxi bit. Let me know if I'm wrong about that or
there is something non-sunxi you'd like me to look at...

Ian.

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-18 Thread Tom Warren 
I'd asked Stephen Warren (who asked Thierry Reding) to look at these as they 
were more expert in PSCI than I, and I'm currently swamped w/another bringup.

I don't want to ACK something I'm not sure about, so I have to defer to Stephen 
or Thierry.

Thierry - please try and give this some attention. Thanks.

Tom

 -Original Message-
 From: Jan Kiszka [mailto:jan.kis...@siemens.com]
 Sent: Tuesday, March 17, 2015 11:40 PM
 To: Tom Warren; Ian Campbell; Hans de Goede; Albert Aribaud
 Cc: Tom Rini; U-Boot Mailing List; Marc Zyngier; Paul Walmsley; Thierry Reding
 Subject: Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson
 TK1/Tegra124 + CNTFRQ fix
 
 On 2015-03-11 16:11, Tom Rini wrote:
  On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
 
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
  So, I don't know where exactly this should come in.  Hans or Ian, if
  you can ack the sunxi changes (I saw you tested it Ian, thanks!) and
  Tom W., if you can ack the Tegra parts, I can take this in or Albert,
  do you want to chime in too since this is kinda core ARM stuff too?
  Thanks everyone!
 
 Ping...
 
 Jan
 
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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-18 Thread Jan Kiszka 
On 2015-03-11 16:11, Tom Rini wrote:
 On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
 
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top

 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
 So, I don't know where exactly this should come in.  Hans or Ian, if you
 can ack the sunxi changes (I saw you tested it Ian, thanks!) and Tom W.,
 if you can ack the Tegra parts, I can take this in or Albert, do you
 want to chime in too since this is kinda core ARM stuff too?  Thanks
 everyone!

Ping...

Jan

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-12 Thread Ian Campbell 
On Wed, 2015-03-11 at 08:56 +, Ian Campbell wrote:
 On Mon, 2015-03-09 at 08:00 +0100, Jan Kiszka wrote:
  Changes in v4:
   - rebased over master
   - implemented psci_get_cpu_id as weak function
   - implemented psci_disable/enable_smp as weak functions
   - adjusted register interface of psci_get_cpu_stack_top
  
  This version (+ the non-cached memory init fix) can also be found at
  https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
 
 Tested-by: Ian Campbell i...@hellion.org.uk

... that was on Jetson. I've now tested it on sunxi (Cubietruck) too.

Ian.

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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-12 Thread Tom Rini 
On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:

 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top
 
 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

So, I don't know where exactly this should come in.  Hans or Ian, if you
can ack the sunxi changes (I saw you tested it Ian, thanks!) and Tom W.,
if you can ack the Tegra parts, I can take this in or Albert, do you
want to chime in too since this is kinda core ARM stuff too?  Thanks
everyone!

-- 
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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

2015-03-11 Thread Ian Campbell 
On Mon, 2015-03-09 at 08:00 +0100, Jan Kiszka wrote:
 Changes in v4:
  - rebased over master
  - implemented psci_get_cpu_id as weak function
  - implemented psci_disable/enable_smp as weak functions
  - adjusted register interface of psci_get_cpu_stack_top
 
 This version (+ the non-cached memory init fix) can also be found at
 https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

Tested-by: Ian Campbell i...@hellion.org.uk

Ian.

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