Re: [UrJTAG-dev] interest in debug support for LEON3/GRLIB

2019-12-16 Thread Geert Stappers
On Thu, Dec 12, 2019 at 03:36:13PM +0100, Jiri Gaisler wrote:
> 
> On 12/11/19 9:18 PM, Geert Stappers wrote:
> > On Wed, Dec 11, 2019 at 05:54:41PM +0100, Jiri Gaisler wrote:
> >> Hello,
> >>
> >> would there be any interest to include a debug monitor for LEON3/GRLIB
> >> processors to urjtag? It allows to display various processor registers
> >> and upload and execute programs. I have developed it similar to the
> >> Blackfin module in urjtag, and it is of similar size. I have attached
> >> the diff statistics and the README file. Let me know if there is any
> >> interest to merge this into urjtag
> > My interest is having/getting many people who have interest in urjtag.
> >
> > So, yes, I'm willing to merge the grlib debugger.
> 
> Great! I will clean up the code a bit and divide it up into a couple
> smaller patches, then send to the list sometimes after the holiday
> period ...

Acknowledge.

I'll not make it a blocker for the upcoming release.

 

Groeten
Geert Stappers
-- 
Leven en laten leven


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Re: [UrJTAG-dev] interest in debug support for LEON3/GRLIB

2019-12-12 Thread Jiri Gaisler


On 12/11/19 9:18 PM, Geert Stappers wrote:
> On Wed, Dec 11, 2019 at 05:54:41PM +0100, Jiri Gaisler wrote:
>> Hello,
>>
>> would there be any interest to include a debug monitor for LEON3/GRLIB
>> processors to urjtag? It allows to display various processor registers
>> and upload and execute programs. I have developed it similar to the
>> Blackfin module in urjtag, and it is of similar size. I have attached
>> the diff statistics and the README file. Let me know if there is any
>> interest to merge this into urjtag
> My interest is having/getting many people who have interest in urjtag.
>
> So, yes, I'm willing to merge the grlib debugger.

Great! I will clean up the code a bit and divide it up into a couple smaller 
patches, then send to the list sometimes after the holiday period ...

Thanks, Jiri.




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Re: [UrJTAG-dev] interest in debug support for LEON3/GRLIB

2019-12-11 Thread Geert Stappers
On Wed, Dec 11, 2019 at 05:54:41PM +0100, Jiri Gaisler wrote:
> Hello,
> 
> would there be any interest to include a debug monitor for LEON3/GRLIB
> processors to urjtag? It allows to display various processor registers
> and upload and execute programs. I have developed it similar to the
> Blackfin module in urjtag, and it is of similar size. I have attached
> the diff statistics and the README file. Let me know if there is any
> interest to merge this into urjtag

My interest is having/getting many people who have interest in urjtag.

So, yes, I'm willing to merge the grlib debugger.


> or if I rather should have in a separate repo ...

Your call  ;-)


> Jiri.
> 

> From ee246a8359d4ab7e43afdf4774333f0a9ed969d2 Mon Sep 17 00:00:00 2001
> From: Jiri Gaisler 
> Date: Mon, 9 Dec 2019 14:25:32 +0100
> Subject: [PATCH 0/1] *** SUBJECT HERE ***
> 
> *** BLURB HERE ***
> 
> Jiri Gaisler (1):
>   Added grlib subsystem
> 
>  urjtag/ChangeLog   |3 +
>  urjtag/MAINTAINERS |7 +
>  urjtag/configure.ac|1 +
>  urjtag/doc/README.grlib|   99 +
>  urjtag/include/urjtag/error.h  |2 +
>  urjtag/include/urjtag/grlib.h  |   73 +
>  urjtag/src/Makefile.am |2 +
>  urjtag/src/cmd/Makefile.am |3 +-
>  urjtag/src/cmd/cmd_grlib.c |  270 +++
>  urjtag/src/global/log-error.c  |2 +
>  urjtag/src/grlib/Makefile.am   |   35 +
>  urjtag/src/grlib/devices.h |  291 +++
>  urjtag/src/grlib/elf.c |  288 +++
>  urjtag/src/grlib/elf.h | 3789 
>  urjtag/src/grlib/gdb.c |  570 +
>  urjtag/src/grlib/grlib.c   |  739 +++
>  urjtag/src/grlib/grlib_int.h   |  367 
>  urjtag/src/grlib/sparc.c   |  138 ++
>  urjtag/src/grlib/sparc.h   |  155 ++
>  urjtag/src/grlib/sparc_disas.c | 1083 +
>  20 files changed, 7916 insertions(+), 1 deletion(-)
>  create mode 100644 urjtag/doc/README.grlib
>  create mode 100644 urjtag/include/urjtag/grlib.h
>  create mode 100644 urjtag/src/cmd/cmd_grlib.c
>  create mode 100644 urjtag/src/grlib/Makefile.am
>  create mode 100644 urjtag/src/grlib/devices.h
>  create mode 100644 urjtag/src/grlib/elf.c
>  create mode 100644 urjtag/src/grlib/elf.h
>  create mode 100644 urjtag/src/grlib/gdb.c
>  create mode 100644 urjtag/src/grlib/grlib.c
>  create mode 100644 urjtag/src/grlib/grlib_int.h
>  create mode 100644 urjtag/src/grlib/sparc.c
>  create mode 100644 urjtag/src/grlib/sparc.h
>  create mode 100644 urjtag/src/grlib/sparc_disas.c
> 
> -- 
> 2.17.1
> 

> 
> Overview
> 
> 
> The grlib subsystems allows scanning of IP cores in a grlib SOC system,
> and executing of programs on a leon3 processor. Communication with the
> hardware is done using the grlib AHBJTAG debug interface using any supported
> JTAG cable. A suitable command file for the Pender Elextronics XC6SLX75 board
> would be:
> 
> cable FT2232 vid=0x0403 pid=0x6010  driver=ftdi-mpsse
> detect
> initbus ahbjtag
> grlib scan
> 
> The output of urjtag would then be:
> 
> 
> Connected to libftdi driver.
> IR length: 6
> Chain length: 1
> Device Id: 0100111010010011 (0x0400E093)
>   Manufacturer: Xilinx (0x093)
>   Part(0):  xc6slx75 (0x400E)
>   Stepping: 0
>   Filename: /usr/local/share/urjtag/xilinx/xc6slx75/xc6slx75
> 
>  Scanning GRLIB system, build version 4241
> 
>  AHB Masters
>   LEON3 SPARC V8 Processor   
>   LEON3 SPARC V8 Processor   
>   LEON3 SPARC V8 Processor   
>   AHB Debug UART 
>   JTAG Debug Link
>   GR Ethernet MAC
> 
>  AHB Slaves Memory Range
>   LEON2 Memory Controller   0x - 0x2000
>   AHB/APB Bridge0x8000 - 0x8010
>   LEON3 Debug Support Unit  0x9000 - 0xa000
>   Xilinx MIG DDR2 Controller0x4000 - 0x4800
>   AHB/APB Bridge0x8010 - 0x8020
> 
>  APB Slaves
>   LEON2 Memory Controller   0x8000 - 0x8100
>   Generic UART  0x8100 - 0x8200
>   Multi-processor Interrupt Ctrl.   0x8200 - 0x8300
>   Modular Timer Unit0x8300 - 0x8400
>   AHB Debug UART0x8700 - 0x8800
>   General Purpose I/O port  0x8a00 - 0x8b00
>   General Purpose I/O port  0x8b00 - 0x8c00
>   General Purpose I/O port  0x8c00 - 0x8d00
>   AHB Status Register   0x8d00 - 0x8e00
>   GR Ethernet MAC   0x8e00 - 0x8f00
>   Xilinx MIG DDR2 Controller0x8010 - 0x80100100
>   Gaisler RGMII Interface   0x80101000 - 0x80102000
> 
>  Detected frequency from GPTIMER: 50.0 MHz
>  UART1 @ 0x8100 enabled at 38400 baud
>  128 MByte RAM @ 0x4000, stack pointer 0x47c0
>  LEON3DSU @ 0x9000, 3 processor(s) detected
> jtag> 
> 
> The interaction with the SOC 

[UrJTAG-dev] interest in debug support for LEON3/GRLIB

2019-12-11 Thread Jiri Gaisler
Hello,

would there be any interest to include a debug monitor for LEON3/GRLIB 
processors to urjtag? It allows to display various processor registers and 
upload and execute programs. I have developed it similar to the Blackfin module 
in urjtag, and it is of similar size. I have attached the diff statistics and 
the README file. Let me know if there is any interest to merge this into urjtag 
or if I rather should have in a separate repo ...

Jiri.

From ee246a8359d4ab7e43afdf4774333f0a9ed969d2 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler 
Date: Mon, 9 Dec 2019 14:25:32 +0100
Subject: [PATCH 0/1] *** SUBJECT HERE ***

*** BLURB HERE ***

Jiri Gaisler (1):
  Added grlib subsystem

 urjtag/ChangeLog   |3 +
 urjtag/MAINTAINERS |7 +
 urjtag/configure.ac|1 +
 urjtag/doc/README.grlib|   99 +
 urjtag/include/urjtag/error.h  |2 +
 urjtag/include/urjtag/grlib.h  |   73 +
 urjtag/src/Makefile.am |2 +
 urjtag/src/cmd/Makefile.am |3 +-
 urjtag/src/cmd/cmd_grlib.c |  270 +++
 urjtag/src/global/log-error.c  |2 +
 urjtag/src/grlib/Makefile.am   |   35 +
 urjtag/src/grlib/devices.h |  291 +++
 urjtag/src/grlib/elf.c |  288 +++
 urjtag/src/grlib/elf.h | 3789 
 urjtag/src/grlib/gdb.c |  570 +
 urjtag/src/grlib/grlib.c   |  739 +++
 urjtag/src/grlib/grlib_int.h   |  367 
 urjtag/src/grlib/sparc.c   |  138 ++
 urjtag/src/grlib/sparc.h   |  155 ++
 urjtag/src/grlib/sparc_disas.c | 1083 +
 20 files changed, 7916 insertions(+), 1 deletion(-)
 create mode 100644 urjtag/doc/README.grlib
 create mode 100644 urjtag/include/urjtag/grlib.h
 create mode 100644 urjtag/src/cmd/cmd_grlib.c
 create mode 100644 urjtag/src/grlib/Makefile.am
 create mode 100644 urjtag/src/grlib/devices.h
 create mode 100644 urjtag/src/grlib/elf.c
 create mode 100644 urjtag/src/grlib/elf.h
 create mode 100644 urjtag/src/grlib/gdb.c
 create mode 100644 urjtag/src/grlib/grlib.c
 create mode 100644 urjtag/src/grlib/grlib_int.h
 create mode 100644 urjtag/src/grlib/sparc.c
 create mode 100644 urjtag/src/grlib/sparc.h
 create mode 100644 urjtag/src/grlib/sparc_disas.c

-- 
2.17.1


Overview


The grlib subsystems allows scanning of IP cores in a grlib SOC system,
and executing of programs on a leon3 processor. Communication with the
hardware is done using the grlib AHBJTAG debug interface using any supported
JTAG cable. A suitable command file for the Pender Elextronics XC6SLX75 board
would be:

cable FT2232 vid=0x0403 pid=0x6010  driver=ftdi-mpsse
detect
initbus ahbjtag
grlib scan

The output of urjtag would then be:


Connected to libftdi driver.
IR length: 6
Chain length: 1
Device Id: 0100111010010011 (0x0400E093)
  Manufacturer: Xilinx (0x093)
  Part(0):  xc6slx75 (0x400E)
  Stepping: 0
  Filename: /usr/local/share/urjtag/xilinx/xc6slx75/xc6slx75

 Scanning GRLIB system, build version 4241

 AHB Masters
  LEON3 SPARC V8 Processor   
  LEON3 SPARC V8 Processor   
  LEON3 SPARC V8 Processor   
  AHB Debug UART 
  JTAG Debug Link
  GR Ethernet MAC

 AHB Slaves Memory Range
  LEON2 Memory Controller   0x - 0x2000
  AHB/APB Bridge0x8000 - 0x8010
  LEON3 Debug Support Unit  0x9000 - 0xa000
  Xilinx MIG DDR2 Controller0x4000 - 0x4800
  AHB/APB Bridge0x8010 - 0x8020

 APB Slaves
  LEON2 Memory Controller   0x8000 - 0x8100
  Generic UART  0x8100 - 0x8200
  Multi-processor Interrupt Ctrl.   0x8200 - 0x8300
  Modular Timer Unit0x8300 - 0x8400
  AHB Debug UART0x8700 - 0x8800
  General Purpose I/O port  0x8a00 - 0x8b00
  General Purpose I/O port  0x8b00 - 0x8c00
  General Purpose I/O port  0x8c00 - 0x8d00
  AHB Status Register   0x8d00 - 0x8e00
  GR Ethernet MAC   0x8e00 - 0x8f00
  Xilinx MIG DDR2 Controller0x8010 - 0x80100100
  Gaisler RGMII Interface   0x80101000 - 0x80102000

 Detected frequency from GPTIMER: 50.0 MHz
 UART1 @ 0x8100 enabled at 38400 baud
 128 MByte RAM @ 0x4000, stack pointer 0x47c0
 LEON3DSU @ 0x9000, 3 processor(s) detected
jtag> 

The interaction with the SOC is done using the grlib command:

grlib break Stop (break) running program
grlib cont  Resume stopped program
grlib init  Scan SOC and initialize IP cores
grlib loadLoad ELF file to memory
grlib mem [addr] [bytes]Display memory
grlib run   Run loaded ELF file
grlib rundb Run loaded ELF file, output to urjtag console

A