Re: Running two RTEMS instances on two RISC-V harts

2022-10-24 Thread Joel Sherrill
The leon3 BSP also supported something similar at one point. If the two applications do not need to communicate, then it should not be an issue. If the do need to communicate, then this might be a case where the original distributed multiprocessing in RTEMS makes sense. It isn't used much but is

Re: Running two RTEMS instances on two RISC-V harts

2022-10-24 Thread Sebastian Huber
Hello Jens, in general, such a setups works. We used it some time ago on the NXP P1020 before the SMP support was available. You just have to provide two MEMORY definitions for the linker. You also have to make sure that you don't accidentally share hardware modules between the two RTEMS

AW: Running two RTEMS instances on two RISC-V harts

2022-10-24 Thread Schweikhardt, Jens (TSPCE6-TL5)
:13 An: Schweikhardt, Jens (TSPCE6-TL5) ; users@rtems.org Betreff: RE: Running two RTEMS instances on two RISC-V harts Externe E-Mail: Bitte Absender und Inhalt der Mail prüfen, bevor Dateianhänge oder Links geöffnet werden! Hi Jens, Is there a real need to have the telescope driver twice

RE: Running two RTEMS instances on two RISC-V harts

2022-10-24 Thread Jan.Sommer
(TSPCE6-TL5) Sent: Montag, 24. Oktober 2022 13:53 To: 'users@rtems.org' Subject: Running two RTEMS instances on two RISC-V harts hello, world\n we’re currently in the design phase for a rocketchip RISC-V project with two harts. Think a common HW platform where each hart drives a separate telescope

Running two RTEMS instances on two RISC-V harts

2022-10-24 Thread Schweikhardt, Jens (TSPCE6-TL5)
hello, world\n we’re currently in the design phase for a rocketchip RISC-V project with two harts. Think a common HW platform where each hart drives a separate telescope unit. The C code for each telescope is basically identical with the exception of memory mapped registers and interrupts. Our