Re: [USRP-users] I want to build my custom FPGA image but failed to get the license

2017-07-25 Thread Nate Temple via USRP-users
Hi, Which OS and OS Version are you using? Regards, Nate > On Jul 25, 2017, at 5:55 PM, 이진세 via USRP-users > wrote: > > hello > > I use e310 and try to build custom fpga image. > > and i entered a trial license, including webPack, from Vivado License

Re: [USRP-users] 答复: frequency shift of B210

2017-07-25 Thread john liu via USRP-users
Hi all, Any suggestions is welcome. best regards Jong On Mon, Jul 24, 2017 at 5:35 PM, john liu wrote: > HI,all, > Do you have any suggestions about this? > thank you. > best regards > John > > On Mon, Jul 24, 2017 at 9:15 AM, 戚科峰(研三 福州) >

[USRP-users] I want to build my custom FPGA image but failed to get the license

2017-07-25 Thread 이진세 via USRP-users
hello I use e310 and try to build custom fpga image. and i entered a trial license, including webPack, from Vivado License manager. In the View License Status tab, the license named Synthesis and XC7Z020 is displayed. However, i received error message saying that the license is not

[USRP-users] Issues with dual full duplex on x310

2017-07-25 Thread Michael Carosino via USRP-users
Hi, I'm using gnuradio 3.7.12 and rfnoc-devel commit 1908672. I'm trying to use both daughter boards on the x310 each at full duplex (that is, I will have 2 independent tx paths and 2 independent rx paths). So far I have accomplished this by using the UHD: USRP Sink/Source blocks and setting

Re: [USRP-users] X300 recovery after LATE_COMMAND or OVERFLOW_ERROR

2017-07-25 Thread Michael West via USRP-users
Hi Martin, Without seeing some source code, it is difficult to say exactly what is going on. The ERROR_CODE_LATE_COMMAND means that the radio block in the FPGA received a command late. An ERROR_CODE_OVERFLOW with the out_of_sequence flag set is alarming and means that packets are getting

[USRP-users] X300 recovery after LATE_COMMAND or OVERFLOW_ERROR

2017-07-25 Thread Martin Guski via USRP-users
Hi! We are using 8 X300s which are each connected to a computer via dedicated 10 GigE ports. Our application is transmitting and receiving for bursts of 1 second (@10 Msps) on both slots of the USRP. After that we process the data, transmit/receive again, and so on. After running without errors

Re: [USRP-users] E310 rx_samples_from_file stores data based on sample rate and not Bandwidth

2017-07-25 Thread Marcus D. Leech via USRP-users
On 07/25/2017 08:43 AM, olivani via USRP-users wrote: Hi , Let me first describe my application I have to collected data (type short, wirefmt sc16) at a particular center frequency at a sampling rate of 25 Msps and set the bandwidth to be 20 MHz and the master clock is set to be 25 MHz. I

[USRP-users] E310 rx_samples_from_file stores data based on sample rate and not Bandwidth

2017-07-25 Thread olivani via USRP-users
Hi , Let me first describe my application I have to collected data (type short, wirefmt sc16) at a particular center frequency at a sampling rate of 25 Msps and set the bandwidth to be 20 MHz and the master clock is set to be 25 MHz. I have a custom fpga to detect the presence of unwanted